projects/linux·commit e1706720

phy: fix build breakage: add PHY_MODE_SATA

e1706720 · John Hubbard <[email protected]> · 2019-01-12 17:29:09 -08:00

Commit 49e54187ae0b ("ata: libahci_platform: comply to PHY framework") uses
the PHY_MODE_SATA, but that enum had not yet been added. This caused a
build failure for me, with today's linux.git.

Also, there is a potentially conflicting (mis-named) PHY_MODE_SATA, hiding
in the Marvell Berlin SATA PHY driver.

Fix the build by:

    1) Renaming Marvell's defined value to a more scoped name,
       in order to avoid any potential conflicts: PHY_BERLIN_MODE_SATA.

    2) Adding the missing enum, which was going to be added anyway as part
       of [1].

[1] https://lkml.kernel.org/r/[email protected]

Fixes: 49e54187ae0b ("ata: libahci_platform: comply to PHY framework")

Signed-off-by: John Hubbard <[email protected]>
Acked-by: Jens Axboe <[email protected]>
Acked-by: Olof Johansson <[email protected]>
Cc: Grzegorz Jaszczyk <[email protected]>
Cc: Miquel Raynal <[email protected]>
Cc: Hans de Goede <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
Commit
e1706720408e72fb883f6b151c2b3b23d8e7e5b2
Parents
b8c3b899

Changes

2 files changed · +4 −2

FileStatusAddDelContent
drivers/phy/marvell/phy-berlin-sata.cmodified+3−2View file
include/linux/phy/phy.hmodified+1−0View file

drivers/phy/marvell/phy-berlin-sata.c

View file
diff --git a/drivers/phy/marvell/phy-berlin-sata.c b/drivers/phy/marvell/phy-berlin-sata.c
index a91fc67..d70ba9b 100644
--- a/drivers/phy/marvell/phy-berlin-sata.c
+++ b/drivers/phy/marvell/phy-berlin-sata.c
@@ -32,7 +32,7 @@
/* register 0x01 */
#define REF_FREF_SEL_25 BIT(0)
-#define PHY_MODE_SATA (0x0 << 5)
+#define PHY_BERLIN_MODE_SATA (0x0 << 5)
/* register 0x02 */
#define USE_MAX_PLL_RATE BIT(12)
@@ -102,7 +102,8 @@ static int phy_berlin_sata_power_on(struct phy *phy)
/* set PHY mode and ref freq to 25 MHz */
phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x01,
- 0x00ff, REF_FREF_SEL_25 | PHY_MODE_SATA);
+ 0x00ff,
+ REF_FREF_SEL_25 | PHY_BERLIN_MODE_SATA);
/* set PHY up to 6 Gbps */
phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x25,

include/linux/phy/phy.h

View file
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index e8e118d..3f350e2 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -42,6 +42,7 @@ enum phy_mode {
PHY_MODE_PCIE,
PHY_MODE_ETHERNET,
PHY_MODE_MIPI_DPHY,
+ PHY_MODE_SATA
};
/**