projects/linux·commit edb2a385

Merge tag 'pinctrl-v4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

edb2a385 · Linus Torvalds <[email protected]> · 2018-06-07 13:56:45 -07:00

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for v4.18.

  No core changes this time! Just a calm all-over-the-place drivers,
  updates and fixes cycle as it seems.

  New drivers/subdrivers:

   - Actions Semiconductor S900 driver with more Actions variants for
     S700, S500 in the pipe. Also generic GPIO support on top of the
     same driver and IRQ support is in the pipe.

   - Renesas r8a77470 PFC support.

   - Renesas r8a77990 PFC support.

   - Allwinner Sunxi H6 R_PIO support.

   - Rockchip PX30 support.

   - Meson Meson8m2 support.

   - Remove support for the ill-fated Samsung Exynos 5440 SoC.

  Improvements:

   - Context save/restore support in pinctrl-single.

   - External interrupt support for the Mediatek MT7622.

   - Qualcomm ACPI HID QCOM8002 supported.

  Fixes:

   - Fix up suspend/resume support for Exynos 5433.

   - Fix Strago DMI fixes on the Intel Cherryview"

* tag 'pinctrl-v4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
  pinctrl: cherryview: limit Strago DMI workarounds to version 1.0
  pinctrl: at91-pio4: add missing of_node_put
  pinctrl: armada-37xx: Fix spurious irq management
  gpiolib: discourage gpiochip_add_pin[group]_range for DT pinctrls
  pinctrl: msm: fix gpio-hog related boot issues
  MAINTAINERS: update entry for Mediatek pin controller
  pinctrl: mediatek: remove unused fields in struct mtk_eint_hw
  pinctrl: mediatek: use generic EINT register maps for each SoC
  pinctrl: mediatek: add EINT support to MT7622 SoC
  pinctrl: mediatek: refactor EINT related code for all MediaTek pinctrl can fit
  dt-bindings: pinctrl: add external interrupt support to MT7622 pinctrl
  pinctrl: freescale: Switch to SPDX identifier
  pinctrl: samsung: Fix suspend/resume for Exynos5433 GPF1..5 banks
  pinctrl: sh-pfc: rcar-gen3: Fix grammar in static pin comments
  pinctrl: sh-pfc: r8a77965: Add I2C pin support
  pinctrl: sh-pfc: r8a77990: Add EthernetAVB pins, groups and functions
  pinctrl: sh-pfc: r8a77990: Add I2C{1,2,4,5,6,7} pins, groups and functions
  pinctrl: sh-pfc: r8a77990: Add SCIF pins, groups and functions
  pinctrl: sh-pfc: r8a77990: Add bias pinconf support
  pinctrl: sh-pfc: Initial R8A77990 PFC support
  ...
Commit
edb2a385ec331fda7ecb5502d63e5e8be86b7a84
Parents
3a979e8c · 86c5dd68

Merge commit. Changes below are compared with the first parent: 3a979e8c.

Changes

102 files changed · +11832 −2134

FileStatusAddDelContent
Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txtmodified+16−0View file
Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txtmodified+1−0View file
Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txtmodified+18−0View file
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txtmodified+2−0View file
Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txtmodified+3−1View file
Documentation/devicetree/bindings/pinctrl/pinctrl-mt7622.txtmodified+10−0View file
Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txtmodified+2−0View file
Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txtmodified+1−0View file
MAINTAINERSmodified+3−0View file
drivers/gpio/gpiolib.cmodified+10−0View file
drivers/pinctrl/Kconfigmodified+1−0View file
drivers/pinctrl/Makefilemodified+1−0View file
drivers/pinctrl/actions/Kconfigadded+15−0View file
drivers/pinctrl/actions/Makefileadded+2−0View file
drivers/pinctrl/actions/pinctrl-owl.cadded+785−0View file
drivers/pinctrl/actions/pinctrl-owl.hadded+162−0View file
drivers/pinctrl/actions/pinctrl-s900.cadded+1888−0View file
drivers/pinctrl/bcm/Kconfigmodified+1−0View file
drivers/pinctrl/bcm/pinctrl-bcm2835.cmodified+63−37View file
drivers/pinctrl/berlin/berlin-bg2.cmodified+1−4View file
drivers/pinctrl/berlin/berlin-bg2cd.cmodified+1−4View file
drivers/pinctrl/berlin/berlin-bg2q.cmodified+1−4View file
drivers/pinctrl/berlin/berlin-bg4ct.cmodified+1−12View file
drivers/pinctrl/berlin/berlin.cmodified+1−4View file
drivers/pinctrl/berlin/berlin.hmodified+1−4View file
drivers/pinctrl/freescale/pinctrl-imx.cmodified+22−20View file
drivers/pinctrl/freescale/pinctrl-imx.hmodified+1−5View file
drivers/pinctrl/freescale/pinctrl-imx1-core.cmodified+11−16View file
drivers/pinctrl/freescale/pinctrl-imx1.cmodified+5−10View file
drivers/pinctrl/freescale/pinctrl-imx1.hmodified+1−5View file
drivers/pinctrl/freescale/pinctrl-imx21.cmodified+5−10View file
drivers/pinctrl/freescale/pinctrl-imx23.cmodified+6−13View file
drivers/pinctrl/freescale/pinctrl-imx25.cmodified+12−16View file
drivers/pinctrl/freescale/pinctrl-imx27.cmodified+7−12View file
drivers/pinctrl/freescale/pinctrl-imx28.cmodified+6−13View file
drivers/pinctrl/freescale/pinctrl-imx35.cmodified+10−14View file
drivers/pinctrl/freescale/pinctrl-imx50.cmodified+7−12View file
drivers/pinctrl/freescale/pinctrl-imx51.cmodified+8−13View file
drivers/pinctrl/freescale/pinctrl-imx53.cmodified+8−13View file
drivers/pinctrl/freescale/pinctrl-imx6dl.cmodified+6−10View file
drivers/pinctrl/freescale/pinctrl-imx6q.cmodified+8−13View file
drivers/pinctrl/freescale/pinctrl-imx6sl.cmodified+6−10View file
drivers/pinctrl/freescale/pinctrl-imx6sll.cmodified+3−5View file
drivers/pinctrl/freescale/pinctrl-imx6sx.cmodified+6−10View file
drivers/pinctrl/freescale/pinctrl-imx6ul.cmodified+6−10View file
drivers/pinctrl/freescale/pinctrl-imx7d.cmodified+6−10View file
drivers/pinctrl/freescale/pinctrl-imx7ulp.cmodified+6−11View file
drivers/pinctrl/freescale/pinctrl-mxs.cmodified+3−10View file
drivers/pinctrl/freescale/pinctrl-mxs.hmodified+1−7View file
drivers/pinctrl/freescale/pinctrl-vf610.cmodified+5−10View file
drivers/pinctrl/intel/pinctrl-cherryview.cmodified+4−0View file
drivers/pinctrl/mediatek/Kconfigmodified+6−0View file
drivers/pinctrl/mediatek/Makefilemodified+1−0View file
drivers/pinctrl/mediatek/mtk-eint.cadded+492−0View file
drivers/pinctrl/mediatek/mtk-eint.hadded+106−0View file
drivers/pinctrl/mediatek/pinctrl-mt2701.cmodified+3−22View file
drivers/pinctrl/mediatek/pinctrl-mt2712.cmodified+3−22View file
drivers/pinctrl/mediatek/pinctrl-mt7622.cmodified+143−0View file
drivers/pinctrl/mediatek/pinctrl-mt8127.cmodified+3−22View file
drivers/pinctrl/mediatek/pinctrl-mt8135.cmodified+3−22View file
drivers/pinctrl/mediatek/pinctrl-mt8173.cmodified+3−22View file
drivers/pinctrl/mediatek/pinctrl-mtk-common.cmodified+114−494View file
drivers/pinctrl/mediatek/pinctrl-mtk-common.hmodified+5−8View file
drivers/pinctrl/meson/pinctrl-meson-axg.cmodified+107−0View file
drivers/pinctrl/meson/pinctrl-meson-gxbb.cmodified+2−2View file
drivers/pinctrl/meson/pinctrl-meson-gxl.cmodified+2−2View file
drivers/pinctrl/meson/pinctrl-meson8.cmodified+21−2View file
drivers/pinctrl/mvebu/pinctrl-armada-37xx.cmodified+10−22View file
drivers/pinctrl/mvebu/pinctrl-armada-xp.cmodified+11−11View file
drivers/pinctrl/pinctrl-at91-pio4.cmodified+3−1View file
drivers/pinctrl/pinctrl-rockchip.cmodified+246−0View file
drivers/pinctrl/pinctrl-single.cmodified+71−1View file
drivers/pinctrl/qcom/pinctrl-msm.cmodified+60−32View file
drivers/pinctrl/qcom/pinctrl-qdf2xxx.cmodified+73−41View file
drivers/pinctrl/samsung/Kconfigmodified+2−8View file
drivers/pinctrl/samsung/Makefilemodified+0−1View file
drivers/pinctrl/samsung/pinctrl-exynos-arm.cmodified+28−2View file
drivers/pinctrl/samsung/pinctrl-exynos-arm64.cmodified+20−0View file
drivers/pinctrl/samsung/pinctrl-exynos.hmodified+1−1View file
drivers/pinctrl/samsung/pinctrl-exynos5440.cdeleted+0−1005View before deletion
drivers/pinctrl/samsung/pinctrl-samsung.cmodified+29−0View file
drivers/pinctrl/sh-pfc/Kconfigmodified+10−0View file
drivers/pinctrl/sh-pfc/Makefilemodified+2−0View file
drivers/pinctrl/sh-pfc/core.cmodified+12−0View file
drivers/pinctrl/sh-pfc/pfc-r8a77470.cadded+2343−0View file
drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.cmodified+3−3View file
drivers/pinctrl/sh-pfc/pfc-r8a7795.cmodified+4−4View file
drivers/pinctrl/sh-pfc/pfc-r8a7796.cmodified+4−4View file
drivers/pinctrl/sh-pfc/pfc-r8a77965.cmodified+1588−4View file
drivers/pinctrl/sh-pfc/pfc-r8a77970.cmodified+24−8View file
drivers/pinctrl/sh-pfc/pfc-r8a77980.cmodified+49−3View file
drivers/pinctrl/sh-pfc/pfc-r8a77990.cadded+2695−0View file
drivers/pinctrl/sh-pfc/sh_pfc.hmodified+8−2View file
drivers/pinctrl/sunxi/Kconfigmodified+4−0View file
drivers/pinctrl/sunxi/Makefilemodified+1−0View file
drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.cadded+128−0View file
drivers/pinctrl/tegra/pinctrl-tegra.cmodified+0−11View file
drivers/pinctrl/tegra/pinctrl-tegra.hmodified+11−0View file
drivers/pinctrl/tegra/pinctrl-tegra20.cmodified+29−1View file
drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.cmodified+49−0View file
drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.cmodified+54−0View file
include/dt-bindings/pinctrl/mt7623-pinfunc.hmodified+87−3View file

Only the first 600 diff lines are shown. Download the complete patch.

Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt

View file
diff --git a/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt
index fb87c7d..8fb5a53 100644
--- a/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt
@@ -8,6 +8,17 @@ Required Properties:
- reg: Should contain the register base address and size of
the pin controller.
- clocks: phandle of the clock feeding the pin controller
+- gpio-controller: Marks the device node as a GPIO controller.
+- gpio-ranges: Specifies the mapping between gpio controller and
+ pin-controller pins.
+- #gpio-cells: Should be two. The first cell is the gpio pin number
+ and the second cell is used for optional parameters.
+- interrupt-controller: Marks the device node as an interrupt controller.
+- #interrupt-cells: Specifies the number of cells needed to encode an
+ interrupt. Shall be set to 2. The first cell
+ defines the interrupt number, the second encodes
+ the trigger flags described in
+ bindings/interrupt-controller/interrupts.txt
Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
@@ -164,6 +175,11 @@ Example:
compatible = "actions,s900-pinctrl";
reg = <0x0 0xe01b0000 0x0 0x1000>;
clocks = <&cmu CLK_GPIO>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 146>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
uart2-default: uart2-default {
pinmux {

Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt

View file
diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
index 64bc5c2..258a464 100644
--- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
@@ -28,6 +28,7 @@ Required properties:
"allwinner,sun50i-a64-r-pinctrl"
"allwinner,sun50i-h5-pinctrl"
"allwinner,sun50i-h6-pinctrl"
+ "allwinner,sun50i-h6-r-pinctrl"
"nextthing,gr8-pinctrl"
- reg: Should contain the register physical address and length for the

Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt

View file
diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
index 2569866..3fac0a0 100644
--- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
@@ -36,6 +36,24 @@ listed. In other words, a subnode that lists only a mux function implies no
information about any pull configuration. Similarly, a subnode that lists only
a pul parameter implies no information about the mux function.
+The BCM2835 pin configuration and multiplexing supports the generic bindings.
+For details on each properties, you can refer to ./pinctrl-bindings.txt.
+
+Required sub-node properties:
+ - pins
+ - function
+
+Optional sub-node properties:
+ - bias-disable
+ - bias-pull-up
+ - bias-pull-down
+ - output-high
+ - output-low
+
+Legacy pin configuration and multiplexing binding:
+*** (Its use is deprecated, use generic multiplexing and configuration
+bindings instead)
+
Required subnode-properties:
- brcm,pins: An array of cells. Each cell contains the ID of a pin. Valid IDs
are the integer GPIO IDs; 0==GPIO0, 1==GPIO1, ... 53==GPIO53.

Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt

View file
diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
index 2c12f97..54ecb8a 100644
--- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
@@ -3,8 +3,10 @@
Required properties for the root node:
- compatible: one of "amlogic,meson8-cbus-pinctrl"
"amlogic,meson8b-cbus-pinctrl"
+ "amlogic,meson8m2-cbus-pinctrl"
"amlogic,meson8-aobus-pinctrl"
"amlogic,meson8b-aobus-pinctrl"
+ "amlogic,meson8m2-aobus-pinctrl"
"amlogic,meson-gxbb-periphs-pinctrl"
"amlogic,meson-gxbb-aobus-pinctrl"
"amlogic,meson-gxl-periphs-pinctrl"

Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt

View file
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt
index a5a8322..a677145 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt
@@ -18,7 +18,9 @@ Required properties:
removed.
- #gpio-cells : Should be two.
- first cell is the pin number
- - second cell is used to specify flags. Flags are currently unused.
+ - second cell is used to specify flags as described in
+ 'Documentation/devicetree/bindings/gpio/gpio.txt'. Allowed values defined by
+ 'include/dt-bindings/gpio/gpio.h' (e.g. GPIO_ACTIVE_LOW).
- gpio-controller : Marks the device node as a GPIO controller.
- reg : For an address on its bus. I2C uses this a the I2C address of the chip.
SPI uses this to specify the chipselect line which the chip is

Documentation/devicetree/bindings/pinctrl/pinctrl-mt7622.txt

View file
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt7622.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt7622.txt
index f18ed99..def8fca 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt7622.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt7622.txt
@@ -9,6 +9,16 @@ Required properties for the root node:
- #gpio-cells: Should be two. The first cell is the pin number and the
second is the GPIO flags.
+Optional properties:
+- interrupt-controller : Marks the device node as an interrupt controller
+
+If the property interrupt-controller is defined, following property is required
+- reg-names: A string describing the "reg" entries. Must contain "eint".
+- interrupts : The interrupt output from the controller.
+- #interrupt-cells: Should be two.
+- interrupt-parent: Phandle of the interrupt parent to which the external
+ GPIO interrupts are forwarded to.
+
Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".

Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt

View file
diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
index 892d8fd..abd8fbc 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
@@ -15,6 +15,7 @@ Required Properties:
- "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
- "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller.
- "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller.
+ - "renesas,pfc-r8a77470": for R8A77470 (RZ/G1C) compatible pin-controller.
- "renesas,pfc-r8a7778": for R8A7778 (R-Car M1) compatible pin-controller.
- "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
- "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
@@ -27,6 +28,7 @@ Required Properties:
- "renesas,pfc-r8a77965": for R8A77965 (R-Car M3-N) compatible pin-controller.
- "renesas,pfc-r8a77970": for R8A77970 (R-Car V3M) compatible pin-controller.
- "renesas,pfc-r8a77980": for R8A77980 (R-Car V3H) compatible pin-controller.
+ - "renesas,pfc-r8a77990": for R8A77990 (R-Car E3) compatible pin-controller.
- "renesas,pfc-r8a77995": for R8A77995 (R-Car D3) compatible pin-controller.
- "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.

Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt

View file
diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
index a01a3b8..0919db2 100644
--- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
@@ -20,6 +20,7 @@ defined as gpio sub-nodes of the pinmux controller.
Required properties for iomux controller:
- compatible: should be
+ "rockchip,px30-pinctrl": for Rockchip PX30
"rockchip,rv1108-pinctrl": for Rockchip RV1108
"rockchip,rk2928-pinctrl": for Rockchip RK2928
"rockchip,rk3066a-pinctrl": for Rockchip RK3066a

MAINTAINERS

View file
diff --git a/MAINTAINERS b/MAINTAINERS
index b4a5642..d96c613 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1135,10 +1135,12 @@ F: arch/arm/mach-actions/
F: arch/arm/boot/dts/owl-*
F: arch/arm64/boot/dts/actions/
F: drivers/clocksource/owl-*
+F: drivers/pinctrl/actions/*
F: drivers/soc/actions/
F: include/dt-bindings/power/owl-*
F: include/linux/soc/actions/
F: Documentation/devicetree/bindings/arm/actions.txt
+F: Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt
F: Documentation/devicetree/bindings/power/actions,owl-sps.txt
F: Documentation/devicetree/bindings/timer/actions,owl-timer.txt
@@ -11225,6 +11227,7 @@ L: [email protected] (moderated for non-subscribers)
S: Maintained
F: Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt
F: Documentation/devicetree/bindings/pinctrl/pinctrl-mt7622.txt
+F: drivers/pinctrl/mediatek/mtk-eint.*
F: drivers/pinctrl/mediatek/pinctrl-mtk-common.*
F: drivers/pinctrl/mediatek/pinctrl-mt2701.c
F: drivers/pinctrl/mediatek/pinctrl-mt7622.c

drivers/gpio/gpiolib.c

View file
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 55d596f..5dfd3c1 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -2078,6 +2078,11 @@ EXPORT_SYMBOL_GPL(gpiochip_generic_config);
* @pctldev: the pin controller to map to
* @gpio_offset: the start offset in the current gpio_chip number space
* @pin_group: name of the pin group inside the pin controller
+ *
+ * Calling this function directly from a DeviceTree-supported
+ * pinctrl driver is DEPRECATED. Please see Section 2.1 of
+ * Documentation/devicetree/bindings/gpio/gpio.txt on how to
+ * bind pinctrl and gpio drivers via the "gpio-ranges" property.
*/
int gpiochip_add_pingroup_range(struct gpio_chip *chip,
struct pinctrl_dev *pctldev,
@@ -2131,6 +2136,11 @@ EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
*
* Returns:
* 0 on success, or a negative error-code on failure.
+ *
+ * Calling this function directly from a DeviceTree-supported
+ * pinctrl driver is DEPRECATED. Please see Section 2.1 of
+ * Documentation/devicetree/bindings/gpio/gpio.txt on how to
+ * bind pinctrl and gpio drivers via the "gpio-ranges" property.
*/
int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
unsigned int gpio_offset, unsigned int pin_offset,

drivers/pinctrl/Kconfig

View file
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 01fe8e0..dd50371 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -337,6 +337,7 @@ config PINCTRL_OCELOT
select GENERIC_PINMUX_FUNCTIONS
select REGMAP_MMIO
+source "drivers/pinctrl/actions/Kconfig"
source "drivers/pinctrl/aspeed/Kconfig"
source "drivers/pinctrl/bcm/Kconfig"
source "drivers/pinctrl/berlin/Kconfig"

drivers/pinctrl/Makefile

View file
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 657332b..de40863 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_PINCTRL_INGENIC) += pinctrl-ingenic.o
obj-$(CONFIG_PINCTRL_RK805) += pinctrl-rk805.o
obj-$(CONFIG_PINCTRL_OCELOT) += pinctrl-ocelot.o
+obj-y += actions/
obj-$(CONFIG_ARCH_ASPEED) += aspeed/
obj-y += bcm/
obj-$(CONFIG_PINCTRL_BERLIN) += berlin/

drivers/pinctrl/actions/Kconfig

View file
diff --git a/drivers/pinctrl/actions/Kconfig b/drivers/pinctrl/actions/Kconfig
new file mode 100644
index 0000000..490927b
--- /dev/null
+++ b/drivers/pinctrl/actions/Kconfig
@@ -0,0 +1,15 @@
+config PINCTRL_OWL
+ bool "Actions Semi OWL pinctrl driver"
+ depends on (ARCH_ACTIONS || COMPILE_TEST) && OF
+ select PINMUX
+ select PINCONF
+ select GENERIC_PINCONF
+ select GPIOLIB
+ help
+ Say Y here to enable Actions Semi OWL pinctrl driver
+
+config PINCTRL_S900
+ bool "Actions Semi S900 pinctrl driver"
+ depends on PINCTRL_OWL
+ help
+ Say Y here to enable Actions Semi S900 pinctrl driver

drivers/pinctrl/actions/Makefile

View file
diff --git a/drivers/pinctrl/actions/Makefile b/drivers/pinctrl/actions/Makefile
new file mode 100644
index 0000000..bd232d2
--- /dev/null
+++ b/drivers/pinctrl/actions/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_PINCTRL_OWL) += pinctrl-owl.o
+obj-$(CONFIG_PINCTRL_S900) += pinctrl-s900.o

drivers/pinctrl/actions/pinctrl-owl.c

View file
diff --git a/drivers/pinctrl/actions/pinctrl-owl.c b/drivers/pinctrl/actions/pinctrl-owl.c
new file mode 100644
index 0000000..76243ca
--- /dev/null
+++ b/drivers/pinctrl/actions/pinctrl-owl.c
@@ -0,0 +1,785 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * OWL SoC's Pinctrl driver
+ *
+ * Copyright (c) 2014 Actions Semi Inc.
+ * Author: David Liu <[email protected]>
+ *
+ * Copyright (c) 2018 Linaro Ltd.
+ * Author: Manivannan Sadhasivam <[email protected]>
+ */
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/gpio/driver.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/pinctrl/machine.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+
+#include "../core.h"
+#include "../pinctrl-utils.h"
+#include "pinctrl-owl.h"
+
+/**
+ * struct owl_pinctrl - pinctrl state of the device
+ * @dev: device handle
+ * @pctrldev: pinctrl handle
+ * @chip: gpio chip
+ * @lock: spinlock to protect registers
+ * @soc: reference to soc_data
+ * @base: pinctrl register base address
+ */
+struct owl_pinctrl {
+ struct device *dev;
+ struct pinctrl_dev *pctrldev;
+ struct gpio_chip chip;
+ raw_spinlock_t lock;
+ struct clk *clk;
+ const struct owl_pinctrl_soc_data *soc;
+ void __iomem *base;
+};
+
+static void owl_update_bits(void __iomem *base, u32 mask, u32 val)
+{
+ u32 reg_val;
+
+ reg_val = readl_relaxed(base);
+
+ reg_val = (reg_val & ~mask) | (val & mask);
+
+ writel_relaxed(reg_val, base);
+}
+
+static u32 owl_read_field(struct owl_pinctrl *pctrl, u32 reg,
+ u32 bit, u32 width)
+{
+ u32 tmp, mask;
+
+ tmp = readl_relaxed(pctrl->base + reg);
+ mask = (1 << width) - 1;
+
+ return (tmp >> bit) & mask;
+}
+
+static void owl_write_field(struct owl_pinctrl *pctrl, u32 reg, u32 arg,
+ u32 bit, u32 width)
+{
+ u32 mask;
+
+ mask = (1 << width) - 1;
+ mask = mask << bit;
+
+ owl_update_bits(pctrl->base + reg, mask, (arg << bit));
+}
+
+static int owl_get_groups_count(struct pinctrl_dev *pctrldev)
+{
+ struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+
+ return pctrl->soc->ngroups;
+}
+
+static const char *owl_get_group_name(struct pinctrl_dev *pctrldev,
+ unsigned int group)
+{
+ struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+
+ return pctrl->soc->groups[group].name;
+}
+
+static int owl_get_group_pins(struct pinctrl_dev *pctrldev,
+ unsigned int group,
+ const unsigned int **pins,
+ unsigned int *num_pins)
+{
+ struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+
+ *pins = pctrl->soc->groups[group].pads;
+ *num_pins = pctrl->soc->groups[group].npads;
+
+ return 0;
+}
+
+static void owl_pin_dbg_show(struct pinctrl_dev *pctrldev,
+ struct seq_file *s,
+ unsigned int offset)
+{
+ struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+
+ seq_printf(s, "%s", dev_name(pctrl->dev));
+}
+
+static struct pinctrl_ops owl_pinctrl_ops = {
+ .get_groups_count = owl_get_groups_count,
+ .get_group_name = owl_get_group_name,
+ .get_group_pins = owl_get_group_pins,
+ .pin_dbg_show = owl_pin_dbg_show,
+ .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
+ .dt_free_map = pinctrl_utils_free_map,
+};
+
+static int owl_get_funcs_count(struct pinctrl_dev *pctrldev)
+{
+ struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+
+ return pctrl->soc->nfunctions;
+}
+
+static const char *owl_get_func_name(struct pinctrl_dev *pctrldev,
+ unsigned int function)
+{
+ struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+
+ return pctrl->soc->functions[function].name;
+}
+
+static int owl_get_func_groups(struct pinctrl_dev *pctrldev,
+ unsigned int function,
+ const char * const **groups,
+ unsigned int * const num_groups)
+{
+ struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+
+ *groups = pctrl->soc->functions[function].groups;
+ *num_groups = pctrl->soc->functions[function].ngroups;
+
+ return 0;
+}
+
+static inline int get_group_mfp_mask_val(const struct owl_pingroup *g,
+ int function,
+ u32 *mask,
+ u32 *val)
+{
+ int id;
+ u32 option_num;
+ u32 option_mask;
+
+ for (id = 0; id < g->nfuncs; id++) {
+ if (g->funcs[id] == function)
+ break;
+ }
+ if (WARN_ON(id == g->nfuncs))
+ return -EINVAL;
+
+ option_num = (1 << g->mfpctl_width);
+ if (id > option_num)
+ id -= option_num;
+
+ option_mask = option_num - 1;
+ *mask = (option_mask << g->mfpctl_shift);
+ *val = (id << g->mfpctl_shift);
+
+ return 0;
+}
+
+static int owl_set_mux(struct pinctrl_dev *pctrldev,
+ unsigned int function,
+ unsigned int group)
+{
+ struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+ const struct owl_pingroup *g;
+ unsigned long flags;
+ u32 val, mask;
+
+ g = &pctrl->soc->groups[group];
+
+ if (get_group_mfp_mask_val(g, function, &mask, &val))
+ return -EINVAL;
+
+ raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+ owl_update_bits(pctrl->base + g->mfpctl_reg, mask, val);
+
+ raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+ return 0;
+}
+
+static struct pinmux_ops owl_pinmux_ops = {
+ .get_functions_count = owl_get_funcs_count,
+ .get_function_name = owl_get_func_name,
+ .get_function_groups = owl_get_func_groups,
+ .set_mux = owl_set_mux,
+};
+
+static int owl_pad_pinconf_reg(const struct owl_padinfo *info,
+ unsigned int param,
+ u32 *reg,
+ u32 *bit,
+ u32 *width)
+{
+ switch (param) {
+ case PIN_CONFIG_BIAS_BUS_HOLD:
+ case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ case PIN_CONFIG_BIAS_PULL_UP:
+ if (!info->pullctl)
+ return -EINVAL;
+ *reg = info->pullctl->reg;
+ *bit = info->pullctl->shift;
+ *width = info->pullctl->width;
+ break;
+ case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
+ if (!info->st)
+ return -EINVAL;
+ *reg = info->st->reg;
+ *bit = info->st->shift;
+ *width = info->st->width;
+ break;
+ default:
+ return -ENOTSUPP;
+ }
+
+ return 0;
+}
+
+static int owl_pad_pinconf_arg2val(const struct owl_padinfo *info,
+ unsigned int param,
+ u32 *arg)
+{
+ switch (param) {
+ case PIN_CONFIG_BIAS_BUS_HOLD:
+ *arg = OWL_PINCONF_PULL_HOLD;
+ break;
+ case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
+ *arg = OWL_PINCONF_PULL_HIZ;
+ break;
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ *arg = OWL_PINCONF_PULL_DOWN;
+ break;
+ case PIN_CONFIG_BIAS_PULL_UP:
+ *arg = OWL_PINCONF_PULL_UP;
+ break;
+ case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
+ *arg = (*arg >= 1 ? 1 : 0);
+ break;
+ default:
+ return -ENOTSUPP;
+ }
+
+ return 0;
+}
+
+static int owl_pad_pinconf_val2arg(const struct owl_padinfo *padinfo,
+ unsigned int param,
+ u32 *arg)
+{
+ switch (param) {
+ case PIN_CONFIG_BIAS_BUS_HOLD:
+ *arg = *arg == OWL_PINCONF_PULL_HOLD;
+ break;
+ case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
+ *arg = *arg == OWL_PINCONF_PULL_HIZ;
+ break;
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ *arg = *arg == OWL_PINCONF_PULL_DOWN;
+ break;
+ case PIN_CONFIG_BIAS_PULL_UP:
+ *arg = *arg == OWL_PINCONF_PULL_UP;
+ break;
+ case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
+ *arg = *arg == 1;
+ break;
+ default:
+ return -ENOTSUPP;
+ }
+
+ return 0;
+}
+
+static int owl_pin_config_get(struct pinctrl_dev *pctrldev,
+ unsigned int pin,
+ unsigned long *config)
+{
+ int ret = 0;
+ struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+ const struct owl_padinfo *info;
+ unsigned int param = pinconf_to_config_param(*config);
+ u32 reg, bit, width, arg;
+
+ info = &pctrl->soc->padinfo[pin];
+
+ ret = owl_pad_pinconf_reg(info, param, &reg, &bit, &width);
+ if (ret)
+ return ret;
+
+ arg = owl_read_field(pctrl, reg, bit, width);
+
+ ret = owl_pad_pinconf_val2arg(info, param, &arg);
+ if (ret)
+ return ret;
+
+ *config = pinconf_to_config_packed(param, arg);
+
+ return ret;
+}
+
+static int owl_pin_config_set(struct pinctrl_dev *pctrldev,
+ unsigned int pin,
+ unsigned long *configs,
+ unsigned int num_configs)
+{

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