projects/linux·blob 04480094 · refs

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1# EventClass.py
2#
3# This is a library defining some events types classes, which could
4# be used by other scripts to analyzing the perf samples.
5#
6# Currently there are just a few classes defined for examples,
7# PerfEvent is the base class for all perf event sample, PebsEvent
8# is a HW base Intel x86 PEBS event, and user could add more SW/HW
9# event classes based on requirements.
10
11import struct
12
13# Event types, user could add more here
14EVTYPE_GENERIC = 0
15EVTYPE_PEBS = 1 # Basic PEBS event
16EVTYPE_PEBS_LL = 2 # PEBS event with load latency info
17EVTYPE_IBS = 3
18
19#
20# Currently we don't have good way to tell the event type, but by
21# the size of raw buffer, raw PEBS event with load latency data's
22# size is 176 bytes, while the pure PEBS event's size is 144 bytes.
23#
24def create_event(name, comm, dso, symbol, raw_buf):
25 if (len(raw_buf) == 144):
26 event = PebsEvent(name, comm, dso, symbol, raw_buf)
27 elif (len(raw_buf) == 176):
28 event = PebsNHM(name, comm, dso, symbol, raw_buf)
29 else:
30 event = PerfEvent(name, comm, dso, symbol, raw_buf)
31
32 return event
33
34class PerfEvent(object):
35 event_num = 0
36 def __init__(self, name, comm, dso, symbol, raw_buf, ev_type=EVTYPE_GENERIC):
37 self.name = name
38 self.comm = comm
39 self.dso = dso
40 self.symbol = symbol
41 self.raw_buf = raw_buf
42 self.ev_type = ev_type
43 PerfEvent.event_num += 1
44
45 def show(self):
46 print "PMU event: name=%12s, symbol=%24s, comm=%8s, dso=%12s" % (self.name, self.symbol, self.comm, self.dso)
47
48#
49# Basic Intel PEBS (Precise Event-based Sampling) event, whose raw buffer
50# contains the context info when that event happened: the EFLAGS and
51# linear IP info, as well as all the registers.
52#
53class PebsEvent(PerfEvent):
54 pebs_num = 0
55 def __init__(self, name, comm, dso, symbol, raw_buf, ev_type=EVTYPE_PEBS):
56 tmp_buf=raw_buf[0:80]
57 flags, ip, ax, bx, cx, dx, si, di, bp, sp = struct.unpack('QQQQQQQQQQ', tmp_buf)
58 self.flags = flags
59 self.ip = ip
60 self.ax = ax
61 self.bx = bx
62 self.cx = cx
63 self.dx = dx
64 self.si = si
65 self.di = di
66 self.bp = bp
67 self.sp = sp
68
69 PerfEvent.__init__(self, name, comm, dso, symbol, raw_buf, ev_type)
70 PebsEvent.pebs_num += 1
71 del tmp_buf
72
73#
74# Intel Nehalem and Westmere support PEBS plus Load Latency info which lie
75# in the four 64 bit words write after the PEBS data:
76# Status: records the IA32_PERF_GLOBAL_STATUS register value
77# DLA: Data Linear Address (EIP)
78# DSE: Data Source Encoding, where the latency happens, hit or miss
79# in L1/L2/L3 or IO operations
80# LAT: the actual latency in cycles
81#
82class PebsNHM(PebsEvent):
83 pebs_nhm_num = 0
84 def __init__(self, name, comm, dso, symbol, raw_buf, ev_type=EVTYPE_PEBS_LL):
85 tmp_buf=raw_buf[144:176]
86 status, dla, dse, lat = struct.unpack('QQQQ', tmp_buf)
87 self.status = status
88 self.dla = dla
89 self.dse = dse
90 self.lat = lat
91
92 PebsEvent.__init__(self, name, comm, dso, symbol, raw_buf, ev_type)
93 PebsNHM.pebs_nhm_num += 1
94 del tmp_buf