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1/*
2 * include/asm-xtensa/processor.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PROCESSOR_H
12#define _XTENSA_PROCESSOR_H
13
14#include <asm/variant/core.h>
15#include <asm/coprocessor.h>
16
17#include <linux/compiler.h>
18#include <asm/ptrace.h>
19#include <asm/types.h>
20#include <asm/regs.h>
21
22/* Assertions. */
23
24#if (XCHAL_HAVE_WINDOWED != 1)
25# error Linux requires the Xtensa Windowed Registers Option.
26#endif
27
28/*
29 * User space process size: 1 GB.
30 * Windowed call ABI requires caller and callee to be located within the same
31 * 1 GB region. The C compiler places trampoline code on the stack for sources
32 * that take the address of a nested C function (a feature used by glibc), so
33 * the 1 GB requirement applies to the stack as well.
34 */
35
36#define TASK_SIZE __XTENSA_UL_CONST(0x40000000)
37#define STACK_TOP TASK_SIZE
38#define STACK_TOP_MAX STACK_TOP
39
40/*
41 * General exception cause assigned to debug exceptions. Debug exceptions go
42 * to their own vector, rather than the general exception vectors (user,
43 * kernel, double); and their specific causes are reported via DEBUGCAUSE
44 * rather than EXCCAUSE. However it is sometimes convenient to redirect debug
45 * exceptions to the general exception mechanism. To do this, an otherwise
46 * unused EXCCAUSE value was assigned to debug exceptions for this purpose.
47 */
48
49#define EXCCAUSE_MAPPED_DEBUG 63
50
51/*
52 * We use DEPC also as a flag to distinguish between double and regular
53 * exceptions. For performance reasons, DEPC might contain the value of
54 * EXCCAUSE for regular exceptions, so we use this definition to mark a
55 * valid double exception address.
56 * (Note: We use it in bgeui, so it should be 64, 128, or 256)
57 */
58
59#define VALID_DOUBLE_EXCEPTION_ADDRESS 64
60
61/* LOCKLEVEL defines the interrupt level that masks all
62 * general-purpose interrupts.
63 */
64#define LOCKLEVEL 1
65
66/* WSBITS and WBBITS are the width of the WINDOWSTART and WINDOWBASE
67 * registers
68 */
69#define WSBITS (XCHAL_NUM_AREGS / 4) /* width of WINDOWSTART in bits */
70#define WBBITS (XCHAL_NUM_AREGS_LOG2 - 2) /* width of WINDOWBASE in bits */
71
72#ifndef __ASSEMBLY__
73
74/* Build a valid return address for the specified call winsize.
75 * winsize must be 1 (call4), 2 (call8), or 3 (call12)
76 */
77#define MAKE_RA_FOR_CALL(ra,ws) (((ra) & 0x3fffffff) | (ws) << 30)
78
79/* Convert return address to a valid pc
80 * Note: We assume that the stack pointer is in the same 1GB ranges as the ra
81 */
82#define MAKE_PC_FROM_RA(ra,sp) (((ra) & 0x3fffffff) | ((sp) & 0xc0000000))
83
84typedef struct {
85 unsigned long seg;
86} mm_segment_t;
87
88struct thread_struct {
89
90 /* kernel's return address and stack pointer for context switching */
91 unsigned long ra; /* kernel's a0: return address and window call size */
92 unsigned long sp; /* kernel's a1: stack pointer */
93
94 mm_segment_t current_ds; /* see uaccess.h for example uses */
95
96 /* struct xtensa_cpuinfo info; */
97
98 unsigned long bad_vaddr; /* last user fault */
99 unsigned long bad_uaddr; /* last kernel fault accessing user space */
100 unsigned long error_code;
101
102 unsigned long ibreak[XCHAL_NUM_IBREAK];
103 unsigned long dbreaka[XCHAL_NUM_DBREAK];
104 unsigned long dbreakc[XCHAL_NUM_DBREAK];
105
106 /* Make structure 16 bytes aligned. */
107 int align[0] __attribute__ ((aligned(16)));
108};
109
110
111/*
112 * Default implementation of macro that returns current
113 * instruction pointer ("program counter").
114 */
115#define current_text_addr() ({ __label__ _l; _l: &&_l;})
116
117
118/* This decides where the kernel will search for a free chunk of vm
119 * space during mmap's.
120 */
121#define TASK_UNMAPPED_BASE (TASK_SIZE / 2)
122
123#define INIT_THREAD \
124{ \
125 ra: 0, \
126 sp: sizeof(init_stack) + (long) &init_stack, \
127 current_ds: {0}, \
128 /*info: {0}, */ \
129 bad_vaddr: 0, \
130 bad_uaddr: 0, \
131 error_code: 0, \
132}
133
134
135/*
136 * Do necessary setup to start up a newly executed thread.
137 * Note: We set-up ps as if we did a call4 to the new pc.
138 * set_thread_state in signal.c depends on it.
139 */
140#define USER_PS_VALUE ((1 << PS_WOE_BIT) | \
141 (1 << PS_CALLINC_SHIFT) | \
142 (USER_RING << PS_RING_SHIFT) | \
143 (1 << PS_UM_BIT) | \
144 (1 << PS_EXCM_BIT))
145
146/* Clearing a0 terminates the backtrace. */
147#define start_thread(regs, new_pc, new_sp) \
148 regs->pc = new_pc; \
149 regs->ps = USER_PS_VALUE; \
150 regs->areg[1] = new_sp; \
151 regs->areg[0] = 0; \
152 regs->wmask = 1; \
153 regs->depc = 0; \
154 regs->windowbase = 0; \
155 regs->windowstart = 1;
156
157/* Forward declaration */
158struct task_struct;
159struct mm_struct;
160
161/* Free all resources held by a thread. */
162#define release_thread(thread) do { } while(0)
163
164/* Prepare to copy thread state - unlazy all lazy status */
165extern void prepare_to_copy(struct task_struct*);
166
167/* Create a kernel thread without removing it from tasklists */
168extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
169
170/* Copy and release all segment info associated with a VM */
171#define copy_segments(p, mm) do { } while(0)
172#define release_segments(mm) do { } while(0)
173#define forget_segments() do { } while (0)
174
175#define thread_saved_pc(tsk) (task_pt_regs(tsk)->pc)
176
177extern unsigned long get_wchan(struct task_struct *p);
178
179#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
180#define KSTK_ESP(tsk) (task_pt_regs(tsk)->areg[1])
181
182#define cpu_relax() barrier()
183
184/* Special register access. */
185
186#define WSR(v,sr) __asm__ __volatile__ ("wsr %0,"__stringify(sr) :: "a"(v));
187#define RSR(v,sr) __asm__ __volatile__ ("rsr %0,"__stringify(sr) : "=a"(v));
188
189#define set_sr(x,sr) ({unsigned int v=(unsigned int)x; WSR(v,sr);})
190#define get_sr(sr) ({unsigned int v; RSR(v,sr); v; })
191
192#endif /* __ASSEMBLY__ */
193#endif /* _XTENSA_PROCESSOR_H */