| 1 |
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| 2 | #ifndef _RESCTRL_H
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| 3 | #define _RESCTRL_H
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| 4 |
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| 5 | #include <linux/cacheinfo.h>
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| 6 | #include <linux/kernel.h>
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| 7 | #include <linux/list.h>
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| 8 | #include <linux/pid.h>
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| 9 | #include <linux/resctrl_types.h>
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| 10 |
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| 11 | #ifdef CONFIG_ARCH_HAS_CPU_RESCTRL
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| 12 | #include <asm/resctrl.h>
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| 13 | #endif
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| 14 |
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| 15 |
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| 16 | #define RESCTRL_RESERVED_CLOSID 0
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| 17 | #define RESCTRL_RESERVED_RMID 0
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| 18 |
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| 19 | #define RESCTRL_PICK_ANY_CPU -1
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| 20 |
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| 21 | #ifdef CONFIG_PROC_CPU_RESCTRL
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| 22 |
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| 23 | int proc_resctrl_show(struct seq_file *m,
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| 24 | struct pid_namespace *ns,
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| 25 | struct pid *pid,
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| 26 | struct task_struct *tsk);
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| 27 |
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| 28 | #endif
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| 29 |
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| 30 |
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| 31 | #define MBA_MAX_MBPS U32_MAX
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| 32 |
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| 33 |
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| 34 | #define for_each_rdt_resource(_r) \
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| 35 | for ((_r) = resctrl_arch_get_resource(0); \
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| 36 | (_r) && (_r)->rid < RDT_NUM_RESOURCES; \
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| 37 | (_r) = resctrl_arch_get_resource((_r)->rid + 1))
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| 38 |
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| 39 | #define for_each_capable_rdt_resource(r) \
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| 40 | for_each_rdt_resource((r)) \
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| 41 | if ((r)->alloc_capable || (r)->mon_capable)
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| 42 |
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| 43 | #define for_each_alloc_capable_rdt_resource(r) \
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| 44 | for_each_rdt_resource((r)) \
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| 45 | if ((r)->alloc_capable)
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| 46 |
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| 47 | #define for_each_mon_capable_rdt_resource(r) \
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| 48 | for_each_rdt_resource((r)) \
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| 49 | if ((r)->mon_capable)
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| 50 |
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| 51 | enum resctrl_res_level {
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| 52 | RDT_RESOURCE_L3,
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| 53 | RDT_RESOURCE_L2,
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| 54 | RDT_RESOURCE_MBA,
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| 55 | RDT_RESOURCE_SMBA,
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| 56 | RDT_RESOURCE_PERF_PKG,
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| 57 |
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| 58 |
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| 59 | RDT_NUM_RESOURCES,
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| 60 | };
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| 61 |
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| 62 | |
| 63 | * enum resctrl_conf_type - The type of configuration.
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| 64 | * @CDP_NONE: No prioritisation, both code and data are controlled or monitored.
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| 65 | * @CDP_CODE: Configuration applies to instruction fetches.
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| 66 | * @CDP_DATA: Configuration applies to reads and writes.
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| 67 |
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| 68 | enum resctrl_conf_type {
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| 69 | CDP_NONE,
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| 70 | CDP_CODE,
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| 71 | CDP_DATA,
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| 72 | };
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| 73 |
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| 74 | #define CDP_NUM_TYPES (CDP_DATA + 1)
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| 75 |
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| 76 | |
| 77 | * struct pseudo_lock_region - pseudo-lock region information
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| 78 | * @s: Resctrl schema for the resource to which this
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| 79 | * pseudo-locked region belongs
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| 80 | * @closid: The closid that this pseudo-locked region uses
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| 81 | * @d: RDT domain to which this pseudo-locked region
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| 82 | * belongs
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| 83 | * @cbm: bitmask of the pseudo-locked region
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| 84 | * @lock_thread_wq: waitqueue used to wait on the pseudo-locking thread
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| 85 | * completion
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| 86 | * @thread_done: variable used by waitqueue to test if pseudo-locking
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| 87 | * thread completed
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| 88 | * @cpu: core associated with the cache on which the setup code
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| 89 | * will be run
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| 90 | * @line_size: size of the cache lines
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| 91 | * @size: size of pseudo-locked region in bytes
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| 92 | * @kmem: the kernel memory associated with pseudo-locked region
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| 93 | * @minor: minor number of character device associated with this
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| 94 | * region
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| 95 | * @debugfs_dir: pointer to this region's directory in the debugfs
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| 96 | * filesystem
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| 97 | * @pm_reqs: Power management QoS requests related to this region
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| 98 |
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| 99 | struct pseudo_lock_region {
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| 100 | struct resctrl_schema *s;
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| 101 | u32 closid;
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| 102 | struct rdt_ctrl_domain *d;
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| 103 | u32 cbm;
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| 104 | wait_queue_head_t lock_thread_wq;
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| 105 | int thread_done;
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| 106 | int cpu;
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| 107 | unsigned int line_size;
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| 108 | unsigned int size;
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| 109 | void *kmem;
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| 110 | unsigned int minor;
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| 111 | struct dentry *debugfs_dir;
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| 112 | struct list_head pm_reqs;
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| 113 | };
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| 114 |
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| 115 | |
| 116 | * struct resctrl_staged_config - parsed configuration to be applied
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| 117 | * @new_ctrl: new ctrl value to be loaded
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| 118 | * @have_new_ctrl: whether the user provided new_ctrl is valid
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| 119 |
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| 120 | struct resctrl_staged_config {
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| 121 | u32 new_ctrl;
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| 122 | bool have_new_ctrl;
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| 123 | };
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| 124 |
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| 125 | enum resctrl_domain_type {
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| 126 | RESCTRL_CTRL_DOMAIN,
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| 127 | RESCTRL_MON_DOMAIN,
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| 128 | };
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| 129 |
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| 130 | |
| 131 | * struct rdt_domain_hdr - common header for different domain types
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| 132 | * @list: all instances of this resource
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| 133 | * @id: unique id for this instance
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| 134 | * @type: type of this instance
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| 135 | * @rid: resource id for this instance
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| 136 | * @cpu_mask: which CPUs share this resource
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| 137 |
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| 138 | struct rdt_domain_hdr {
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| 139 | struct list_head list;
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| 140 | int id;
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| 141 | enum resctrl_domain_type type;
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| 142 | enum resctrl_res_level rid;
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| 143 | struct cpumask cpu_mask;
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| 144 | };
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| 145 |
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| 146 | static inline bool domain_header_is_valid(struct rdt_domain_hdr *hdr,
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| 147 | enum resctrl_domain_type type,
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| 148 | enum resctrl_res_level rid)
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| 149 | {
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| 150 | return !WARN_ON_ONCE(hdr->type != type || hdr->rid != rid);
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| 151 | }
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| 152 |
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| 153 | |
| 154 | * struct rdt_ctrl_domain - group of CPUs sharing a resctrl control resource
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| 155 | * @hdr: common header for different domain types
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| 156 | * @plr: pseudo-locked region (if any) associated with domain
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| 157 | * @staged_config: parsed configuration to be applied
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| 158 | * @mbps_val: When mba_sc is enabled, this holds the array of user
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| 159 | * specified control values for mba_sc in MBps, indexed
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| 160 | * by closid
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| 161 |
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| 162 | struct rdt_ctrl_domain {
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| 163 | struct rdt_domain_hdr hdr;
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| 164 | struct pseudo_lock_region *plr;
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| 165 | struct resctrl_staged_config staged_config[CDP_NUM_TYPES];
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| 166 | u32 *mbps_val;
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| 167 | };
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| 168 |
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| 169 | |
| 170 | * struct mbm_cntr_cfg - Assignable counter configuration.
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| 171 | * @evtid: MBM event to which the counter is assigned. Only valid
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| 172 | * if @rdtgroup is not NULL.
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| 173 | * @rdtgrp: resctrl group assigned to the counter. NULL if the
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| 174 | * counter is free.
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| 175 |
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| 176 | struct mbm_cntr_cfg {
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| 177 | enum resctrl_event_id evtid;
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| 178 | struct rdtgroup *rdtgrp;
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| 179 | };
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| 180 |
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| 181 | |
| 182 | * struct rdt_l3_mon_domain - group of CPUs sharing RDT_RESOURCE_L3 monitoring
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| 183 | * @hdr: common header for different domain types
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| 184 | * @ci_id: cache info id for this domain
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| 185 | * @rmid_busy_llc: bitmap of which limbo RMIDs are above threshold
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| 186 | * @mbm_states: Per-event pointer to the MBM event's saved state.
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| 187 | * An MBM event's state is an array of struct mbm_state
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| 188 | * indexed by RMID on x86 or combined CLOSID, RMID on Arm.
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| 189 | * @mbm_over: worker to periodically read MBM h/w counters
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| 190 | * @cqm_limbo: worker to periodically read CQM h/w counters
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| 191 | * @mbm_work_cpu: worker CPU for MBM h/w counters
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| 192 | * @cqm_work_cpu: worker CPU for CQM h/w counters
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| 193 | * @cntr_cfg: array of assignable counters' configuration (indexed
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| 194 | * by counter ID)
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| 195 |
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| 196 | struct rdt_l3_mon_domain {
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| 197 | struct rdt_domain_hdr hdr;
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| 198 | unsigned int ci_id;
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| 199 | unsigned long *rmid_busy_llc;
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| 200 | struct mbm_state *mbm_states[QOS_NUM_L3_MBM_EVENTS];
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| 201 | struct delayed_work mbm_over;
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| 202 | struct delayed_work cqm_limbo;
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| 203 | int mbm_work_cpu;
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| 204 | int cqm_work_cpu;
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| 205 | struct mbm_cntr_cfg *cntr_cfg;
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| 206 | };
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| 207 |
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| 208 | |
| 209 | * struct resctrl_cache - Cache allocation related data
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| 210 | * @cbm_len: Length of the cache bit mask
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| 211 | * @min_cbm_bits: Minimum number of consecutive bits to be set.
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| 212 | * The value 0 means the architecture can support
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| 213 | * zero CBM.
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| 214 | * @shareable_bits: Bitmask of shareable resource with other
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| 215 | * executing entities
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| 216 | * @arch_has_sparse_bitmasks: True if a bitmask like f00f is valid.
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| 217 | * @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache
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| 218 | * level has CPU scope.
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| 219 | * @io_alloc_capable: True if portion of the cache can be configured
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| 220 | * for I/O traffic.
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| 221 |
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| 222 | struct resctrl_cache {
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| 223 | unsigned int cbm_len;
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| 224 | unsigned int min_cbm_bits;
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| 225 | unsigned int shareable_bits;
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| 226 | bool arch_has_sparse_bitmasks;
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| 227 | bool arch_has_per_cpu_cfg;
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| 228 | bool io_alloc_capable;
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| 229 | };
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| 230 |
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| 231 | |
| 232 | * enum membw_throttle_mode - System's memory bandwidth throttling mode
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| 233 | * @THREAD_THROTTLE_UNDEFINED: Not relevant to the system
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| 234 | * @THREAD_THROTTLE_MAX: Memory bandwidth is throttled at the core
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| 235 | * always using smallest bandwidth percentage
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| 236 | * assigned to threads, aka "max throttling"
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| 237 | * @THREAD_THROTTLE_PER_THREAD: Memory bandwidth is throttled at the thread
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| 238 |
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| 239 | enum membw_throttle_mode {
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| 240 | THREAD_THROTTLE_UNDEFINED = 0,
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| 241 | THREAD_THROTTLE_MAX,
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| 242 | THREAD_THROTTLE_PER_THREAD,
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| 243 | };
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| 244 |
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| 245 | |
| 246 | * struct resctrl_membw - Memory bandwidth allocation related data
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| 247 | * @min_bw: Minimum memory bandwidth percentage user can request
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| 248 | * @max_bw: Maximum memory bandwidth value, used as the reset value
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| 249 | * @bw_gran: Granularity at which the memory bandwidth is allocated
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| 250 | * @delay_linear: True if memory B/W delay is in linear scale
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| 251 | * @arch_needs_linear: True if we can't configure non-linear resources
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| 252 | * @throttle_mode: Bandwidth throttling mode when threads request
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| 253 | * different memory bandwidths
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| 254 | * @mba_sc: True if MBA software controller(mba_sc) is enabled
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| 255 | * @mb_map: Mapping of memory B/W percentage to memory B/W delay
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| 256 |
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| 257 | struct resctrl_membw {
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| 258 | u32 min_bw;
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| 259 | u32 max_bw;
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| 260 | u32 bw_gran;
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| 261 | u32 delay_linear;
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| 262 | bool arch_needs_linear;
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| 263 | enum membw_throttle_mode throttle_mode;
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| 264 | bool mba_sc;
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| 265 | u32 *mb_map;
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| 266 | };
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| 267 |
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| 268 | struct resctrl_schema;
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| 269 |
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| 270 | enum resctrl_scope {
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| 271 | RESCTRL_L2_CACHE = 2,
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| 272 | RESCTRL_L3_CACHE = 3,
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| 273 | RESCTRL_L3_NODE,
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| 274 | RESCTRL_PACKAGE,
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| 275 | };
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| 276 |
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| 277 | |
| 278 | * enum resctrl_schema_fmt - The format user-space provides for a schema.
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| 279 | * @RESCTRL_SCHEMA_BITMAP: The schema is a bitmap in hex.
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| 280 | * @RESCTRL_SCHEMA_RANGE: The schema is a decimal number.
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| 281 |
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| 282 | enum resctrl_schema_fmt {
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| 283 | RESCTRL_SCHEMA_BITMAP,
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| 284 | RESCTRL_SCHEMA_RANGE,
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| 285 | };
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| 286 |
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| 287 | |
| 288 | * struct resctrl_mon - Monitoring related data of a resctrl resource.
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| 289 | * @num_rmid: Number of RMIDs available.
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| 290 | * @mbm_cfg_mask: Memory transactions that can be tracked when bandwidth
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| 291 | * monitoring events can be configured.
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| 292 | * @num_mbm_cntrs: Number of assignable counters.
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| 293 | * @mbm_cntr_assignable:Is system capable of supporting counter assignment?
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| 294 | * @mbm_assign_on_mkdir:True if counters should automatically be assigned to MBM
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| 295 | * events of monitor groups created via mkdir.
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| 296 |
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| 297 | struct resctrl_mon {
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| 298 | u32 num_rmid;
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| 299 | unsigned int mbm_cfg_mask;
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| 300 | int num_mbm_cntrs;
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| 301 | bool mbm_cntr_assignable;
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| 302 | bool mbm_assign_on_mkdir;
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| 303 | };
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| 304 |
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| 305 | |
| 306 | * struct rdt_resource - attributes of a resctrl resource
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| 307 | * @rid: The index of the resource
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| 308 | * @alloc_capable: Is allocation available on this machine
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| 309 | * @mon_capable: Is monitor feature available on this machine
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| 310 | * @ctrl_scope: Scope of this resource for control functions
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| 311 | * @mon_scope: Scope of this resource for monitor functions
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| 312 | * @cache: Cache allocation related data
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| 313 | * @membw: If the component has bandwidth controls, their properties.
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| 314 | * @mon: Monitoring related data.
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| 315 | * @ctrl_domains: RCU list of all control domains for this resource
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| 316 | * @mon_domains: RCU list of all monitor domains for this resource
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| 317 | * @name: Name to use in "schemata" file.
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| 318 | * @schema_fmt: Which format string and parser is used for this schema.
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| 319 | * @cdp_capable: Is the CDP feature available on this resource
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| 320 |
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| 321 | struct rdt_resource {
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| 322 | int rid;
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| 323 | bool alloc_capable;
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| 324 | bool mon_capable;
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| 325 | enum resctrl_scope ctrl_scope;
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| 326 | enum resctrl_scope mon_scope;
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| 327 | struct resctrl_cache cache;
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| 328 | struct resctrl_membw membw;
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| 329 | struct resctrl_mon mon;
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| 330 | struct list_head ctrl_domains;
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| 331 | struct list_head mon_domains;
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| 332 | char *name;
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| 333 | enum resctrl_schema_fmt schema_fmt;
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| 334 | bool cdp_capable;
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| 335 | };
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| 336 |
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| 337 | |
| 338 | * Get the resource that exists at this level. If the level is not supported
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| 339 | * a dummy/not-capable resource can be returned. Levels >= RDT_NUM_RESOURCES
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| 340 | * will return NULL.
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| 341 |
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| 342 | struct rdt_resource *resctrl_arch_get_resource(enum resctrl_res_level l);
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| 343 |
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| 344 | |
| 345 | * struct resctrl_schema - configuration abilities of a resource presented to
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| 346 | * user-space
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| 347 | * @list: Member of resctrl_schema_all.
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| 348 | * @name: The name to use in the "schemata" file.
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| 349 | * @fmt_str: Format string to show domain value.
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| 350 | * @conf_type: Whether this schema is specific to code/data.
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| 351 | * @res: The resource structure exported by the architecture to describe
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| 352 | * the hardware that is configured by this schema.
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| 353 | * @num_closid: The number of closid that can be used with this schema. When
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| 354 | * features like CDP are enabled, this will be lower than the
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| 355 | * hardware supports for the resource.
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| 356 |
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| 357 | struct resctrl_schema {
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| 358 | struct list_head list;
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| 359 | char name[8];
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| 360 | const char *fmt_str;
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| 361 | enum resctrl_conf_type conf_type;
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| 362 | struct rdt_resource *res;
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| 363 | u32 num_closid;
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| 364 | };
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| 365 |
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| 366 | struct resctrl_cpu_defaults {
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| 367 | u32 closid;
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| 368 | u32 rmid;
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| 369 | };
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| 370 |
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| 371 | struct resctrl_mon_config_info {
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| 372 | struct rdt_resource *r;
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| 373 | struct rdt_l3_mon_domain *d;
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| 374 | u32 evtid;
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| 375 | u32 mon_config;
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| 376 | };
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| 377 |
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| 378 | |
| 379 | * resctrl_arch_sync_cpu_closid_rmid() - Refresh this CPU's CLOSID and RMID.
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| 380 | * Call via IPI.
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| 381 | * @info: If non-NULL, a pointer to a struct resctrl_cpu_defaults
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| 382 | * specifying the new CLOSID and RMID for tasks in the default
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| 383 | * resctrl ctrl and mon group when running on this CPU. If NULL,
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| 384 | * this CPU is not re-assigned to a different default group.
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| 385 | *
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| 386 | * Propagates reassignment of CPUs and/or tasks to different resctrl groups
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| 387 | * when requested by the resctrl core code.
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| 388 | *
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| 389 | * This function records the per-cpu defaults specified by @info (if any),
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| 390 | * and then reconfigures the CPU's hardware CLOSID and RMID for subsequent
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| 391 | * execution based on @current, in the same way as during a task switch.
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| 392 |
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| 393 | void resctrl_arch_sync_cpu_closid_rmid(void *info);
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| 394 |
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| 395 | |
| 396 | * resctrl_get_default_ctrl() - Return the default control value for this
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| 397 | * resource.
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| 398 | * @r: The resource whose default control type is queried.
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| 399 |
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| 400 | static inline u32 resctrl_get_default_ctrl(struct rdt_resource *r)
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| 401 | {
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| 402 | switch (r->schema_fmt) {
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| 403 | case RESCTRL_SCHEMA_BITMAP:
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| 404 | return BIT_MASK(r->cache.cbm_len) - 1;
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| 405 | case RESCTRL_SCHEMA_RANGE:
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| 406 | return r->membw.max_bw;
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| 407 | }
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| 408 |
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| 409 | return WARN_ON_ONCE(1);
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| 410 | }
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| 411 |
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| 412 |
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| 413 | u32 resctrl_arch_get_num_closid(struct rdt_resource *r);
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| 414 | u32 resctrl_arch_system_num_rmid_idx(void);
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| 415 | int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid);
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| 416 |
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| 417 | bool resctrl_enable_mon_event(enum resctrl_event_id eventid, bool any_cpu,
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| 418 | unsigned int binary_bits, void *arch_priv);
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| 419 |
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| 420 | bool resctrl_is_mon_event_enabled(enum resctrl_event_id eventid);
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| 421 |
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| 422 | bool resctrl_arch_is_evt_configurable(enum resctrl_event_id evt);
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| 423 |
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| 424 | static inline bool resctrl_is_mbm_event(enum resctrl_event_id eventid)
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| 425 | {
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| 426 | return (eventid >= QOS_L3_MBM_TOTAL_EVENT_ID &&
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| 427 | eventid <= QOS_L3_MBM_LOCAL_EVENT_ID);
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| 428 | }
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| 429 |
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| 430 | u32 resctrl_get_mon_evt_cfg(enum resctrl_event_id eventid);
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| 431 |
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| 432 |
|
| 433 | #define for_each_mbm_event_id(eventid) \
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| 434 | for (eventid = QOS_L3_MBM_TOTAL_EVENT_ID; \
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| 435 | eventid <= QOS_L3_MBM_LOCAL_EVENT_ID; eventid++)
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| 436 |
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| 437 |
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| 438 | #define for_each_mbm_idx(idx) \
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| 439 | for (idx = 0; idx < QOS_NUM_L3_MBM_EVENTS; idx++)
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| 440 |
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| 441 | |
| 442 | * resctrl_arch_mon_event_config_write() - Write the config for an event.
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| 443 | * @config_info: struct resctrl_mon_config_info describing the resource, domain
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| 444 | * and event.
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| 445 | *
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| 446 | * Reads resource, domain and eventid from @config_info and writes the
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| 447 | * event config_info->mon_config into hardware.
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| 448 | *
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| 449 | * Called via IPI to reach a CPU that is a member of the specified domain.
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| 450 |
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| 451 | void resctrl_arch_mon_event_config_write(void *config_info);
|
| 452 |
|
| 453 | |
| 454 | * resctrl_arch_mon_event_config_read() - Read the config for an event.
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| 455 | * @config_info: struct resctrl_mon_config_info describing the resource, domain
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| 456 | * and event.
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| 457 | *
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| 458 | * Reads resource, domain and eventid from @config_info and reads the
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| 459 | * hardware config value into config_info->mon_config.
|
| 460 | *
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| 461 | * Called via IPI to reach a CPU that is a member of the specified domain.
|
| 462 |
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| 463 | void resctrl_arch_mon_event_config_read(void *config_info);
|
| 464 |
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| 465 |
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| 466 | static inline u32 resctrl_get_config_index(u32 closid,
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| 467 | enum resctrl_conf_type type)
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| 468 | {
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| 469 | switch (type) {
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| 470 | default:
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| 471 | case CDP_NONE:
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| 472 | return closid;
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| 473 | case CDP_CODE:
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| 474 | return closid * 2 + 1;
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| 475 | case CDP_DATA:
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| 476 | return closid * 2;
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| 477 | }
|
| 478 | }
|
| 479 |
|
| 480 | bool resctrl_arch_get_cdp_enabled(enum resctrl_res_level l);
|
| 481 | int resctrl_arch_set_cdp_enabled(enum resctrl_res_level l, bool enable);
|
| 482 |
|
| 483 | |
| 484 | * resctrl_arch_mbm_cntr_assign_enabled() - Check if MBM counter assignment
|
| 485 | * mode is enabled.
|
| 486 | * @r: Pointer to the resource structure.
|
| 487 | *
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| 488 | * Return:
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| 489 | * true if the assignment mode is enabled, false otherwise.
|
| 490 |
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| 491 | bool resctrl_arch_mbm_cntr_assign_enabled(struct rdt_resource *r);
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| 492 |
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| 493 | |
| 494 | * resctrl_arch_mbm_cntr_assign_set() - Configure the MBM counter assignment mode.
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| 495 | * @r: Pointer to the resource structure.
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| 496 | * @enable: Set to true to enable, false to disable the assignment mode.
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| 497 | *
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| 498 | * Return:
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| 499 | * 0 on success, < 0 on error.
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| 500 |
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| 501 | int resctrl_arch_mbm_cntr_assign_set(struct rdt_resource *r, bool enable);
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| 502 |
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| 503 | |
| 504 | * Update the ctrl_val and apply this config right now.
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| 505 | * Must be called on one of the domain's CPUs.
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| 506 |
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| 507 | int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_ctrl_domain *d,
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| 508 | u32 closid, enum resctrl_conf_type t, u32 cfg_val);
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| 509 |
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| 510 | u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_ctrl_domain *d,
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| 511 | u32 closid, enum resctrl_conf_type type);
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| 512 | int resctrl_online_ctrl_domain(struct rdt_resource *r, struct rdt_ctrl_domain *d);
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| 513 | int resctrl_online_mon_domain(struct rdt_resource *r, struct rdt_domain_hdr *hdr);
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| 514 | void resctrl_offline_ctrl_domain(struct rdt_resource *r, struct rdt_ctrl_domain *d);
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| 515 | void resctrl_offline_mon_domain(struct rdt_resource *r, struct rdt_domain_hdr *hdr);
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| 516 | void resctrl_online_cpu(unsigned int cpu);
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| 517 | void resctrl_offline_cpu(unsigned int cpu);
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| 518 |
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| 519 | |
| 520 | * Architecture hook called at beginning of first file system mount attempt.
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| 521 | * No locks are held.
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| 522 |
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| 523 | void resctrl_arch_pre_mount(void);
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| 524 |
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| 525 | |
| 526 | * resctrl_arch_rmid_read() - Read the eventid counter corresponding to rmid
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| 527 | * for this resource and domain.
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| 528 | * @r: resource that the counter should be read from.
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| 529 | * @hdr: Header of domain that the counter should be read from.
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| 530 | * @closid: closid that matches the rmid. Depending on the architecture, the
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| 531 | * counter may match traffic of both @closid and @rmid, or @rmid
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| 532 | * only.
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| 533 | * @rmid: rmid of the counter to read.
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| 534 | * @eventid: eventid to read, e.g. L3 occupancy.
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| 535 | * @arch_priv: Architecture private data for this event.
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| 536 | * The @arch_priv provided by the architecture via
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| 537 | * resctrl_enable_mon_event().
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| 538 | * @val: result of the counter read in bytes.
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| 539 | * @arch_mon_ctx: An architecture specific value from
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| 540 | * resctrl_arch_mon_ctx_alloc(), for MPAM this identifies
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| 541 | * the hardware monitor allocated for this read request.
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| 542 | *
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| 543 | * Some architectures need to sleep when first programming some of the counters.
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| 544 | * (specifically: arm64's MPAM cache occupancy counters can return 'not ready'
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| 545 | * for a short period of time). Call from a non-migrateable process context on
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| 546 | * a CPU that belongs to domain @d. e.g. use smp_call_on_cpu() or
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| 547 | * schedule_work_on(). This function can be called with interrupts masked,
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| 548 | * e.g. using smp_call_function_any(), but may consistently return an error.
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| 549 | *
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| 550 | * Return:
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| 551 | * 0 on success, or -EIO, -EINVAL etc on error.
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| 552 |
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| 553 | int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain_hdr *hdr,
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| 554 | u32 closid, u32 rmid, enum resctrl_event_id eventid,
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| 555 | void *arch_priv, u64 *val, void *arch_mon_ctx);
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| 556 |
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| 557 | |
| 558 | * resctrl_arch_rmid_read_context_check() - warn about invalid contexts
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| 559 | *
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| 560 | * When built with CONFIG_DEBUG_ATOMIC_SLEEP generate a warning when
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| 561 | * resctrl_arch_rmid_read() is called with preemption disabled.
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| 562 | *
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| 563 | * The contract with resctrl_arch_rmid_read() is that if interrupts
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| 564 | * are unmasked, it can sleep. This allows NOHZ_FULL systems to use an
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| 565 | * IPI, (and fail if the call needed to sleep), while most of the time
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| 566 | * the work is scheduled, allowing the call to sleep.
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| 567 |
|
| 568 | static inline void resctrl_arch_rmid_read_context_check(void)
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| 569 | {
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| 570 | if (!irqs_disabled())
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| 571 | might_sleep();
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| 572 | }
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| 573 |
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| 574 | |
| 575 | * resctrl_find_domain() - Search for a domain id in a resource domain list.
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| 576 | * @h: The domain list to search.
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| 577 | * @id: The domain id to search for.
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| 578 | * @pos: A pointer to position in the list id should be inserted.
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| 579 | *
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| 580 | * Search the domain list to find the domain id. If the domain id is
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| 581 | * found, return the domain. NULL otherwise. If the domain id is not
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| 582 | * found (and NULL returned) then the first domain with id bigger than
|
| 583 | * the input id can be returned to the caller via @pos.
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| 584 |
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| 585 | struct rdt_domain_hdr *resctrl_find_domain(struct list_head *h, int id,
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| 586 | struct list_head **pos);
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| 587 |
|
| 588 | |
| 589 | * resctrl_arch_reset_rmid() - Reset any private state associated with rmid
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| 590 | * and eventid.
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| 591 | * @r: The domain's resource.
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| 592 | * @d: The rmid's domain.
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| 593 | * @closid: closid that matches the rmid. Depending on the architecture, the
|
| 594 | * counter may match traffic of both @closid and @rmid, or @rmid only.
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| 595 | * @rmid: The rmid whose counter values should be reset.
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| 596 | * @eventid: The eventid whose counter values should be reset.
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| 597 | *
|
| 598 | * This can be called from any CPU.
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| 599 |
|
| 600 | void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_l3_mon_domain *d,
|
| 601 | u32 closid, u32 rmid,
|
| 602 | enum resctrl_event_id eventid);
|
| 603 |
|
| 604 | |
| 605 | * resctrl_arch_reset_rmid_all() - Reset all private state associated with
|
| 606 | * all rmids and eventids.
|
| 607 | * @r: The resctrl resource.
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| 608 | * @d: The domain for which all architectural counter state will
|
| 609 | * be cleared.
|
| 610 | *
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| 611 | * This can be called from any CPU.
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| 612 |
|
| 613 | void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_l3_mon_domain *d);
|
| 614 |
|
| 615 | |
| 616 | * resctrl_arch_reset_all_ctrls() - Reset the control for each CLOSID to its
|
| 617 | * default.
|
| 618 | * @r: The resctrl resource to reset.
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| 619 | *
|
| 620 | * This can be called from any CPU.
|
| 621 |
|
| 622 | void resctrl_arch_reset_all_ctrls(struct rdt_resource *r);
|
| 623 |
|
| 624 | |
| 625 | * resctrl_arch_config_cntr() - Configure the counter with its new RMID
|
| 626 | * and event details.
|
| 627 | * @r: Resource structure.
|
| 628 | * @d: The domain in which counter with ID @cntr_id should be configured.
|
| 629 | * @evtid: Monitoring event type (e.g., QOS_L3_MBM_TOTAL_EVENT_ID
|
| 630 | * or QOS_L3_MBM_LOCAL_EVENT_ID).
|
| 631 | * @rmid: RMID.
|
| 632 | * @closid: CLOSID.
|
| 633 | * @cntr_id: Counter ID to configure.
|
| 634 | * @assign: True to assign the counter or update an existing assignment,
|
| 635 | * false to unassign the counter.
|
| 636 | *
|
| 637 | * This can be called from any CPU.
|
| 638 |
|
| 639 | void resctrl_arch_config_cntr(struct rdt_resource *r, struct rdt_l3_mon_domain *d,
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| 640 | enum resctrl_event_id evtid, u32 rmid, u32 closid,
|
| 641 | u32 cntr_id, bool assign);
|
| 642 |
|
| 643 | |
| 644 | * resctrl_arch_cntr_read() - Read the event data corresponding to the counter ID
|
| 645 | * assigned to the RMID, event pair for this resource
|
| 646 | * and domain.
|
| 647 | * @r: Resource that the counter should be read from.
|
| 648 | * @d: Domain that the counter should be read from.
|
| 649 | * @closid: CLOSID that matches the RMID.
|
| 650 | * @rmid: The RMID to which @cntr_id is assigned.
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| 651 | * @cntr_id: The counter to read.
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| 652 | * @eventid: The MBM event to which @cntr_id is assigned.
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| 653 | * @val: Result of the counter read in bytes.
|
| 654 | *
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| 655 | * Called on a CPU that belongs to domain @d when "mbm_event" mode is enabled.
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| 656 | * Called from a non-migrateable process context via smp_call_on_cpu() unless all
|
| 657 | * CPUs are nohz_full, in which case it is called via IPI (smp_call_function_any()).
|
| 658 | *
|
| 659 | * Return:
|
| 660 | * 0 on success, or -EIO, -EINVAL etc on error.
|
| 661 |
|
| 662 | int resctrl_arch_cntr_read(struct rdt_resource *r, struct rdt_l3_mon_domain *d,
|
| 663 | u32 closid, u32 rmid, int cntr_id,
|
| 664 | enum resctrl_event_id eventid, u64 *val);
|
| 665 |
|
| 666 | |
| 667 | * resctrl_arch_reset_cntr() - Reset any private state associated with counter ID.
|
| 668 | * @r: The domain's resource.
|
| 669 | * @d: The counter ID's domain.
|
| 670 | * @closid: CLOSID that matches the RMID.
|
| 671 | * @rmid: The RMID to which @cntr_id is assigned.
|
| 672 | * @cntr_id: The counter to reset.
|
| 673 | * @eventid: The MBM event to which @cntr_id is assigned.
|
| 674 | *
|
| 675 | * This can be called from any CPU.
|
| 676 |
|
| 677 | void resctrl_arch_reset_cntr(struct rdt_resource *r, struct rdt_l3_mon_domain *d,
|
| 678 | u32 closid, u32 rmid, int cntr_id,
|
| 679 | enum resctrl_event_id eventid);
|
| 680 |
|
| 681 | |
| 682 | * resctrl_arch_io_alloc_enable() - Enable/disable io_alloc feature.
|
| 683 | * @r: The resctrl resource.
|
| 684 | * @enable: Enable (true) or disable (false) io_alloc on resource @r.
|
| 685 | *
|
| 686 | * This can be called from any CPU.
|
| 687 | *
|
| 688 | * Return:
|
| 689 | * 0 on success, <0 on error.
|
| 690 |
|
| 691 | int resctrl_arch_io_alloc_enable(struct rdt_resource *r, bool enable);
|
| 692 |
|
| 693 | |
| 694 | * resctrl_arch_get_io_alloc_enabled() - Get io_alloc feature state.
|
| 695 | * @r: The resctrl resource.
|
| 696 | *
|
| 697 | * Return:
|
| 698 | * true if io_alloc is enabled or false if disabled.
|
| 699 |
|
| 700 | bool resctrl_arch_get_io_alloc_enabled(struct rdt_resource *r);
|
| 701 |
|
| 702 | extern unsigned int resctrl_rmid_realloc_threshold;
|
| 703 | extern unsigned int resctrl_rmid_realloc_limit;
|
| 704 |
|
| 705 | int resctrl_init(void);
|
| 706 | void resctrl_exit(void);
|
| 707 |
|
| 708 | #ifdef CONFIG_RESCTRL_FS_PSEUDO_LOCK
|
| 709 | u64 resctrl_arch_get_prefetch_disable_bits(void);
|
| 710 | int resctrl_arch_pseudo_lock_fn(void *_plr);
|
| 711 | int resctrl_arch_measure_cycles_lat_fn(void *_plr);
|
| 712 | int resctrl_arch_measure_l2_residency(void *_plr);
|
| 713 | int resctrl_arch_measure_l3_residency(void *_plr);
|
| 714 | #else
|
| 715 | static inline u64 resctrl_arch_get_prefetch_disable_bits(void) { return 0; }
|
| 716 | static inline int resctrl_arch_pseudo_lock_fn(void *_plr) { return 0; }
|
| 717 | static inline int resctrl_arch_measure_cycles_lat_fn(void *_plr) { return 0; }
|
| 718 | static inline int resctrl_arch_measure_l2_residency(void *_plr) { return 0; }
|
| 719 | static inline int resctrl_arch_measure_l3_residency(void *_plr) { return 0; }
|
| 720 | #endif
|
| 721 | #endif
|