| 1 | |
| 2 | * I2O user space accessible structures/APIs
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| 3 | *
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| 4 | * (c) Copyright 1999, 2000 Red Hat Software
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| 5 | *
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| 6 | * This program is free software; you can redistribute it and/or
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| 7 | * modify it under the terms of the GNU General Public License
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| 8 | * as published by the Free Software Foundation; either version
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| 9 | * 2 of the License, or (at your option) any later version.
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| 10 | *
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| 11 | *************************************************************************
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| 12 | *
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| 13 | * This header file defines the I2O APIs that are available to both
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| 14 | * the kernel and user level applications. Kernel specific structures
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| 15 | * are defined in i2o_osm. OSMs should include _only_ i2o_osm.h which
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| 16 | * automatically includes this file.
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| 17 | *
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| 18 |
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| 19 |
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| 20 | #ifndef _I2O_DEV_H
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| 21 | #define _I2O_DEV_H
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| 22 |
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| 23 |
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| 24 | #define MAX_I2O_CONTROLLERS 32
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| 25 |
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| 26 | #include <linux/ioctl.h>
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| 27 | #include <linux/types.h>
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| 28 |
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| 29 | |
| 30 | * I2O Control IOCTLs and structures
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| 31 |
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| 32 | #define I2O_MAGIC_NUMBER 'i'
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| 33 | #define I2OGETIOPS _IOR(I2O_MAGIC_NUMBER,0,__u8[MAX_I2O_CONTROLLERS])
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| 34 | #define I2OHRTGET _IOWR(I2O_MAGIC_NUMBER,1,struct i2o_cmd_hrtlct)
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| 35 | #define I2OLCTGET _IOWR(I2O_MAGIC_NUMBER,2,struct i2o_cmd_hrtlct)
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| 36 | #define I2OPARMSET _IOWR(I2O_MAGIC_NUMBER,3,struct i2o_cmd_psetget)
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| 37 | #define I2OPARMGET _IOWR(I2O_MAGIC_NUMBER,4,struct i2o_cmd_psetget)
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| 38 | #define I2OSWDL _IOWR(I2O_MAGIC_NUMBER,5,struct i2o_sw_xfer)
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| 39 | #define I2OSWUL _IOWR(I2O_MAGIC_NUMBER,6,struct i2o_sw_xfer)
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| 40 | #define I2OSWDEL _IOWR(I2O_MAGIC_NUMBER,7,struct i2o_sw_xfer)
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| 41 | #define I2OVALIDATE _IOR(I2O_MAGIC_NUMBER,8,__u32)
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| 42 | #define I2OHTML _IOWR(I2O_MAGIC_NUMBER,9,struct i2o_html)
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| 43 | #define I2OEVTREG _IOW(I2O_MAGIC_NUMBER,10,struct i2o_evt_id)
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| 44 | #define I2OEVTGET _IOR(I2O_MAGIC_NUMBER,11,struct i2o_evt_info)
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| 45 | #define I2OPASSTHRU _IOR(I2O_MAGIC_NUMBER,12,struct i2o_cmd_passthru)
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| 46 | #define I2OPASSTHRU32 _IOR(I2O_MAGIC_NUMBER,12,struct i2o_cmd_passthru32)
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| 47 |
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| 48 | struct i2o_cmd_passthru32 {
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| 49 | unsigned int iop;
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| 50 | __u32 msg;
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| 51 | };
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| 52 |
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| 53 | struct i2o_cmd_passthru {
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| 54 | unsigned int iop;
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| 55 | void __user *msg;
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| 56 | };
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| 57 |
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| 58 | struct i2o_cmd_hrtlct {
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| 59 | unsigned int iop;
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| 60 | void __user *resbuf;
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| 61 | unsigned int __user *reslen;
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| 62 | };
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| 63 |
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| 64 | struct i2o_cmd_psetget {
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| 65 | unsigned int iop;
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| 66 | unsigned int tid;
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| 67 | void __user *opbuf;
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| 68 | unsigned int oplen;
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| 69 | void __user *resbuf;
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| 70 | unsigned int __user *reslen;
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| 71 | };
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| 72 |
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| 73 | struct i2o_sw_xfer {
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| 74 | unsigned int iop;
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| 75 | unsigned char flags;
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| 76 | unsigned char sw_type;
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| 77 | unsigned int sw_id;
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| 78 | void __user *buf;
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| 79 | unsigned int __user *swlen;
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| 80 | unsigned int __user *maxfrag;
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| 81 | unsigned int __user *curfrag;
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| 82 | };
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| 83 |
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| 84 | struct i2o_html {
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| 85 | unsigned int iop;
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| 86 | unsigned int tid;
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| 87 | unsigned int page;
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| 88 | void __user *resbuf;
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| 89 | unsigned int __user *reslen;
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| 90 | void __user *qbuf;
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| 91 | unsigned int qlen;
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| 92 | };
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| 93 |
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| 94 | #define I2O_EVT_Q_LEN 32
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| 95 |
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| 96 | struct i2o_evt_id {
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| 97 | unsigned int iop;
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| 98 | unsigned int tid;
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| 99 | unsigned int evt_mask;
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| 100 | };
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| 101 |
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| 102 |
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| 103 | #define I2O_EVT_DATA_SIZE 88
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| 104 |
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| 105 | struct i2o_evt_info {
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| 106 | struct i2o_evt_id id;
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| 107 | unsigned char evt_data[I2O_EVT_DATA_SIZE];
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| 108 | unsigned int data_size;
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| 109 | };
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| 110 |
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| 111 | struct i2o_evt_get {
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| 112 | struct i2o_evt_info info;
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| 113 | int pending;
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| 114 | int lost;
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| 115 | };
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| 116 |
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| 117 | typedef struct i2o_sg_io_hdr {
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| 118 | unsigned int flags;
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| 119 | } i2o_sg_io_hdr_t;
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| 120 |
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| 121 | |
| 122 | * HRT related constants and structures
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| 123 | *************************************************************************
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| 124 | #define I2O_BUS_LOCAL 0
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| 125 | #define I2O_BUS_ISA 1
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| 126 | #define I2O_BUS_EISA 2
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| 127 |
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| 128 | #define I2O_BUS_PCI 4
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| 129 | #define I2O_BUS_PCMCIA 5
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| 130 | #define I2O_BUS_NUBUS 6
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| 131 | #define I2O_BUS_CARDBUS 7
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| 132 | #define I2O_BUS_UNKNOWN 0x80
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| 133 |
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| 134 | typedef struct _i2o_pci_bus {
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| 135 | __u8 PciFunctionNumber;
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| 136 | __u8 PciDeviceNumber;
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| 137 | __u8 PciBusNumber;
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| 138 | __u8 reserved;
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| 139 | __u16 PciVendorID;
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| 140 | __u16 PciDeviceID;
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| 141 | } i2o_pci_bus;
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| 142 |
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| 143 | typedef struct _i2o_local_bus {
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| 144 | __u16 LbBaseIOPort;
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| 145 | __u16 reserved;
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| 146 | __u32 LbBaseMemoryAddress;
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| 147 | } i2o_local_bus;
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| 148 |
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| 149 | typedef struct _i2o_isa_bus {
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| 150 | __u16 IsaBaseIOPort;
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| 151 | __u8 CSN;
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| 152 | __u8 reserved;
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| 153 | __u32 IsaBaseMemoryAddress;
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| 154 | } i2o_isa_bus;
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| 155 |
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| 156 | typedef struct _i2o_eisa_bus_info {
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| 157 | __u16 EisaBaseIOPort;
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| 158 | __u8 reserved;
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| 159 | __u8 EisaSlotNumber;
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| 160 | __u32 EisaBaseMemoryAddress;
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| 161 | } i2o_eisa_bus;
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| 162 |
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| 163 | typedef struct _i2o_mca_bus {
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| 164 | __u16 McaBaseIOPort;
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| 165 | __u8 reserved;
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| 166 | __u8 McaSlotNumber;
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| 167 | __u32 McaBaseMemoryAddress;
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| 168 | } i2o_mca_bus;
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| 169 |
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| 170 | typedef struct _i2o_other_bus {
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| 171 | __u16 BaseIOPort;
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| 172 | __u16 reserved;
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| 173 | __u32 BaseMemoryAddress;
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| 174 | } i2o_other_bus;
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| 175 |
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| 176 | typedef struct _i2o_hrt_entry {
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| 177 | __u32 adapter_id;
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| 178 | __u32 parent_tid:12;
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| 179 | __u32 state:4;
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| 180 | __u32 bus_num:8;
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| 181 | __u32 bus_type:8;
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| 182 | union {
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| 183 | i2o_pci_bus pci_bus;
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| 184 | i2o_local_bus local_bus;
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| 185 | i2o_isa_bus isa_bus;
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| 186 | i2o_eisa_bus eisa_bus;
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| 187 | i2o_mca_bus mca_bus;
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| 188 | i2o_other_bus other_bus;
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| 189 | } bus;
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| 190 | } i2o_hrt_entry;
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| 191 |
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| 192 | typedef struct _i2o_hrt {
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| 193 | __u16 num_entries;
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| 194 | __u8 entry_len;
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| 195 | __u8 hrt_version;
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| 196 | __u32 change_ind;
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| 197 | i2o_hrt_entry hrt_entry[1];
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| 198 | } i2o_hrt;
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| 199 |
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| 200 | typedef struct _i2o_lct_entry {
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| 201 | __u32 entry_size:16;
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| 202 | __u32 tid:12;
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| 203 | __u32 reserved:4;
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| 204 | __u32 change_ind;
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| 205 | __u32 device_flags;
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| 206 | __u32 class_id:12;
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| 207 | __u32 version:4;
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| 208 | __u32 vendor_id:16;
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| 209 | __u32 sub_class;
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| 210 | __u32 user_tid:12;
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| 211 | __u32 parent_tid:12;
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| 212 | __u32 bios_info:8;
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| 213 | __u8 identity_tag[8];
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| 214 | __u32 event_capabilities;
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| 215 | } i2o_lct_entry;
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| 216 |
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| 217 | typedef struct _i2o_lct {
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| 218 | __u32 table_size:16;
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| 219 | __u32 boot_tid:12;
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| 220 | __u32 lct_ver:4;
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| 221 | __u32 iop_flags;
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| 222 | __u32 change_ind;
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| 223 | i2o_lct_entry lct_entry[1];
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| 224 | } i2o_lct;
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| 225 |
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| 226 | typedef struct _i2o_status_block {
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| 227 | __u16 org_id;
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| 228 | __u16 reserved;
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| 229 | __u16 iop_id:12;
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| 230 | __u16 reserved1:4;
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| 231 | __u16 host_unit_id;
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| 232 | __u16 segment_number:12;
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| 233 | __u16 i2o_version:4;
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| 234 | __u8 iop_state;
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| 235 | __u8 msg_type;
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| 236 | __u16 inbound_frame_size;
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| 237 | __u8 init_code;
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| 238 | __u8 reserved2;
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| 239 | __u32 max_inbound_frames;
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| 240 | __u32 cur_inbound_frames;
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| 241 | __u32 max_outbound_frames;
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| 242 | char product_id[24];
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| 243 | __u32 expected_lct_size;
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| 244 | __u32 iop_capabilities;
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| 245 | __u32 desired_mem_size;
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| 246 | __u32 current_mem_size;
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| 247 | __u32 current_mem_base;
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| 248 | __u32 desired_io_size;
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| 249 | __u32 current_io_size;
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| 250 | __u32 current_io_base;
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| 251 | __u32 reserved3:24;
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| 252 | __u32 cmd_status:8;
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| 253 | } i2o_status_block;
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| 254 |
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| 255 |
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| 256 | #define I2O_EVT_IND_STATE_CHANGE 0x80000000
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| 257 | #define I2O_EVT_IND_GENERAL_WARNING 0x40000000
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| 258 | #define I2O_EVT_IND_CONFIGURATION_FLAG 0x20000000
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| 259 | #define I2O_EVT_IND_LOCK_RELEASE 0x10000000
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| 260 | #define I2O_EVT_IND_CAPABILITY_CHANGE 0x08000000
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| 261 | #define I2O_EVT_IND_DEVICE_RESET 0x04000000
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| 262 | #define I2O_EVT_IND_EVT_MASK_MODIFIED 0x02000000
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| 263 | #define I2O_EVT_IND_FIELD_MODIFIED 0x01000000
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| 264 | #define I2O_EVT_IND_VENDOR_EVT 0x00800000
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| 265 | #define I2O_EVT_IND_DEVICE_STATE 0x00400000
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| 266 |
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| 267 |
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| 268 | #define I2O_EVT_IND_EXEC_RESOURCE_LIMITS 0x00000001
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| 269 | #define I2O_EVT_IND_EXEC_CONNECTION_FAIL 0x00000002
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| 270 | #define I2O_EVT_IND_EXEC_ADAPTER_FAULT 0x00000004
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| 271 | #define I2O_EVT_IND_EXEC_POWER_FAIL 0x00000008
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| 272 | #define I2O_EVT_IND_EXEC_RESET_PENDING 0x00000010
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| 273 | #define I2O_EVT_IND_EXEC_RESET_IMMINENT 0x00000020
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| 274 | #define I2O_EVT_IND_EXEC_HW_FAIL 0x00000040
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| 275 | #define I2O_EVT_IND_EXEC_XCT_CHANGE 0x00000080
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| 276 | #define I2O_EVT_IND_EXEC_NEW_LCT_ENTRY 0x00000100
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| 277 | #define I2O_EVT_IND_EXEC_MODIFIED_LCT 0x00000200
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| 278 | #define I2O_EVT_IND_EXEC_DDM_AVAILABILITY 0x00000400
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| 279 |
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| 280 |
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| 281 | #define I2O_EVT_IND_BSA_VOLUME_LOAD 0x00000001
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| 282 | #define I2O_EVT_IND_BSA_VOLUME_UNLOAD 0x00000002
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| 283 | #define I2O_EVT_IND_BSA_VOLUME_UNLOAD_REQ 0x00000004
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| 284 | #define I2O_EVT_IND_BSA_CAPACITY_CHANGE 0x00000008
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| 285 | #define I2O_EVT_IND_BSA_SCSI_SMART 0x00000010
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| 286 |
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| 287 |
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| 288 | #define I2O_EVT_STATE_CHANGE_NORMAL 0x00
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| 289 | #define I2O_EVT_STATE_CHANGE_SUSPENDED 0x01
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| 290 | #define I2O_EVT_STATE_CHANGE_RESTART 0x02
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| 291 | #define I2O_EVT_STATE_CHANGE_NA_RECOVER 0x03
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| 292 | #define I2O_EVT_STATE_CHANGE_NA_NO_RECOVER 0x04
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| 293 | #define I2O_EVT_STATE_CHANGE_QUIESCE_REQUEST 0x05
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| 294 | #define I2O_EVT_STATE_CHANGE_FAILED 0x10
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| 295 | #define I2O_EVT_STATE_CHANGE_FAULTED 0x11
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| 296 |
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| 297 | #define I2O_EVT_GEN_WARNING_NORMAL 0x00
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| 298 | #define I2O_EVT_GEN_WARNING_ERROR_THRESHOLD 0x01
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| 299 | #define I2O_EVT_GEN_WARNING_MEDIA_FAULT 0x02
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| 300 |
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| 301 | #define I2O_EVT_CAPABILITY_OTHER 0x01
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| 302 | #define I2O_EVT_CAPABILITY_CHANGED 0x02
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| 303 |
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| 304 | #define I2O_EVT_SENSOR_STATE_CHANGED 0x01
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| 305 |
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| 306 | |
| 307 | * I2O classes / subclasses
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| 308 |
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| 309 |
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| 310 | |
| 311 | * (LCT.ClassID.Version field)
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| 312 |
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| 313 | #define I2O_CLASS_VERSION_10 0x00
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| 314 | #define I2O_CLASS_VERSION_11 0x01
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| 315 |
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| 316 | |
| 317 | * (from v1.5 Table 6-1 Class Code Assignments.)
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| 318 |
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| 319 |
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| 320 | #define I2O_CLASS_EXECUTIVE 0x000
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| 321 | #define I2O_CLASS_DDM 0x001
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| 322 | #define I2O_CLASS_RANDOM_BLOCK_STORAGE 0x010
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| 323 | #define I2O_CLASS_SEQUENTIAL_STORAGE 0x011
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| 324 | #define I2O_CLASS_LAN 0x020
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| 325 | #define I2O_CLASS_WAN 0x030
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| 326 | #define I2O_CLASS_FIBRE_CHANNEL_PORT 0x040
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| 327 | #define I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL 0x041
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| 328 | #define I2O_CLASS_SCSI_PERIPHERAL 0x051
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| 329 | #define I2O_CLASS_ATE_PORT 0x060
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| 330 | #define I2O_CLASS_ATE_PERIPHERAL 0x061
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| 331 | #define I2O_CLASS_FLOPPY_CONTROLLER 0x070
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| 332 | #define I2O_CLASS_FLOPPY_DEVICE 0x071
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| 333 | #define I2O_CLASS_BUS_ADAPTER 0x080
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| 334 | #define I2O_CLASS_PEER_TRANSPORT_AGENT 0x090
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| 335 | #define I2O_CLASS_PEER_TRANSPORT 0x091
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| 336 | #define I2O_CLASS_END 0xfff
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| 337 |
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| 338 | |
| 339 | * Rest of 0x092 - 0x09f reserved for peer-to-peer classes
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| 340 |
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| 341 |
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| 342 | #define I2O_CLASS_MATCH_ANYCLASS 0xffffffff
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| 343 |
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| 344 | |
| 345 | * Subclasses
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| 346 |
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| 347 |
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| 348 | #define I2O_SUBCLASS_i960 0x001
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| 349 | #define I2O_SUBCLASS_HDM 0x020
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| 350 | #define I2O_SUBCLASS_ISM 0x021
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| 351 |
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| 352 |
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| 353 |
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| 354 | #define I2O_PARAMS_FIELD_GET 0x0001
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| 355 | #define I2O_PARAMS_LIST_GET 0x0002
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| 356 | #define I2O_PARAMS_MORE_GET 0x0003
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| 357 | #define I2O_PARAMS_SIZE_GET 0x0004
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| 358 | #define I2O_PARAMS_TABLE_GET 0x0005
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| 359 | #define I2O_PARAMS_FIELD_SET 0x0006
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| 360 | #define I2O_PARAMS_LIST_SET 0x0007
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| 361 | #define I2O_PARAMS_ROW_ADD 0x0008
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| 362 | #define I2O_PARAMS_ROW_DELETE 0x0009
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| 363 | #define I2O_PARAMS_TABLE_CLEAR 0x000A
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| 364 |
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| 365 | |
| 366 | * I2O serial number conventions / formats
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| 367 | * (circa v1.5)
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| 368 |
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| 369 |
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| 370 | #define I2O_SNFORMAT_UNKNOWN 0
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| 371 | #define I2O_SNFORMAT_BINARY 1
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| 372 | #define I2O_SNFORMAT_ASCII 2
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| 373 | #define I2O_SNFORMAT_UNICODE 3
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| 374 | #define I2O_SNFORMAT_LAN48_MAC 4
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| 375 | #define I2O_SNFORMAT_WAN 5
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| 376 |
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| 377 | |
| 378 | * Plus new in v2.0 (Yellowstone pdf doc)
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| 379 |
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| 380 |
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| 381 | #define I2O_SNFORMAT_LAN64_MAC 6
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| 382 | #define I2O_SNFORMAT_DDM 7
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| 383 | #define I2O_SNFORMAT_IEEE_REG64 8
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| 384 | #define I2O_SNFORMAT_IEEE_REG128 9
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| 385 | #define I2O_SNFORMAT_UNKNOWN2 0xff
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| 386 |
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| 387 | |
| 388 | * I2O Get Status State values
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| 389 |
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| 390 |
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| 391 | #define ADAPTER_STATE_INITIALIZING 0x01
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| 392 | #define ADAPTER_STATE_RESET 0x02
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| 393 | #define ADAPTER_STATE_HOLD 0x04
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| 394 | #define ADAPTER_STATE_READY 0x05
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| 395 | #define ADAPTER_STATE_OPERATIONAL 0x08
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| 396 | #define ADAPTER_STATE_FAILED 0x10
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| 397 | #define ADAPTER_STATE_FAULTED 0x11
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| 398 |
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| 399 | |
| 400 | * Software module types
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| 401 |
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| 402 | #define I2O_SOFTWARE_MODULE_IRTOS 0x11
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| 403 | #define I2O_SOFTWARE_MODULE_IOP_PRIVATE 0x22
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| 404 | #define I2O_SOFTWARE_MODULE_IOP_CONFIG 0x23
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| 405 |
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| 406 | |
| 407 | * Vendors
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| 408 |
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| 409 | #define I2O_VENDOR_DPT 0x001b
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| 410 |
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| 411 | |
| 412 | * DPT / Adaptec specific values for i2o_sg_io_hdr flags.
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| 413 |
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| 414 | #define I2O_DPT_SG_FLAG_INTERPRET 0x00010000
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| 415 | #define I2O_DPT_SG_FLAG_PHYSICAL 0x00020000
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| 416 |
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| 417 | #define I2O_DPT_FLASH_FRAG_SIZE 0x10000
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| 418 | #define I2O_DPT_FLASH_READ 0x0101
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| 419 | #define I2O_DPT_FLASH_WRITE 0x0102
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| 420 |
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| 421 | #endif
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