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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * several functions that help interpret ARC instructions
4 * used for unaligned accesses, kprobes and kgdb
5 *
6 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
7 */
8
9#ifndef __ARC_DISASM_H__
10#define __ARC_DISASM_H__
11
12enum {
13 op_Bcc = 0, op_BLcc = 1, op_LD = 2, op_ST = 3, op_MAJOR_4 = 4,
14 op_MAJOR_5 = 5, op_LD_ADD = 12, op_ADD_SUB_SHIFT = 13,
15 op_ADD_MOV_CMP = 14, op_S = 15, op_LD_S = 16, op_LDB_S = 17,
16 op_LDW_S = 18, op_LDWX_S = 19, op_ST_S = 20, op_STB_S = 21,
17 op_STW_S = 22, op_Su5 = 23, op_SP = 24, op_GP = 25,
18 op_Pcl = 26, op_MOV_S = 27, op_ADD_CMP = 28, op_BR_S = 29,
19 op_B_S = 30, op_BL_S = 31
20};
21
22enum flow {
23 noflow,
24 direct_jump,
25 direct_call,
26 indirect_jump,
27 indirect_call,
28 invalid_instr
29};
30
31#define IS_BIT(word, n) ((word) & (1<<n))
32#define BITS(word, s, e) (((word) >> (s)) & (~((-2) << ((e) - (s)))))
33
34#define MAJOR_OPCODE(word) (BITS((word), 27, 31))
35#define MINOR_OPCODE(word) (BITS((word), 16, 21))
36#define FIELD_A(word) (BITS((word), 0, 5))
37#define FIELD_B(word) ((BITS((word), 12, 14)<<3) | \
38 (BITS((word), 24, 26)))
39#define FIELD_C(word) (BITS((word), 6, 11))
40#define FIELD_u6(word) FIELDC(word)
41#define FIELD_s12(word) sign_extend(((BITS((word), 0, 5) << 6) | \
42 BITS((word), 6, 11)), 12)
43
44/* note that for BL/BRcc these two macro's need another AND statement to mask
45 * out bit 1 (make the result a multiple of 4) */
46#define FIELD_s9(word) sign_extend(((BITS(word, 15, 15) << 8) | \
47 BITS(word, 16, 23)), 9)
48#define FIELD_s21(word) sign_extend(((BITS(word, 6, 15) << 11) | \
49 (BITS(word, 17, 26) << 1)), 12)
50#define FIELD_s25(word) sign_extend(((BITS(word, 0, 3) << 21) | \
51 (BITS(word, 6, 15) << 11) | \
52 (BITS(word, 17, 26) << 1)), 12)
53
54/* note: these operate on 16 bits! */
55#define FIELD_S_A(word) ((BITS((word), 2, 2)<<3) | BITS((word), 0, 2))
56#define FIELD_S_B(word) ((BITS((word), 10, 10)<<3) | \
57 BITS((word), 8, 10))
58#define FIELD_S_C(word) ((BITS((word), 7, 7)<<3) | BITS((word), 5, 7))
59#define FIELD_S_H(word) ((BITS((word), 0, 2)<<3) | BITS((word), 5, 8))
60#define FIELD_S_u5(word) (BITS((word), 0, 4))
61#define FIELD_S_u6(word) (BITS((word), 0, 4) << 1)
62#define FIELD_S_u7(word) (BITS((word), 0, 4) << 2)
63#define FIELD_S_u10(word) (BITS((word), 0, 7) << 2)
64#define FIELD_S_s7(word) sign_extend(BITS((word), 0, 5) << 1, 9)
65#define FIELD_S_s8(word) sign_extend(BITS((word), 0, 7) << 1, 9)
66#define FIELD_S_s9(word) sign_extend(BITS((word), 0, 8), 9)
67#define FIELD_S_s10(word) sign_extend(BITS((word), 0, 8) << 1, 10)
68#define FIELD_S_s11(word) sign_extend(BITS((word), 0, 8) << 2, 11)
69#define FIELD_S_s13(word) sign_extend(BITS((word), 0, 10) << 2, 13)
70
71#define STATUS32_L 0x00000100
72#define REG_LIMM 62
73
74struct disasm_state {
75 /* generic info */
76 unsigned long words[2];
77 int instr_len;
78 int major_opcode;
79 /* info for branch/jump */
80 int is_branch;
81 int target;
82 int delay_slot;
83 enum flow flow;
84 /* info for load/store */
85 int src1, src2, src3, dest, wb_reg;
86 int zz, aa, x, pref, di;
87 int fault, write;
88};
89
90static inline int sign_extend(int value, int bits)
91{
92 if (IS_BIT(value, (bits - 1)))
93 value |= (0xffffffff << bits);
94
95 return value;
96}
97
98static inline int is_short_instr(unsigned long addr)
99{
100 uint16_t word = *((uint16_t *)addr);
101 int opcode = (word >> 11) & 0x1F;
102 return (opcode >= 0x0B);
103}
104
105void disasm_instr(unsigned long addr, struct disasm_state *state,
106 int userspace, struct pt_regs *regs, struct callee_regs *cregs);
107int disasm_next_pc(unsigned long pc, struct pt_regs *regs, struct callee_regs
108 *cregs, unsigned long *fall_thru, unsigned long *target);
109long get_reg(int reg, struct pt_regs *regs, struct callee_regs *cregs);
110void set_reg(int reg, long val, struct pt_regs *regs,
111 struct callee_regs *cregs);
112
113#endif /* __ARC_DISASM_H__ */