| 1 |
|
| 2 | |
| 3 | * Copyright (C) 2012-2015 Freescale Semiconductor, Inc.
|
| 4 |
|
| 5 |
|
| 6 | #ifndef __DEBUG_IMX_UART_H
|
| 7 | #define __DEBUG_IMX_UART_H
|
| 8 |
|
| 9 | #define IMX1_UART1_BASE_ADDR 0x00206000
|
| 10 | #define IMX1_UART2_BASE_ADDR 0x00207000
|
| 11 | #define IMX1_UART_BASE_ADDR(n) IMX1_UART##n##_BASE_ADDR
|
| 12 | #define IMX1_UART_BASE(n) IMX1_UART_BASE_ADDR(n)
|
| 13 |
|
| 14 | #define IMX25_UART1_BASE_ADDR 0x43f90000
|
| 15 | #define IMX25_UART2_BASE_ADDR 0x43f94000
|
| 16 | #define IMX25_UART3_BASE_ADDR 0x5000c000
|
| 17 | #define IMX25_UART4_BASE_ADDR 0x50008000
|
| 18 | #define IMX25_UART5_BASE_ADDR 0x5002c000
|
| 19 | #define IMX25_UART_BASE_ADDR(n) IMX25_UART##n##_BASE_ADDR
|
| 20 | #define IMX25_UART_BASE(n) IMX25_UART_BASE_ADDR(n)
|
| 21 |
|
| 22 | #define IMX27_UART1_BASE_ADDR 0x1000a000
|
| 23 | #define IMX27_UART2_BASE_ADDR 0x1000b000
|
| 24 | #define IMX27_UART3_BASE_ADDR 0x1000c000
|
| 25 | #define IMX27_UART4_BASE_ADDR 0x1000d000
|
| 26 | #define IMX27_UART_BASE_ADDR(n) IMX27_UART##n##_BASE_ADDR
|
| 27 | #define IMX27_UART_BASE(n) IMX27_UART_BASE_ADDR(n)
|
| 28 |
|
| 29 | #define IMX31_UART1_BASE_ADDR 0x43f90000
|
| 30 | #define IMX31_UART2_BASE_ADDR 0x43f94000
|
| 31 | #define IMX31_UART3_BASE_ADDR 0x5000c000
|
| 32 | #define IMX31_UART4_BASE_ADDR 0x43fb0000
|
| 33 | #define IMX31_UART5_BASE_ADDR 0x43fb4000
|
| 34 | #define IMX31_UART_BASE_ADDR(n) IMX31_UART##n##_BASE_ADDR
|
| 35 | #define IMX31_UART_BASE(n) IMX31_UART_BASE_ADDR(n)
|
| 36 |
|
| 37 | #define IMX35_UART1_BASE_ADDR 0x43f90000
|
| 38 | #define IMX35_UART2_BASE_ADDR 0x43f94000
|
| 39 | #define IMX35_UART3_BASE_ADDR 0x5000c000
|
| 40 | #define IMX35_UART_BASE_ADDR(n) IMX35_UART##n##_BASE_ADDR
|
| 41 | #define IMX35_UART_BASE(n) IMX35_UART_BASE_ADDR(n)
|
| 42 |
|
| 43 | #define IMX50_UART1_BASE_ADDR 0x53fbc000
|
| 44 | #define IMX50_UART2_BASE_ADDR 0x53fc0000
|
| 45 | #define IMX50_UART3_BASE_ADDR 0x5000c000
|
| 46 | #define IMX50_UART4_BASE_ADDR 0x53ff0000
|
| 47 | #define IMX50_UART5_BASE_ADDR 0x63f90000
|
| 48 | #define IMX50_UART_BASE_ADDR(n) IMX50_UART##n##_BASE_ADDR
|
| 49 | #define IMX50_UART_BASE(n) IMX50_UART_BASE_ADDR(n)
|
| 50 |
|
| 51 | #define IMX51_UART1_BASE_ADDR 0x73fbc000
|
| 52 | #define IMX51_UART2_BASE_ADDR 0x73fc0000
|
| 53 | #define IMX51_UART3_BASE_ADDR 0x7000c000
|
| 54 | #define IMX51_UART_BASE_ADDR(n) IMX51_UART##n##_BASE_ADDR
|
| 55 | #define IMX51_UART_BASE(n) IMX51_UART_BASE_ADDR(n)
|
| 56 |
|
| 57 | #define IMX53_UART1_BASE_ADDR 0x53fbc000
|
| 58 | #define IMX53_UART2_BASE_ADDR 0x53fc0000
|
| 59 | #define IMX53_UART3_BASE_ADDR 0x5000c000
|
| 60 | #define IMX53_UART4_BASE_ADDR 0x53ff0000
|
| 61 | #define IMX53_UART5_BASE_ADDR 0x63f90000
|
| 62 | #define IMX53_UART_BASE_ADDR(n) IMX53_UART##n##_BASE_ADDR
|
| 63 | #define IMX53_UART_BASE(n) IMX53_UART_BASE_ADDR(n)
|
| 64 |
|
| 65 | #define IMX6Q_UART1_BASE_ADDR 0x02020000
|
| 66 | #define IMX6Q_UART2_BASE_ADDR 0x021e8000
|
| 67 | #define IMX6Q_UART3_BASE_ADDR 0x021ec000
|
| 68 | #define IMX6Q_UART4_BASE_ADDR 0x021f0000
|
| 69 | #define IMX6Q_UART5_BASE_ADDR 0x021f4000
|
| 70 | #define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR
|
| 71 | #define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n)
|
| 72 |
|
| 73 | #define IMX6SL_UART1_BASE_ADDR 0x02020000
|
| 74 | #define IMX6SL_UART2_BASE_ADDR 0x02024000
|
| 75 | #define IMX6SL_UART3_BASE_ADDR 0x02034000
|
| 76 | #define IMX6SL_UART4_BASE_ADDR 0x02038000
|
| 77 | #define IMX6SL_UART5_BASE_ADDR 0x02018000
|
| 78 | #define IMX6SL_UART_BASE_ADDR(n) IMX6SL_UART##n##_BASE_ADDR
|
| 79 | #define IMX6SL_UART_BASE(n) IMX6SL_UART_BASE_ADDR(n)
|
| 80 |
|
| 81 | #define IMX6SX_UART1_BASE_ADDR 0x02020000
|
| 82 | #define IMX6SX_UART2_BASE_ADDR 0x021e8000
|
| 83 | #define IMX6SX_UART3_BASE_ADDR 0x021ec000
|
| 84 | #define IMX6SX_UART4_BASE_ADDR 0x021f0000
|
| 85 | #define IMX6SX_UART5_BASE_ADDR 0x021f4000
|
| 86 | #define IMX6SX_UART6_BASE_ADDR 0x022a0000
|
| 87 | #define IMX6SX_UART_BASE_ADDR(n) IMX6SX_UART##n##_BASE_ADDR
|
| 88 | #define IMX6SX_UART_BASE(n) IMX6SX_UART_BASE_ADDR(n)
|
| 89 |
|
| 90 | #define IMX6UL_UART1_BASE_ADDR 0x02020000
|
| 91 | #define IMX6UL_UART2_BASE_ADDR 0x021e8000
|
| 92 | #define IMX6UL_UART3_BASE_ADDR 0x021ec000
|
| 93 | #define IMX6UL_UART4_BASE_ADDR 0x021f0000
|
| 94 | #define IMX6UL_UART5_BASE_ADDR 0x021f4000
|
| 95 | #define IMX6UL_UART6_BASE_ADDR 0x021fc000
|
| 96 | #define IMX6UL_UART7_BASE_ADDR 0x02018000
|
| 97 | #define IMX6UL_UART8_BASE_ADDR 0x02024000
|
| 98 | #define IMX6UL_UART_BASE_ADDR(n) IMX6UL_UART##n##_BASE_ADDR
|
| 99 | #define IMX6UL_UART_BASE(n) IMX6UL_UART_BASE_ADDR(n)
|
| 100 |
|
| 101 | #define IMX7D_UART1_BASE_ADDR 0x30860000
|
| 102 | #define IMX7D_UART2_BASE_ADDR 0x30890000
|
| 103 | #define IMX7D_UART3_BASE_ADDR 0x30880000
|
| 104 | #define IMX7D_UART4_BASE_ADDR 0x30a60000
|
| 105 | #define IMX7D_UART5_BASE_ADDR 0x30a70000
|
| 106 | #define IMX7D_UART6_BASE_ADDR 0x30a80000
|
| 107 | #define IMX7D_UART7_BASE_ADDR 0x30a90000
|
| 108 | #define IMX7D_UART_BASE_ADDR(n) IMX7D_UART##n##_BASE_ADDR
|
| 109 | #define IMX7D_UART_BASE(n) IMX7D_UART_BASE_ADDR(n)
|
| 110 |
|
| 111 | #define IMX_DEBUG_UART_BASE(soc) soc##_UART_BASE(CONFIG_DEBUG_IMX_UART_PORT)
|
| 112 |
|
| 113 | #ifdef CONFIG_DEBUG_IMX1_UART
|
| 114 | #define UART_PADDR IMX_DEBUG_UART_BASE(IMX1)
|
| 115 | #elif defined(CONFIG_DEBUG_IMX25_UART)
|
| 116 | #define UART_PADDR IMX_DEBUG_UART_BASE(IMX25)
|
| 117 | #elif defined(CONFIG_DEBUG_IMX27_UART)
|
| 118 | #define UART_PADDR IMX_DEBUG_UART_BASE(IMX27)
|
| 119 | #elif defined(CONFIG_DEBUG_IMX31_UART)
|
| 120 | #define UART_PADDR IMX_DEBUG_UART_BASE(IMX31)
|
| 121 | #elif defined(CONFIG_DEBUG_IMX35_UART)
|
| 122 | #define UART_PADDR IMX_DEBUG_UART_BASE(IMX35)
|
| 123 | #elif defined(CONFIG_DEBUG_IMX50_UART)
|
| 124 | #define UART_PADDR IMX_DEBUG_UART_BASE(IMX50)
|
| 125 | #elif defined(CONFIG_DEBUG_IMX51_UART)
|
| 126 | #define UART_PADDR IMX_DEBUG_UART_BASE(IMX51)
|
| 127 | #elif defined(CONFIG_DEBUG_IMX53_UART)
|
| 128 | #define UART_PADDR IMX_DEBUG_UART_BASE(IMX53)
|
| 129 | #elif defined(CONFIG_DEBUG_IMX6Q_UART)
|
| 130 | #define UART_PADDR IMX_DEBUG_UART_BASE(IMX6Q)
|
| 131 | #elif defined(CONFIG_DEBUG_IMX6SL_UART)
|
| 132 | #define UART_PADDR IMX_DEBUG_UART_BASE(IMX6SL)
|
| 133 | #elif defined(CONFIG_DEBUG_IMX6SX_UART)
|
| 134 | #define UART_PADDR IMX_DEBUG_UART_BASE(IMX6SX)
|
| 135 | #elif defined(CONFIG_DEBUG_IMX6UL_UART)
|
| 136 | #define UART_PADDR IMX_DEBUG_UART_BASE(IMX6UL)
|
| 137 | #elif defined(CONFIG_DEBUG_IMX7D_UART)
|
| 138 | #define UART_PADDR IMX_DEBUG_UART_BASE(IMX7D)
|
| 139 |
|
| 140 | #endif
|
| 141 |
|
| 142 | #endif
|