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| 2 | |
| 3 | * arch/arm/include/asm/byteorder.h
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| 4 | *
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| 5 | * ARM Endian-ness. In little endian mode, the data bus is connected such
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| 6 | * that byte accesses appear as:
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| 7 | * 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
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| 8 | * and word accesses (data or instruction) appear as:
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| 9 | * d0...d31
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| 10 | *
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| 11 | * When in big endian mode, byte accesses appear as:
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| 12 | * 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
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| 13 | * and word accesses (data or instruction) appear as:
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| 14 | * d0...d31
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| 15 |
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| 16 | #ifndef __ASM_ARM_BYTEORDER_H
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| 17 | #define __ASM_ARM_BYTEORDER_H
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| 18 |
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| 19 | #ifdef __ARMEB__
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| 20 | #include <linux/byteorder/big_endian.h>
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| 21 | #else
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| 22 | #include <linux/byteorder/little_endian.h>
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| 23 | #endif
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| 24 |
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| 25 | #endif
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| 26 |
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