| 1 |
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| 2 | |
| 3 | * Based on arch/arm/include/asm/memory.h
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| 4 | *
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| 5 | * Copyright (C) 2000-2002 Russell King
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| 6 | * Copyright (C) 2012 ARM Ltd.
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| 7 | *
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| 8 | * Note: this file should not be included by non-asm/.h files
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| 9 |
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| 10 | #ifndef __ASM_MEMORY_H
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| 11 | #define __ASM_MEMORY_H
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| 12 |
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| 13 | #include <linux/const.h>
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| 14 | #include <linux/sizes.h>
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| 15 | #include <asm/page-def.h>
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| 16 |
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| 17 | |
| 18 | * Size of the PCI I/O space. This must remain a power of two so that
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| 19 | * IO_SPACE_LIMIT acts as a mask for the low bits of I/O addresses.
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| 20 |
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| 21 | #define PCI_IO_SIZE SZ_16M
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| 22 |
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| 23 | |
| 24 | * VMEMMAP_SIZE - allows the whole linear region to be covered by
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| 25 | * a struct page array
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| 26 | *
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| 27 | * If we are configured with a 52-bit kernel VA then our VMEMMAP_SIZE
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| 28 | * needs to cover the memory region from the beginning of the 52-bit
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| 29 | * PAGE_OFFSET all the way to PAGE_END for 48-bit. This allows us to
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| 30 | * keep a constant PAGE_OFFSET and "fallback" to using the higher end
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| 31 | * of the VMEMMAP where 52-bit support is not available in hardware.
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| 32 |
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| 33 | #define VMEMMAP_RANGE (_PAGE_END(VA_BITS_MIN) - PAGE_OFFSET)
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| 34 | #define VMEMMAP_SIZE ((VMEMMAP_RANGE >> PAGE_SHIFT) * sizeof(struct page))
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| 35 |
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| 36 | |
| 37 | * PAGE_OFFSET - the virtual address of the start of the linear map, at the
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| 38 | * start of the TTBR1 address space.
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| 39 | * PAGE_END - the end of the linear map, where all other kernel mappings begin.
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| 40 | * KIMAGE_VADDR - the virtual address of the start of the kernel image.
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| 41 | * VA_BITS - the maximum number of bits for virtual addresses.
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| 42 |
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| 43 | #define VA_BITS (CONFIG_ARM64_VA_BITS)
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| 44 | #define _PAGE_OFFSET(va) (-(UL(1) << (va)))
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| 45 | #define PAGE_OFFSET (_PAGE_OFFSET(VA_BITS))
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| 46 | #define KIMAGE_VADDR (MODULES_END)
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| 47 | #define MODULES_END (MODULES_VADDR + MODULES_VSIZE)
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| 48 | #define MODULES_VADDR (_PAGE_END(VA_BITS_MIN))
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| 49 | #define MODULES_VSIZE (SZ_2G)
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| 50 | #define VMEMMAP_START (VMEMMAP_END - VMEMMAP_SIZE)
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| 51 | #define VMEMMAP_END (-UL(SZ_1G))
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| 52 | #define PCI_IO_START (VMEMMAP_END + SZ_8M)
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| 53 | #define PCI_IO_END (PCI_IO_START + PCI_IO_SIZE)
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| 54 | #define FIXADDR_TOP (-UL(SZ_8M))
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| 55 |
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| 56 | #if VA_BITS > 48
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| 57 | #ifdef CONFIG_ARM64_16K_PAGES
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| 58 | #define VA_BITS_MIN (47)
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| 59 | #else
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| 60 | #define VA_BITS_MIN (48)
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| 61 | #endif
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| 62 | #else
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| 63 | #define VA_BITS_MIN (VA_BITS)
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| 64 | #endif
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| 65 |
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| 66 | #define _PAGE_END(va) (-(UL(1) << ((va) - 1)))
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| 67 |
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| 68 | #define KERNEL_START _text
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| 69 | #define KERNEL_END _end
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| 70 |
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| 71 | |
| 72 | * Generic and Software Tag-Based KASAN modes require 1/8th and 1/16th of the
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| 73 | * kernel virtual address space for storing the shadow memory respectively.
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| 74 | *
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| 75 | * The mapping between a virtual memory address and its corresponding shadow
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| 76 | * memory address is defined based on the formula:
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| 77 | *
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| 78 | * shadow_addr = (addr >> KASAN_SHADOW_SCALE_SHIFT) + KASAN_SHADOW_OFFSET
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| 79 | *
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| 80 | * where KASAN_SHADOW_SCALE_SHIFT is the order of the number of bits that map
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| 81 | * to a single shadow byte and KASAN_SHADOW_OFFSET is a constant that offsets
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| 82 | * the mapping. Note that KASAN_SHADOW_OFFSET does not point to the start of
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| 83 | * the shadow memory region.
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| 84 | *
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| 85 | * Based on this mapping, we define two constants:
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| 86 | *
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| 87 | * KASAN_SHADOW_START: the start of the shadow memory region;
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| 88 | * KASAN_SHADOW_END: the end of the shadow memory region.
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| 89 | *
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| 90 | * KASAN_SHADOW_END is defined first as the shadow address that corresponds to
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| 91 | * the upper bound of possible virtual kernel memory addresses UL(1) << 64
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| 92 | * according to the mapping formula.
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| 93 | *
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| 94 | * KASAN_SHADOW_START is defined second based on KASAN_SHADOW_END. The shadow
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| 95 | * memory start must map to the lowest possible kernel virtual memory address
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| 96 | * and thus it depends on the actual bitness of the address space.
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| 97 | *
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| 98 | * As KASAN inserts redzones between stack variables, this increases the stack
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| 99 | * memory usage significantly. Thus, we double the (minimum) stack size.
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| 100 |
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| 101 | #if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS)
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| 102 | #define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL)
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| 103 | #define KASAN_SHADOW_END ((UL(1) << (64 - KASAN_SHADOW_SCALE_SHIFT)) + KASAN_SHADOW_OFFSET)
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| 104 | #define _KASAN_SHADOW_START(va) (KASAN_SHADOW_END - (UL(1) << ((va) - KASAN_SHADOW_SCALE_SHIFT)))
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| 105 | #define KASAN_SHADOW_START _KASAN_SHADOW_START(vabits_actual)
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| 106 | #define PAGE_END KASAN_SHADOW_START
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| 107 | #define KASAN_THREAD_SHIFT 1
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| 108 | #else
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| 109 | #define KASAN_THREAD_SHIFT 0
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| 110 | #define PAGE_END (_PAGE_END(VA_BITS_MIN))
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| 111 | #endif
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| 112 |
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| 113 | #define DIRECT_MAP_PHYSMEM_END __pa(PAGE_END - 1)
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| 114 |
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| 115 | #define MIN_THREAD_SHIFT (14 + KASAN_THREAD_SHIFT)
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| 116 |
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| 117 | |
| 118 | * VMAP'd stacks are allocated at page granularity, so we must ensure that such
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| 119 | * stacks are a multiple of page size.
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| 120 |
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| 121 | #if (MIN_THREAD_SHIFT < PAGE_SHIFT)
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| 122 | #define THREAD_SHIFT PAGE_SHIFT
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| 123 | #else
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| 124 | #define THREAD_SHIFT MIN_THREAD_SHIFT
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| 125 | #endif
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| 126 |
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| 127 | #if THREAD_SHIFT >= PAGE_SHIFT
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| 128 | #define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT)
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| 129 | #endif
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| 130 |
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| 131 | #define THREAD_SIZE (UL(1) << THREAD_SHIFT)
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| 132 |
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| 133 | |
| 134 | * By aligning VMAP'd stacks to 2 * THREAD_SIZE, we can detect overflow by
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| 135 | * checking sp & (1 << THREAD_SHIFT), which we can do cheaply in the entry
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| 136 | * assembly.
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| 137 |
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| 138 | #define THREAD_ALIGN (2 * THREAD_SIZE)
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| 139 |
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| 140 | #define IRQ_STACK_SIZE THREAD_SIZE
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| 141 |
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| 142 | #define OVERFLOW_STACK_SIZE SZ_4K
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| 143 |
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| 144 | #define NVHE_STACK_SHIFT PAGE_SHIFT
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| 145 | #define NVHE_STACK_SIZE (UL(1) << NVHE_STACK_SHIFT)
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| 146 |
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| 147 | |
| 148 | * With the minimum frame size of [x29, x30], exactly half the combined
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| 149 | * sizes of the hyp and overflow stacks is the maximum size needed to
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| 150 | * save the unwinded stacktrace; plus an additional entry to delimit the
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| 151 | * end.
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| 152 |
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| 153 | #define NVHE_STACKTRACE_SIZE ((OVERFLOW_STACK_SIZE + NVHE_STACK_SIZE) / 2 + sizeof(long))
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| 154 |
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| 155 | |
| 156 | * Alignment of kernel segments (e.g. .text, .data).
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| 157 | *
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| 158 | * 4 KB granule: 16 level 3 entries, with contiguous bit
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| 159 | * 16 KB granule: 4 level 3 entries, without contiguous bit
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| 160 | * 64 KB granule: 1 level 3 entry
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| 161 |
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| 162 | #define SEGMENT_ALIGN SZ_64K
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| 163 |
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| 164 | |
| 165 | * Memory types available.
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| 166 | *
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| 167 | * IMPORTANT: MT_NORMAL must be index 0 since vm_get_page_prot() may 'or' in
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| 168 | * the MT_NORMAL_TAGGED memory type for PROT_MTE mappings. Note
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| 169 | * that protection_map[] only contains MT_NORMAL attributes.
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| 170 |
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| 171 | #define MT_NORMAL 0
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| 172 | #define MT_NORMAL_TAGGED 1
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| 173 | #define MT_NORMAL_NC 2
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| 174 | #define MT_DEVICE_nGnRnE 3
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| 175 | #define MT_DEVICE_nGnRE 4
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| 176 |
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| 177 | |
| 178 | * Memory types for Stage-2 translation when HCR_EL2.FWB=0. See R_HMNDG,
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| 179 | * R_TNHFM, R_GQFSF and I_MCQKW for the details on how these attributes get
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| 180 | * combined with Stage-1.
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| 181 |
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| 182 | #define MT_S2_NORMAL 0xf
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| 183 | #define MT_S2_NORMAL_NC 0x5
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| 184 | #define MT_S2_DEVICE_nGnRE 0x1
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| 185 | #define MT_S2_AS_S1 MT_S2_NORMAL
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| 186 |
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| 187 | |
| 188 | * Memory types for Stage-2 translation when HCR_EL2.FWB=1. Stage-2 enforces
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| 189 | * Normal-WB and Device-nGnRE, unless we actively say that S1 wins. See
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| 190 | * R_VRJSW and R_RHWZM for details.
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| 191 |
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| 192 | #define MT_S2_FWB_NORMAL 6
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| 193 | #define MT_S2_FWB_NORMAL_NC 5
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| 194 | #define MT_S2_FWB_DEVICE_nGnRE 1
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| 195 | #define MT_S2_FWB_AS_S1 7
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| 196 |
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| 197 | #ifdef CONFIG_ARM64_4K_PAGES
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| 198 | #define IOREMAP_MAX_ORDER (PUD_SHIFT)
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| 199 | #else
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| 200 | #define IOREMAP_MAX_ORDER (PMD_SHIFT)
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| 201 | #endif
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| 202 |
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| 203 | |
| 204 | * Open-coded (swapper_pg_dir - reserved_pg_dir) as this cannot be calculated
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| 205 | * until link time.
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| 206 |
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| 207 | #define RESERVED_SWAPPER_OFFSET (PAGE_SIZE)
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| 208 |
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| 209 | |
| 210 | * Open-coded (swapper_pg_dir - tramp_pg_dir) as this cannot be calculated
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| 211 | * until link time.
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| 212 |
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| 213 | #define TRAMP_SWAPPER_OFFSET (2 * PAGE_SIZE)
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| 214 |
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| 215 | #ifndef __ASSEMBLER__
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| 216 |
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| 217 | #include <linux/bitops.h>
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| 218 | #include <linux/compiler.h>
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| 219 | #include <linux/mmdebug.h>
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| 220 | #include <linux/types.h>
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| 221 | #include <asm/boot.h>
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| 222 | #include <asm/bug.h>
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| 223 | #include <asm/sections.h>
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| 224 | #include <asm/sysreg.h>
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| 225 |
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| 226 | static inline u64 __pure read_tcr(void)
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| 227 | {
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| 228 | u64 tcr;
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| 229 |
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| 230 | |
| 231 | asm("mrs %0, tcr_el1" : "=r"(tcr));
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| 232 | return tcr;
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| 233 | }
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| 234 |
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| 235 | #if VA_BITS > 48
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| 236 | |
| 237 | #define vabits_actual (64 - ((read_tcr() >> 16) & 63))
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| 238 | #else
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| 239 | #define vabits_actual ((u64)VA_BITS)
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| 240 | #endif
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| 241 |
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| 242 | extern s64 memstart_addr;
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| 243 |
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| 244 | #define PHYS_OFFSET ({ VM_BUG_ON(memstart_addr & 1); memstart_addr; })
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| 245 |
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| 246 |
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| 247 | extern u64 kimage_voffset;
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| 248 |
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| 249 | static inline unsigned long kaslr_offset(void)
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| 250 | {
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| 251 | return (u64)&_text - KIMAGE_VADDR;
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| 252 | }
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| 253 |
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| 254 | #ifdef CONFIG_RANDOMIZE_BASE
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| 255 | void kaslr_init(void);
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| 256 | static inline bool kaslr_enabled(void)
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| 257 | {
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| 258 | extern bool __kaslr_is_enabled;
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| 259 | return __kaslr_is_enabled;
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| 260 | }
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| 261 | #else
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| 262 | static inline void kaslr_init(void) { }
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| 263 | static inline bool kaslr_enabled(void) { return false; }
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| 264 | #endif
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| 265 |
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| 266 | |
| 267 | * Allow all memory at the discovery stage. We will clip it later.
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| 268 |
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| 269 | #define MIN_MEMBLOCK_ADDR 0
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| 270 | #define MAX_MEMBLOCK_ADDR U64_MAX
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| 271 |
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| 272 | |
| 273 | * PFNs are used to describe any physical page; this means
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| 274 | * PFN 0 == physical address 0.
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| 275 | *
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| 276 | * This is the PFN of the first RAM page in the kernel
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| 277 | * direct-mapped view. We assume this is the first page
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| 278 | * of RAM in the mem_map as well.
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| 279 |
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| 280 | #define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT)
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| 281 |
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| 282 | |
| 283 | * When dealing with data aborts, watchpoints, or instruction traps we may end
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| 284 | * up with a tagged userland pointer. Clear the tag to get a sane pointer to
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| 285 | * pass on to access_ok(), for instance.
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| 286 |
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| 287 | #define __untagged_addr(addr) \
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| 288 | ((__force __typeof__(addr))sign_extend64((__force u64)(addr), 55))
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| 289 |
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| 290 | #define untagged_addr(addr) ({ \
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| 291 | u64 __addr = (__force u64)(addr); \
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| 292 | __addr &= __untagged_addr(__addr); \
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| 293 | (__force __typeof__(addr))__addr; \
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| 294 | })
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| 295 |
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| 296 | #if defined(CONFIG_KASAN_SW_TAGS) || defined(CONFIG_KASAN_HW_TAGS)
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| 297 | #define __tag_shifted(tag) ((u64)(tag) << 56)
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| 298 | #define __tag_reset(addr) __untagged_addr(addr)
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| 299 | #define __tag_get(addr) (__u8)((u64)(addr) >> 56)
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| 300 | #else
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| 301 | #define __tag_shifted(tag) 0UL
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| 302 | #define __tag_reset(addr) (addr)
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| 303 | #define __tag_get(addr) 0
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| 304 | #endif
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| 305 |
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| 306 | static inline const void *__tag_set(const void *addr, u8 tag)
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| 307 | {
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| 308 | u64 __addr = (u64)addr & ~__tag_shifted(0xff);
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| 309 | return (const void *)(__addr | __tag_shifted(tag));
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| 310 | }
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| 311 |
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| 312 | #ifdef CONFIG_KASAN_HW_TAGS
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| 313 | #define arch_enable_tag_checks_sync() mte_enable_kernel_sync()
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| 314 | #define arch_enable_tag_checks_async() mte_enable_kernel_async()
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| 315 | #define arch_enable_tag_checks_asymm() mte_enable_kernel_asymm()
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| 316 | #define arch_enable_tag_checks_write_only() mte_enable_kernel_store_only()
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| 317 | #define arch_suppress_tag_checks_start() mte_enable_tco()
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| 318 | #define arch_suppress_tag_checks_stop() mte_disable_tco()
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| 319 | #define arch_force_async_tag_fault() mte_check_tfsr_exit()
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| 320 | #define arch_get_random_tag() mte_get_random_tag()
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| 321 | #define arch_get_mem_tag(addr) mte_get_mem_tag(addr)
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| 322 | #define arch_set_mem_tag_range(addr, size, tag, init) \
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| 323 | mte_set_mem_tag_range((addr), (size), (tag), (init))
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| 324 | #endif
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| 325 |
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| 326 | |
| 327 | * Physical vs virtual RAM address space conversion. These are
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| 328 | * private definitions which should NOT be used outside memory.h
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| 329 | * files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
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| 330 |
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| 331 |
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| 332 |
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| 333 | |
| 334 | * Check whether an arbitrary address is within the linear map, which
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| 335 | * lives in the [PAGE_OFFSET, PAGE_END) interval at the bottom of the
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| 336 | * kernel's TTBR1 address range.
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| 337 |
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| 338 | #define __is_lm_address(addr) (((u64)(addr) - PAGE_OFFSET) < (PAGE_END - PAGE_OFFSET))
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| 339 |
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| 340 | #define __lm_to_phys(addr) (((addr) - PAGE_OFFSET) + PHYS_OFFSET)
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| 341 | #define __kimg_to_phys(addr) ((addr) - kimage_voffset)
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| 342 |
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| 343 | #define __virt_to_phys_nodebug(x) ({ \
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| 344 | phys_addr_t __x = (phys_addr_t)(__tag_reset(x)); \
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| 345 | __is_lm_address(__x) ? __lm_to_phys(__x) : __kimg_to_phys(__x); \
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| 346 | })
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| 347 |
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| 348 | #define __pa_symbol_nodebug(x) __kimg_to_phys((phys_addr_t)(x))
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| 349 |
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| 350 | #ifdef CONFIG_DEBUG_VIRTUAL
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| 351 | extern phys_addr_t __virt_to_phys(unsigned long x);
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| 352 | extern phys_addr_t __phys_addr_symbol(unsigned long x);
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| 353 | #else
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| 354 | #define __virt_to_phys(x) __virt_to_phys_nodebug(x)
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| 355 | #define __phys_addr_symbol(x) __pa_symbol_nodebug(x)
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| 356 | #endif
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| 357 |
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| 358 | #define __phys_to_virt(x) ((unsigned long)((x) - PHYS_OFFSET) | PAGE_OFFSET)
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| 359 | #define __phys_to_kimg(x) ((unsigned long)((x) + kimage_voffset))
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| 360 |
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| 361 | |
| 362 | * Note: Drivers should NOT use these. They are the wrong
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| 363 | * translation for translating DMA addresses. Use the driver
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| 364 | * DMA support - see dma-mapping.h.
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| 365 |
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| 366 | #define virt_to_phys virt_to_phys
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| 367 | static inline phys_addr_t virt_to_phys(const volatile void *x)
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| 368 | {
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| 369 | return __virt_to_phys((unsigned long)(x));
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| 370 | }
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| 371 |
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| 372 | #define phys_to_virt phys_to_virt
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| 373 | static inline void *phys_to_virt(phys_addr_t x)
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| 374 | {
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| 375 | return (void *)(__phys_to_virt(x));
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| 376 | }
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| 377 |
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| 378 |
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| 379 | #include <asm-generic/memory_model.h>
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| 380 |
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| 381 | static inline unsigned long virt_to_pfn(const void *kaddr)
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| 382 | {
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| 383 | return __phys_to_pfn(virt_to_phys(kaddr));
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| 384 | }
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| 385 |
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| 386 | |
| 387 | * Drivers should NOT use these either.
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| 388 |
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| 389 | #define __pa(x) __virt_to_phys((unsigned long)(x))
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| 390 | #define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0))
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| 391 | #define __pa_nodebug(x) __virt_to_phys_nodebug((unsigned long)(x))
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| 392 | #define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x)))
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| 393 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
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| 394 | #define sym_to_pfn(x) __phys_to_pfn(__pa_symbol(x))
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| 395 |
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| 396 | |
| 397 | * virt_to_page(x) convert a _valid_ virtual address to struct page *
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| 398 | * virt_addr_valid(x) indicates whether a virtual address is valid
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| 399 |
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| 400 |
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| 401 | #if defined(CONFIG_DEBUG_VIRTUAL)
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| 402 | #define page_to_virt(x) ({ \
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| 403 | __typeof__(x) __page = x; \
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| 404 | void *__addr = __va(page_to_phys(__page)); \
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| 405 | (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\
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| 406 | })
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| 407 | #define virt_to_page(x) pfn_to_page(virt_to_pfn(x))
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| 408 | #else
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| 409 | #define page_to_virt(x) ({ \
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| 410 | __typeof__(x) __page = x; \
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| 411 | u64 __idx = ((u64)__page - VMEMMAP_START) / sizeof(struct page);\
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| 412 | u64 __addr = PAGE_OFFSET + (__idx * PAGE_SIZE); \
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| 413 | (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\
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| 414 | })
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| 415 |
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| 416 | #define virt_to_page(x) ({ \
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| 417 | u64 __idx = (__tag_reset((u64)x) - PAGE_OFFSET) / PAGE_SIZE; \
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| 418 | u64 __addr = VMEMMAP_START + (__idx * sizeof(struct page)); \
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| 419 | (struct page *)__addr; \
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| 420 | })
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| 421 | #endif
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| 422 |
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| 423 | #define virt_addr_valid(addr) ({ \
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| 424 | __typeof__(addr) __addr = __tag_reset(addr); \
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| 425 | __is_lm_address(__addr) && pfn_is_map_memory(virt_to_pfn(__addr)); \
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| 426 | })
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| 427 |
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| 428 | void dump_mem_limit(void);
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| 429 | #endif
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| 430 |
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| 431 | |
| 432 | * Given that the GIC architecture permits ITS implementations that can only be
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| 433 | * configured with a LPI table address once, GICv3 systems with many CPUs may
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| 434 | * end up reserving a lot of different regions after a kexec for their LPI
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| 435 | * tables (one per CPU), as we are forced to reuse the same memory after kexec
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| 436 | * (and thus reserve it persistently with EFI beforehand)
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| 437 |
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| 438 | #if defined(CONFIG_EFI) && defined(CONFIG_ARM_GIC_V3_ITS)
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| 439 | # define INIT_MEMBLOCK_RESERVED_REGIONS (INIT_MEMBLOCK_REGIONS + NR_CPUS + 1)
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| 440 | #endif
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| 441 |
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| 442 | |
| 443 | * memory regions which marked with flag MEMBLOCK_NOMAP(for example, the memory
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| 444 | * of the EFI_UNUSABLE_MEMORY type) may divide a continuous memory block into
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| 445 | * multiple parts. As a result, the number of memory regions is large.
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| 446 |
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| 447 | #ifdef CONFIG_EFI
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| 448 | #define INIT_MEMBLOCK_MEMORY_REGIONS (INIT_MEMBLOCK_REGIONS * 8)
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| 449 | #endif
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| 450 |
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| 451 |
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| 452 | #endif
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