| 1 | |
| 2 |
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| 3 | #include <linux/module.h>
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| 4 | #include <linux/init.h>
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| 5 | #include <linux/kernel.h>
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| 6 | #include <linux/mm.h>
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| 7 | #include <linux/sched.h>
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| 8 | #include <linux/kernel_stat.h>
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| 9 | #include <linux/notifier.h>
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| 10 | #include <linux/cpu.h>
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| 11 | #include <linux/percpu.h>
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| 12 | #include <linux/delay.h>
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| 13 | #include <linux/err.h>
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| 14 | #include <linux/irq.h>
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| 15 | #include <linux/irq_work.h>
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| 16 | #include <linux/irqdomain.h>
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| 17 | #include <linux/of.h>
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| 18 | #include <linux/seq_file.h>
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| 19 | #include <linux/sched/task_stack.h>
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| 20 | #include <linux/sched/mm.h>
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| 21 | #include <linux/sched/hotplug.h>
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| 22 | #include <asm/irq.h>
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| 23 | #include <asm/traps.h>
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| 24 | #include <asm/sections.h>
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| 25 | #include <asm/mmu_context.h>
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| 26 | #ifdef CONFIG_CPU_HAS_FPU
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| 27 | #include <abi/fpu.h>
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| 28 | #endif
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| 29 |
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| 30 | enum ipi_message_type {
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| 31 | IPI_EMPTY,
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| 32 | IPI_RESCHEDULE,
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| 33 | IPI_CALL_FUNC,
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| 34 | IPI_IRQ_WORK,
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| 35 | IPI_MAX
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| 36 | };
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| 37 |
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| 38 | struct ipi_data_struct {
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| 39 | unsigned long bits ____cacheline_aligned;
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| 40 | unsigned long stats[IPI_MAX] ____cacheline_aligned;
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| 41 | };
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| 42 | static DEFINE_PER_CPU(struct ipi_data_struct, ipi_data);
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| 43 |
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| 44 | static irqreturn_t handle_ipi(int irq, void *dev)
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| 45 | {
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| 46 | unsigned long *stats = this_cpu_ptr(&ipi_data)->stats;
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| 47 |
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| 48 | while (true) {
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| 49 | unsigned long ops;
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| 50 |
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| 51 | ops = xchg(&this_cpu_ptr(&ipi_data)->bits, 0);
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| 52 | if (ops == 0)
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| 53 | return IRQ_HANDLED;
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| 54 |
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| 55 | if (ops & (1 << IPI_RESCHEDULE)) {
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| 56 | stats[IPI_RESCHEDULE]++;
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| 57 | scheduler_ipi();
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| 58 | }
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| 59 |
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| 60 | if (ops & (1 << IPI_CALL_FUNC)) {
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| 61 | stats[IPI_CALL_FUNC]++;
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| 62 | generic_smp_call_function_interrupt();
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| 63 | }
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| 64 |
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| 65 | if (ops & (1 << IPI_IRQ_WORK)) {
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| 66 | stats[IPI_IRQ_WORK]++;
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| 67 | irq_work_run();
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| 68 | }
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| 69 |
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| 70 | BUG_ON((ops >> IPI_MAX) != 0);
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| 71 | }
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| 72 |
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| 73 | return IRQ_HANDLED;
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| 74 | }
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| 75 |
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| 76 | static void (*send_arch_ipi)(const struct cpumask *mask);
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| 77 |
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| 78 | static int ipi_irq;
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| 79 | void __init set_send_ipi(void (*func)(const struct cpumask *mask), int irq)
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| 80 | {
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| 81 | if (send_arch_ipi)
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| 82 | return;
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| 83 |
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| 84 | send_arch_ipi = func;
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| 85 | ipi_irq = irq;
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| 86 | }
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| 87 |
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| 88 | static void
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| 89 | send_ipi_message(const struct cpumask *to_whom, enum ipi_message_type operation)
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| 90 | {
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| 91 | int i;
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| 92 |
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| 93 | for_each_cpu(i, to_whom)
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| 94 | set_bit(operation, &per_cpu_ptr(&ipi_data, i)->bits);
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| 95 |
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| 96 | smp_mb();
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| 97 | send_arch_ipi(to_whom);
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| 98 | }
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| 99 |
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| 100 | static const char * const ipi_names[] = {
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| 101 | [IPI_EMPTY] = "Empty interrupts",
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| 102 | [IPI_RESCHEDULE] = "Rescheduling interrupts",
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| 103 | [IPI_CALL_FUNC] = "Function call interrupts",
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| 104 | [IPI_IRQ_WORK] = "Irq work interrupts",
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| 105 | };
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| 106 |
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| 107 | int arch_show_interrupts(struct seq_file *p, int prec)
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| 108 | {
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| 109 | unsigned int cpu, i;
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| 110 |
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| 111 | for (i = 0; i < IPI_MAX; i++) {
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| 112 | seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
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| 113 | prec >= 4 ? " " : "");
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| 114 | for_each_online_cpu(cpu)
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| 115 | seq_printf(p, "%10lu ",
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| 116 | per_cpu_ptr(&ipi_data, cpu)->stats[i]);
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| 117 | seq_printf(p, " %s\n", ipi_names[i]);
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| 118 | }
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| 119 |
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| 120 | return 0;
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| 121 | }
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| 122 |
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| 123 | void arch_send_call_function_ipi_mask(struct cpumask *mask)
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| 124 | {
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| 125 | send_ipi_message(mask, IPI_CALL_FUNC);
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| 126 | }
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| 127 |
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| 128 | void arch_send_call_function_single_ipi(int cpu)
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| 129 | {
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| 130 | send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC);
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| 131 | }
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| 132 |
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| 133 | static void ipi_stop(void *unused)
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| 134 | {
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| 135 | while (1);
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| 136 | }
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| 137 |
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| 138 | void smp_send_stop(void)
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| 139 | {
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| 140 | on_each_cpu(ipi_stop, NULL, 1);
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| 141 | }
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| 142 |
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| 143 | void arch_smp_send_reschedule(int cpu)
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| 144 | {
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| 145 | send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
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| 146 | }
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| 147 |
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| 148 | #ifdef CONFIG_IRQ_WORK
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| 149 | void arch_irq_work_raise(void)
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| 150 | {
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| 151 | send_ipi_message(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
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| 152 | }
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| 153 | #endif
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| 154 |
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| 155 | void __init smp_prepare_cpus(unsigned int max_cpus)
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| 156 | {
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| 157 | }
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| 158 |
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| 159 | static int ipi_dummy_dev;
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| 160 |
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| 161 | void __init setup_smp_ipi(void)
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| 162 | {
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| 163 | int rc;
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| 164 |
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| 165 | if (ipi_irq == 0)
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| 166 | return;
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| 167 |
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| 168 | rc = request_percpu_irq(ipi_irq, handle_ipi, "IPI Interrupt",
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| 169 | &ipi_dummy_dev);
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| 170 | if (rc)
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| 171 | panic("%s IRQ request failed\n", __func__);
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| 172 |
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| 173 | enable_percpu_irq(ipi_irq, 0);
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| 174 | }
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| 175 |
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| 176 | void __init setup_smp(void)
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| 177 | {
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| 178 | struct device_node *node = NULL;
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| 179 | unsigned int cpu;
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| 180 |
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| 181 | for_each_of_cpu_node(node) {
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| 182 | if (!of_device_is_available(node))
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| 183 | continue;
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| 184 |
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| 185 | cpu = of_get_cpu_hwid(node, 0);
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| 186 | if (cpu >= NR_CPUS)
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| 187 | continue;
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| 188 |
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| 189 | set_cpu_possible(cpu, true);
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| 190 | set_cpu_present(cpu, true);
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| 191 | }
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| 192 | }
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| 193 |
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| 194 | extern void _start_smp_secondary(void);
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| 195 |
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| 196 | volatile unsigned int secondary_hint;
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| 197 | volatile unsigned int secondary_hint2;
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| 198 | volatile unsigned int secondary_ccr;
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| 199 | volatile unsigned int secondary_stack;
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| 200 | volatile unsigned int secondary_msa1;
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| 201 | volatile unsigned int secondary_pgd;
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| 202 |
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| 203 | int __cpu_up(unsigned int cpu, struct task_struct *tidle)
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| 204 | {
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| 205 | unsigned long mask = 1 << cpu;
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| 206 |
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| 207 | secondary_stack =
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| 208 | (unsigned int) task_stack_page(tidle) + THREAD_SIZE - 8;
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| 209 | secondary_hint = mfcr("cr31");
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| 210 | secondary_hint2 = mfcr("cr<21, 1>");
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| 211 | secondary_ccr = mfcr("cr18");
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| 212 | secondary_msa1 = read_mmu_msa1();
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| 213 | secondary_pgd = mfcr("cr<29, 15>");
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| 214 |
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| 215 | |
| 216 | * Because other CPUs are in reset status, we must flush data
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| 217 | * from cache to out and secondary CPUs use them in
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| 218 | * csky_start_secondary(void)
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| 219 |
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| 220 | mtcr("cr17", 0x22);
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| 221 |
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| 222 | if (mask & mfcr("cr<29, 0>")) {
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| 223 | send_arch_ipi(cpumask_of(cpu));
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| 224 | } else {
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| 225 |
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| 226 | mask |= mfcr("cr<29, 0>");
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| 227 | mtcr("cr<29, 0>", mask);
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| 228 | }
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| 229 |
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| 230 |
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| 231 | while (!cpu_online(cpu));
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| 232 |
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| 233 | secondary_stack = 0;
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| 234 |
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| 235 | return 0;
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| 236 | }
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| 237 |
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| 238 | void __init smp_cpus_done(unsigned int max_cpus)
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| 239 | {
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| 240 | }
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| 241 |
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| 242 | void csky_start_secondary(void)
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| 243 | {
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| 244 | struct mm_struct *mm = &init_mm;
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| 245 | unsigned int cpu = smp_processor_id();
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| 246 |
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| 247 | mtcr("cr31", secondary_hint);
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| 248 | mtcr("cr<21, 1>", secondary_hint2);
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| 249 | mtcr("cr18", secondary_ccr);
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| 250 |
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| 251 | mtcr("vbr", vec_base);
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| 252 |
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| 253 | flush_tlb_all();
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| 254 | write_mmu_pagemask(0);
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| 255 |
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| 256 | #ifdef CONFIG_CPU_HAS_FPU
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| 257 | init_fpu();
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| 258 | #endif
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| 259 |
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| 260 | enable_percpu_irq(ipi_irq, 0);
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| 261 |
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| 262 | mmget(mm);
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| 263 | mmgrab(mm);
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| 264 | current->active_mm = mm;
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| 265 | cpumask_set_cpu(cpu, mm_cpumask(mm));
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| 266 |
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| 267 | notify_cpu_starting(cpu);
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| 268 | set_cpu_online(cpu, true);
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| 269 |
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| 270 | pr_info("CPU%u Online: %s...\n", cpu, __func__);
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| 271 |
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| 272 | local_irq_enable();
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| 273 | cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
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| 274 | }
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| 275 |
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| 276 | #ifdef CONFIG_HOTPLUG_CPU
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| 277 | int __cpu_disable(void)
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| 278 | {
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| 279 | unsigned int cpu = smp_processor_id();
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| 280 |
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| 281 | set_cpu_online(cpu, false);
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| 282 |
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| 283 | irq_migrate_all_off_this_cpu();
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| 284 |
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| 285 | clear_tasks_mm_cpumask(cpu);
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| 286 |
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| 287 | return 0;
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| 288 | }
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| 289 |
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| 290 | void arch_cpuhp_cleanup_dead_cpu(unsigned int cpu)
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| 291 | {
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| 292 | pr_notice("CPU%u: shutdown\n", cpu);
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| 293 | }
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| 294 |
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| 295 | void __noreturn arch_cpu_idle_dead(void)
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| 296 | {
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| 297 | idle_task_exit();
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| 298 |
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| 299 | cpuhp_ap_report_dead();
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| 300 |
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| 301 | while (!secondary_stack)
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| 302 | arch_cpu_idle();
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| 303 |
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| 304 | raw_local_irq_disable();
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| 305 |
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| 306 | asm volatile(
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| 307 | "mov sp, %0\n"
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| 308 | "mov r8, %0\n"
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| 309 | "jmpi csky_start_secondary"
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| 310 | :
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| 311 | : "r" (secondary_stack));
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| 312 |
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| 313 | BUG();
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| 314 | }
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| 315 | #endif
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