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| 2 | |
| 3 | * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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| 4 |
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| 5 | #ifndef _ASM_STACKFRAME_H
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| 6 | #define _ASM_STACKFRAME_H
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| 7 |
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| 8 | #include <linux/threads.h>
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| 9 |
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| 10 | #include <asm/addrspace.h>
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| 11 | #include <asm/asm.h>
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| 12 | #include <asm/asmmacro.h>
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| 13 | #include <asm/asm-offsets.h>
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| 14 | #include <asm/loongarch.h>
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| 15 | #include <asm/thread_info.h>
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| 16 | #include <asm/unwind_hints.h>
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| 17 |
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| 18 |
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| 19 | .macro cfi_rel_offset reg offset=0 docfi=0
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| 20 | .if \docfi
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| 21 | .cfi_rel_offset \reg, \offset
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| 22 | .endif
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| 23 | .endm
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| 24 |
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| 25 | .macro cfi_st reg offset=0 docfi=0
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| 26 | cfi_rel_offset \reg, \offset, \docfi
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| 27 | LONG_S \reg, sp, \offset
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| 28 | .endm
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| 29 |
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| 30 | .macro cfi_restore reg offset=0 docfi=0
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| 31 | .if \docfi
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| 32 | .cfi_restore \reg
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| 33 | .endif
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| 34 | .endm
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| 35 |
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| 36 | .macro cfi_ld reg offset=0 docfi=0
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| 37 | LONG_L \reg, sp, \offset
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| 38 | cfi_restore \reg \offset \docfi
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| 39 | .endm
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| 40 |
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| 41 | .macro SETUP_TWINS temp
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| 42 | pcaddi t0, 0
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| 43 | PTR_LI t1, ~TO_PHYS_MASK
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| 44 | and t0, t0, t1
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| 45 | ori t0, t0, (1 << 4 | 1)
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| 46 | csrwr t0, LOONGARCH_CSR_DMWIN0
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| 47 | PTR_LI t0, CSR_DMW1_INIT
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| 48 | csrwr t0, LOONGARCH_CSR_DMWIN1
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| 49 | .endm
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| 50 |
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| 51 | .macro SETUP_MODES temp
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| 52 |
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| 53 | li.w \temp, 0xb0 # PLV=0, IE=0, PG=1
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| 54 | csrwr \temp, LOONGARCH_CSR_CRMD
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| 55 | li.w \temp, 0x04 # PLV=0, PIE=1, PWE=0
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| 56 | csrwr \temp, LOONGARCH_CSR_PRMD
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| 57 | li.w \temp, 0x00 # FPE=0, SXE=0, ASXE=0, BTE=0
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| 58 | csrwr \temp, LOONGARCH_CSR_EUEN
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| 59 | .endm
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| 60 |
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| 61 | .macro SETUP_DMWINS temp
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| 62 | PTR_LI \temp, CSR_DMW0_INIT # SUC, PLV0, LA32: 0x8xxx xxxx, LA64: 0x8000 xxxx xxxx xxxx
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| 63 | csrwr \temp, LOONGARCH_CSR_DMWIN0
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| 64 | PTR_LI \temp, CSR_DMW1_INIT # CAC, PLV0, LA32: 0xaxxx xxxx, LA64: 0x9000 xxxx xxxx xxxx
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| 65 | csrwr \temp, LOONGARCH_CSR_DMWIN1
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| 66 | PTR_LI \temp, CSR_DMW2_INIT # WUC, PLV0, LA32: unavailable, LA64: 0xa000 xxxx xxxx xxxx
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| 67 | csrwr \temp, LOONGARCH_CSR_DMWIN2
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| 68 | PTR_LI \temp, CSR_DMW3_INIT # 0x0, unused
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| 69 | csrwr \temp, LOONGARCH_CSR_DMWIN3
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| 70 | .endm
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| 71 |
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| 72 |
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| 73 | .macro JUMP_VIRT_ADDR temp1 temp2
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| 74 | PTR_LI \temp1, CACHE_BASE
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| 75 | pcaddi \temp2, 0
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| 76 | PTR_BSTRINS \temp1, \temp2, (DMW_PABITS - 1), 0
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| 77 | jirl zero, \temp1, 0xc
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| 78 | .endm
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| 79 |
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| 80 | .macro STACKLEAK_ERASE
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| 81 | #ifdef CONFIG_KSTACK_ERASE
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| 82 | bl stackleak_erase_on_task_stack
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| 83 | #endif
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| 84 | .endm
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| 85 |
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| 86 | .macro BACKUP_T0T1
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| 87 | csrwr t0, EXCEPTION_KS0
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| 88 | csrwr t1, EXCEPTION_KS1
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| 89 | .endm
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| 90 |
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| 91 | .macro RELOAD_T0T1
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| 92 | csrrd t0, EXCEPTION_KS0
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| 93 | csrrd t1, EXCEPTION_KS1
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| 94 | .endm
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| 95 |
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| 96 | .macro SAVE_TEMP docfi=0
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| 97 | RELOAD_T0T1
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| 98 | cfi_st t0, PT_R12, \docfi
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| 99 | cfi_st t1, PT_R13, \docfi
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| 100 | cfi_st t2, PT_R14, \docfi
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| 101 | cfi_st t3, PT_R15, \docfi
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| 102 | cfi_st t4, PT_R16, \docfi
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| 103 | cfi_st t5, PT_R17, \docfi
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| 104 | cfi_st t6, PT_R18, \docfi
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| 105 | cfi_st t7, PT_R19, \docfi
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| 106 | cfi_st t8, PT_R20, \docfi
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| 107 | .endm
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| 108 |
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| 109 | .macro SAVE_STATIC docfi=0
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| 110 | cfi_st s0, PT_R23, \docfi
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| 111 | cfi_st s1, PT_R24, \docfi
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| 112 | cfi_st s2, PT_R25, \docfi
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| 113 | cfi_st s3, PT_R26, \docfi
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| 114 | cfi_st s4, PT_R27, \docfi
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| 115 | cfi_st s5, PT_R28, \docfi
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| 116 | cfi_st s6, PT_R29, \docfi
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| 117 | cfi_st s7, PT_R30, \docfi
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| 118 | cfi_st s8, PT_R31, \docfi
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| 119 | .endm
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| 120 |
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| 121 | |
| 122 | * get_saved_sp returns the SP for the current CPU by looking in the
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| 123 | * kernelsp array for it. It stores the current sp in t0 and loads the
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| 124 | * new value in sp.
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| 125 |
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| 126 | .macro get_saved_sp docfi=0
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| 127 | la_abs t1, kernelsp
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| 128 | #ifdef CONFIG_SMP
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| 129 | csrrd t0, PERCPU_BASE_KS
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| 130 | LONG_ADD t1, t1, t0
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| 131 | #endif
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| 132 | move t0, sp
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| 133 | .if \docfi
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| 134 | .cfi_register sp, t0
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| 135 | .endif
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| 136 | LONG_L sp, t1, 0
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| 137 | .endm
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| 138 |
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| 139 | .macro set_saved_sp stackp temp temp2
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| 140 | la.pcrel \temp, kernelsp
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| 141 | #ifdef CONFIG_SMP
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| 142 | LONG_ADD \temp, \temp, u0
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| 143 | #endif
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| 144 | LONG_S \stackp, \temp, 0
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| 145 | .endm
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| 146 |
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| 147 | .macro SAVE_SOME docfi=0
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| 148 | csrrd t1, LOONGARCH_CSR_PRMD
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| 149 | andi t1, t1, 0x3
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| 150 | move t0, sp
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| 151 | beqz t1, 8f
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| 152 |
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| 153 | get_saved_sp docfi=\docfi
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| 154 | 8:
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| 155 | PTR_ADDI sp, sp, -PT_SIZE
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| 156 | .if \docfi
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| 157 | .cfi_def_cfa sp, 0
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| 158 | .endif
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| 159 | cfi_st t0, PT_R3, \docfi
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| 160 | cfi_rel_offset sp, PT_R3, \docfi
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| 161 | LONG_S zero, sp, PT_R0
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| 162 | csrrd t0, LOONGARCH_CSR_PRMD
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| 163 | LONG_S t0, sp, PT_PRMD
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| 164 | csrrd t0, LOONGARCH_CSR_CRMD
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| 165 | LONG_S t0, sp, PT_CRMD
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| 166 | csrrd t0, LOONGARCH_CSR_EUEN
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| 167 | LONG_S t0, sp, PT_EUEN
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| 168 | csrrd t0, LOONGARCH_CSR_ECFG
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| 169 | LONG_S t0, sp, PT_ECFG
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| 170 | csrrd t0, LOONGARCH_CSR_ESTAT
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| 171 | PTR_S t0, sp, PT_ESTAT
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| 172 | cfi_st ra, PT_R1, \docfi
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| 173 | cfi_st a0, PT_R4, \docfi
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| 174 | cfi_st a1, PT_R5, \docfi
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| 175 | cfi_st a2, PT_R6, \docfi
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| 176 | cfi_st a3, PT_R7, \docfi
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| 177 | cfi_st a4, PT_R8, \docfi
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| 178 | cfi_st a5, PT_R9, \docfi
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| 179 | cfi_st a6, PT_R10, \docfi
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| 180 | cfi_st a7, PT_R11, \docfi
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| 181 | csrrd ra, LOONGARCH_CSR_ERA
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| 182 | LONG_S ra, sp, PT_ERA
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| 183 | .if \docfi
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| 184 | .cfi_rel_offset ra, PT_ERA
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| 185 | .endif
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| 186 | cfi_st tp, PT_R2, \docfi
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| 187 | cfi_st u0, PT_R21, \docfi
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| 188 | cfi_st fp, PT_R22, \docfi
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| 189 |
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| 190 |
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| 191 | csrrd t0, LOONGARCH_CSR_PRMD
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| 192 | andi t0, t0, 0x3
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| 193 | beqz t0, 9f
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| 194 |
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| 195 | csrrd u0, PERCPU_BASE_KS
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| 196 |
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| 197 | la_abs t1, cpu_tasks
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| 198 | #ifdef CONFIG_SMP
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| 199 | LONG_ADD t1, t1, u0
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| 200 | #endif
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| 201 | LONG_L tp, t1, 0
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| 202 | 9:
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| 203 | #ifdef CONFIG_KGDB
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| 204 | li.w t0, CSR_CRMD_WE
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| 205 | csrxchg t0, t0, LOONGARCH_CSR_CRMD
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| 206 | #endif
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| 207 | UNWIND_HINT_REGS
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| 208 | .endm
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| 209 |
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| 210 | .macro SAVE_ALL docfi=0
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| 211 | SAVE_SOME \docfi
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| 212 | SAVE_TEMP \docfi
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| 213 | SAVE_STATIC \docfi
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| 214 | .endm
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| 215 |
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| 216 | .macro RESTORE_TEMP docfi=0
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| 217 | cfi_ld t0, PT_R12, \docfi
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| 218 | cfi_ld t1, PT_R13, \docfi
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| 219 | cfi_ld t2, PT_R14, \docfi
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| 220 | cfi_ld t3, PT_R15, \docfi
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| 221 | cfi_ld t4, PT_R16, \docfi
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| 222 | cfi_ld t5, PT_R17, \docfi
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| 223 | cfi_ld t6, PT_R18, \docfi
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| 224 | cfi_ld t7, PT_R19, \docfi
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| 225 | cfi_ld t8, PT_R20, \docfi
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| 226 | .endm
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| 227 |
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| 228 | .macro RESTORE_STATIC docfi=0
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| 229 | cfi_ld s0, PT_R23, \docfi
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| 230 | cfi_ld s1, PT_R24, \docfi
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| 231 | cfi_ld s2, PT_R25, \docfi
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| 232 | cfi_ld s3, PT_R26, \docfi
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| 233 | cfi_ld s4, PT_R27, \docfi
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| 234 | cfi_ld s5, PT_R28, \docfi
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| 235 | cfi_ld s6, PT_R29, \docfi
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| 236 | cfi_ld s7, PT_R30, \docfi
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| 237 | cfi_ld s8, PT_R31, \docfi
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| 238 | .endm
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| 239 |
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| 240 | .macro RESTORE_SOME docfi=0
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| 241 | LONG_L a0, sp, PT_PRMD
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| 242 | andi a0, a0, 0x3
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| 243 | beqz a0, 8f
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| 244 | cfi_ld u0, PT_R21, \docfi
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| 245 | 8:
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| 246 | LONG_L a0, sp, PT_ERA
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| 247 | csrwr a0, LOONGARCH_CSR_ERA
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| 248 | LONG_L a0, sp, PT_PRMD
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| 249 | csrwr a0, LOONGARCH_CSR_PRMD
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| 250 | cfi_ld ra, PT_R1, \docfi
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| 251 | cfi_ld a0, PT_R4, \docfi
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| 252 | cfi_ld a1, PT_R5, \docfi
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| 253 | cfi_ld a2, PT_R6, \docfi
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| 254 | cfi_ld a3, PT_R7, \docfi
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| 255 | cfi_ld a4, PT_R8, \docfi
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| 256 | cfi_ld a5, PT_R9, \docfi
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| 257 | cfi_ld a6, PT_R10, \docfi
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| 258 | cfi_ld a7, PT_R11, \docfi
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| 259 | cfi_ld tp, PT_R2, \docfi
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| 260 | cfi_ld fp, PT_R22, \docfi
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| 261 | .endm
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| 262 |
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| 263 | .macro RESTORE_SP_AND_RET docfi=0
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| 264 | cfi_ld sp, PT_R3, \docfi
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| 265 | UNWIND_HINT_FUNC
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| 266 | ertn
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| 267 | .endm
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| 268 |
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| 269 | .macro RESTORE_ALL_AND_RET docfi=0
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| 270 | RESTORE_STATIC \docfi
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| 271 | RESTORE_TEMP \docfi
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| 272 | RESTORE_SOME \docfi
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| 273 | RESTORE_SP_AND_RET \docfi
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| 274 | .endm
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| 275 |
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| 276 | #endif
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