| 1 |
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| 2 | |
| 3 | * Definitions used by low-level trap handlers
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| 4 | *
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| 5 | * Copyright (C) 2008-2009 Michal Simek <[email protected]>
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| 6 | * Copyright (C) 2007-2009 PetaLogix
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| 7 | * Copyright (C) 2007 John Williams <[email protected]>
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| 8 |
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| 9 |
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| 10 | #ifndef _ASM_MICROBLAZE_ENTRY_H
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| 11 | #define _ASM_MICROBLAZE_ENTRY_H
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| 12 |
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| 13 | #include <asm/percpu.h>
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| 14 | #include <asm/ptrace.h>
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| 15 | #include <linux/linkage.h>
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| 16 |
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| 17 | |
| 18 | * These are per-cpu variables required in entry.S, among other
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| 19 | * places
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| 20 |
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| 21 |
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| 22 | #define PER_CPU(var) var
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| 23 |
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| 24 | |
| 25 | * The MicroBlaze ABI has the caller reserve an argument home area:
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| 26 | * REG_PARM_STACK_SPACE is 24 and OUTGOING_REG_PARM_STACK_SPACE is 1, so a
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| 27 | * callee may write to [caller_sp + 4, caller_sp + 28). The kernel calls C
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| 28 | * with r1 at the frame base, so reserve that area below pt_regs and reach
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| 29 | * the saved registers through PTO. This restores what 6e83557c38b4
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| 30 | * ("microblaze: Remove r0_ram pointer and PTO alignment") removed; the old
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| 31 | * value of 24 was one word short and left the last argument slot
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| 32 | * overlapping pt_regs' r0.
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| 33 |
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| 34 | #define PTO 28
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| 35 | #define STATE_SAVE_SIZE (PT_SIZE + PTO)
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| 36 |
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| 37 | # ifndef __ASSEMBLER__
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| 38 | DECLARE_PER_CPU(unsigned int, KSP);
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| 39 | DECLARE_PER_CPU(unsigned int, KM);
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| 40 | DECLARE_PER_CPU(unsigned int, ENTRY_SP);
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| 41 | DECLARE_PER_CPU(unsigned int, R11_SAVE);
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| 42 | DECLARE_PER_CPU(unsigned int, CURRENT_SAVE);
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| 43 |
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| 44 | extern asmlinkage void do_notify_resume(struct pt_regs *regs, int in_syscall);
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| 45 | # endif
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| 46 |
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| 47 | #endif
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