| 1 | |
| 2 | * Copyright (C) 2007-2009 Michal Simek <[email protected]>
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| 3 | * Copyright (C) 2007-2009 PetaLogix
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| 4 | * Copyright (C) 2007 John Williams <[email protected]>
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| 5 | *
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| 6 | * This file is subject to the terms and conditions of the GNU General Public
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| 7 | * License. See the file "COPYING" in the main directory of this archive
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| 8 | * for more details.
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| 9 |
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| 10 |
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| 11 | #include <linux/clk.h>
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| 12 | #include <linux/init.h>
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| 13 | #include <asm/cpuinfo.h>
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| 14 | #include <asm/pvr.h>
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| 15 |
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| 16 | const struct cpu_ver_key cpu_ver_lookup[] = {
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| 17 |
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| 18 | {"5.00.a", 0x01},
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| 19 | {"5.00.b", 0x02},
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| 20 | {"5.00.c", 0x03},
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| 21 | {"6.00.a", 0x04},
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| 22 | {"6.00.b", 0x06},
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| 23 | {"7.00.a", 0x05},
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| 24 | {"7.00.b", 0x07},
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| 25 | {"7.10.a", 0x08},
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| 26 | {"7.10.b", 0x09},
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| 27 | {"7.10.c", 0x0a},
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| 28 | {"7.10.d", 0x0b},
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| 29 | {"7.20.a", 0x0c},
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| 30 | {"7.20.b", 0x0d},
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| 31 | {"7.20.c", 0x0e},
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| 32 | {"7.20.d", 0x0f},
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| 33 | {"7.30.a", 0x10},
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| 34 | {"7.30.b", 0x11},
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| 35 | {"8.00.a", 0x12},
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| 36 | {"8.00.b", 0x13},
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| 37 | {"8.10.a", 0x14},
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| 38 | {"8.20.a", 0x15},
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| 39 | {"8.20.b", 0x16},
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| 40 | {"8.30.a", 0x17},
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| 41 | {"8.40.a", 0x18},
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| 42 | {"8.40.b", 0x19},
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| 43 | {"8.50.a", 0x1a},
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| 44 | {"8.50.b", 0x1c},
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| 45 | {"8.50.c", 0x1e},
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| 46 | {"9.0", 0x1b},
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| 47 | {"9.1", 0x1d},
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| 48 | {"9.2", 0x1f},
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| 49 | {"9.3", 0x20},
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| 50 | {"9.4", 0x21},
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| 51 | {"9.5", 0x22},
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| 52 | {"9.6", 0x23},
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| 53 | {"10.0", 0x24},
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| 54 | {"11.0", 0x25},
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| 55 | {NULL, 0},
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| 56 | };
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| 57 |
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| 58 | |
| 59 | * FIXME Not sure if the actual key is defined by Xilinx in the PVR
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| 60 |
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| 61 | const struct family_string_key family_string_lookup[] = {
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| 62 | {"virtex2", 0x4},
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| 63 | {"virtex2pro", 0x5},
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| 64 | {"spartan3", 0x6},
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| 65 | {"virtex4", 0x7},
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| 66 | {"virtex5", 0x8},
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| 67 | {"spartan3e", 0x9},
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| 68 | {"spartan3a", 0xa},
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| 69 | {"spartan3an", 0xb},
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| 70 | {"spartan3adsp", 0xc},
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| 71 | {"spartan6", 0xd},
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| 72 | {"virtex6", 0xe},
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| 73 | {"virtex7", 0xf},
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| 74 |
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| 75 | {"spartan2", 0xf0},
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| 76 | {"kintex7", 0x10},
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| 77 | {"artix7", 0x11},
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| 78 | {"zynq7000", 0x12},
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| 79 | {"UltraScale Virtex", 0x13},
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| 80 | {"UltraScale Kintex", 0x14},
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| 81 | {"UltraScale+ Zynq", 0x15},
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| 82 | {"UltraScale+ Virtex", 0x16},
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| 83 | {"UltraScale+ Kintex", 0x17},
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| 84 | {"Spartan7", 0x18},
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| 85 | {NULL, 0},
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| 86 | };
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| 87 |
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| 88 | struct cpuinfo cpuinfo;
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| 89 | static struct device_node *cpu;
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| 90 |
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| 91 | void __init setup_cpuinfo(void)
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| 92 | {
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| 93 | cpu = of_get_cpu_node(0, NULL);
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| 94 | if (!cpu)
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| 95 | pr_err("You don't have cpu or are missing cpu reg property!!!\n");
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| 96 |
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| 97 | pr_info("%s: initialising\n", __func__);
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| 98 |
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| 99 | switch (cpu_has_pvr()) {
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| 100 | case 0:
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| 101 | pr_warn("%s: No PVR support. Using static CPU info from FDT\n",
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| 102 | __func__);
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| 103 | set_cpuinfo_static(&cpuinfo, cpu);
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| 104 | break;
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| 105 | |
| 106 | * please do not use FULL PVR with MMU
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| 107 | case 1:
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| 108 | pr_info("%s: Using full CPU PVR support\n",
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| 109 | __func__);
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| 110 | set_cpuinfo_static(&cpuinfo, cpu);
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| 111 | set_cpuinfo_pvr_full(&cpuinfo, cpu);
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| 112 | break;
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| 113 | default:
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| 114 | pr_warn("%s: Unsupported PVR setting\n", __func__);
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| 115 | set_cpuinfo_static(&cpuinfo, cpu);
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| 116 | }
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| 117 |
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| 118 | if (cpuinfo.mmu_privins)
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| 119 | pr_warn("%s: Stream instructions enabled"
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| 120 | " - USERSPACE CAN LOCK THIS KERNEL!\n", __func__);
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| 121 |
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| 122 | of_node_put(cpu);
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| 123 | }
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| 124 |
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| 125 | void __init setup_cpuinfo_clk(void)
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| 126 | {
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| 127 | struct clk *clk;
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| 128 |
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| 129 | clk = of_clk_get(cpu, 0);
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| 130 | if (IS_ERR(clk)) {
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| 131 | pr_err("ERROR: CPU CCF input clock not found\n");
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| 132 |
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| 133 | cpuinfo.cpu_clock_freq = fcpu(cpu, "timebase-frequency");
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| 134 | } else {
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| 135 | cpuinfo.cpu_clock_freq = clk_get_rate(clk);
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| 136 | clk_put(clk);
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| 137 | }
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| 138 |
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| 139 | if (!cpuinfo.cpu_clock_freq) {
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| 140 | pr_err("ERROR: CPU clock frequency not setup\n");
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| 141 | BUG();
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| 142 | }
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| 143 | }
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