| 1 | |
| 2 | * This file is subject to the terms and conditions of the GNU General Public
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| 3 | * License. See the file "COPYING" in the main directory of this archive
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| 4 | * for more details.
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| 5 | *
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| 6 | * Copyright (C) 2003 by Ralf Baechle
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| 7 |
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| 8 | #ifndef __ASM_PREFETCH_H
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| 9 | #define __ASM_PREFETCH_H
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| 10 |
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| 11 |
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| 12 | |
| 13 | * R5000 and RM5200 implements pref and prefx instructions but they're nops, so
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| 14 | * rather than wasting time we pretend these processors don't support
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| 15 | * prefetching at all.
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| 16 | *
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| 17 | * R5432 implements Load, Store, LoadStreamed, StoreStreamed, LoadRetained,
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| 18 | * StoreRetained and WriteBackInvalidate but not Pref_PrepareForStore.
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| 19 | *
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| 20 | * Hell (and the book on my shelf I can't open ...) know what the R8000 does.
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| 21 | *
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| 22 | * RM7000 version 1.0 interprets all hints as Pref_Load; version 2.0 implements
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| 23 | * Pref_PrepareForStore also.
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| 24 | *
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| 25 | * RM9000 is MIPS IV but implements prefetching like MIPS32/MIPS64; it's
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| 26 | * Pref_WriteBackInvalidate is a nop and Pref_PrepareForStore is broken in
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| 27 | * current versions due to erratum G105.
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| 28 | *
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| 29 | * VR5500 (including VR5701 and VR7701) only implement load prefetch.
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| 30 | *
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| 31 | * Finally MIPS32 and MIPS64 implement all of the following hints.
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| 32 |
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| 33 |
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| 34 | #define Pref_Load 0
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| 35 | #define Pref_Store 1
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| 36 |
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| 37 | #define Pref_LoadStreamed 4
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| 38 | #define Pref_StoreStreamed 5
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| 39 | #define Pref_LoadRetained 6
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| 40 | #define Pref_StoreRetained 7
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| 41 |
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| 42 | #define Pref_WriteBackInvalidate 25
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| 43 | #define Pref_PrepareForStore 30
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| 44 |
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| 45 | #ifdef __ASSEMBLER__
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| 46 |
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| 47 | .macro __pref hint addr
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| 48 | #ifdef CONFIG_CPU_HAS_PREFETCH
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| 49 | pref \hint, \addr
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| 50 | #endif
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| 51 | .endm
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| 52 |
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| 53 | .macro pref_load addr
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| 54 | __pref Pref_Load, \addr
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| 55 | .endm
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| 56 |
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| 57 | .macro pref_store addr
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| 58 | __pref Pref_Store, \addr
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| 59 | .endm
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| 60 |
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| 61 | .macro pref_load_streamed addr
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| 62 | __pref Pref_LoadStreamed, \addr
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| 63 | .endm
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| 64 |
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| 65 | .macro pref_store_streamed addr
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| 66 | __pref Pref_StoreStreamed, \addr
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| 67 | .endm
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| 68 |
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| 69 | .macro pref_load_retained addr
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| 70 | __pref Pref_LoadRetained, \addr
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| 71 | .endm
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| 72 |
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| 73 | .macro pref_store_retained addr
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| 74 | __pref Pref_StoreRetained, \addr
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| 75 | .endm
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| 76 |
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| 77 | .macro pref_wback_inv addr
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| 78 | __pref Pref_WriteBackInvalidate, \addr
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| 79 | .endm
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| 80 |
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| 81 | .macro pref_prepare_for_store addr
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| 82 | __pref Pref_PrepareForStore, \addr
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| 83 | .endm
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| 84 |
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| 85 | #endif
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| 86 |
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| 87 | #endif
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