| 1 | |
| 2 | |
| 3 | * Copyright (C) 1995, 1996, 2001 Ralf Baechle
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| 4 | * Copyright (C) 2001, 2004 MIPS Technologies, Inc.
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| 5 | * Copyright (C) 2004 Maciej W. Rozycki
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| 6 |
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| 7 | #include <linux/delay.h>
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| 8 | #include <linux/kernel.h>
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| 9 | #include <linux/sched.h>
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| 10 | #include <linux/seq_file.h>
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| 11 | #include <asm/bootinfo.h>
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| 12 | #include <asm/cpu.h>
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| 13 | #include <asm/cpu-features.h>
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| 14 | #include <asm/idle.h>
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| 15 | #include <asm/mipsregs.h>
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| 16 | #include <asm/processor.h>
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| 17 | #include <asm/prom.h>
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| 18 |
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| 19 | unsigned int vced_count, vcei_count;
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| 20 |
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| 21 | |
| 22 | * No lock; only written during early bootup by CPU 0.
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| 23 |
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| 24 | static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain);
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| 25 |
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| 26 | int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb)
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| 27 | {
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| 28 | return raw_notifier_chain_register(&proc_cpuinfo_chain, nb);
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| 29 | }
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| 30 |
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| 31 | int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v)
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| 32 | {
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| 33 | return raw_notifier_call_chain(&proc_cpuinfo_chain, val, v);
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| 34 | }
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| 35 |
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| 36 | static int show_cpuinfo(struct seq_file *m, void *v)
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| 37 | {
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| 38 | struct proc_cpuinfo_notifier_args proc_cpuinfo_notifier_args;
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| 39 | unsigned long n = (unsigned long) v - 1;
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| 40 | unsigned int version = cpu_data[n].processor_id;
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| 41 | unsigned int fp_vers = cpu_data[n].fpu_id;
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| 42 | char fmt[64];
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| 43 | int i;
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| 44 |
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| 45 | #ifdef CONFIG_SMP
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| 46 | if (!cpu_online(n))
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| 47 | return 0;
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| 48 | #endif
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| 49 |
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| 50 | |
| 51 | * For the first processor also print the system type
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| 52 |
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| 53 | if (n == 0) {
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| 54 | seq_printf(m, "system type\t\t: %s\n", get_system_type());
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| 55 | if (mips_get_machine_name())
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| 56 | seq_printf(m, "machine\t\t\t: %s\n",
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| 57 | mips_get_machine_name());
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| 58 | }
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| 59 |
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| 60 | seq_printf(m, "processor\t\t: %ld\n", n);
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| 61 | sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
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| 62 | cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : "");
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| 63 | seq_printf(m, fmt, __cpu_name[n],
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| 64 | (version >> 4) & 0x0f, version & 0x0f,
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| 65 | (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
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| 66 | seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",
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| 67 | cpu_data[n].udelay_val / (500000/HZ),
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| 68 | (cpu_data[n].udelay_val / (5000/HZ)) % 100);
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| 69 | seq_printf(m, "wait instruction\t: %s\n", str_yes_no(cpu_wait));
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| 70 | seq_printf(m, "microsecond timers\t: %s\n",
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| 71 | str_yes_no(cpu_has_counter));
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| 72 | seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
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| 73 | seq_printf(m, "extra interrupt vector\t: %s\n",
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| 74 | str_yes_no(cpu_has_divec));
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| 75 | seq_printf(m, "hardware watchpoint\t: %s", str_yes_no(cpu_has_watch));
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| 76 | if (cpu_has_watch) {
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| 77 | seq_printf(m, ", count: %d, address/irw mask: [",
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| 78 | cpu_data[n].watch_reg_count);
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| 79 | for (i = 0; i < cpu_data[n].watch_reg_count; i++)
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| 80 | seq_printf(m, "%s0x%04x", i ? ", " : "",
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| 81 | cpu_data[n].watch_reg_masks[i]);
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| 82 | seq_putc(m, ']');
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| 83 | }
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| 84 |
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| 85 | seq_puts(m, "\nisa\t\t\t:");
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| 86 | if (cpu_has_mips_1)
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| 87 | seq_puts(m, " mips1");
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| 88 | if (cpu_has_mips_2)
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| 89 | seq_puts(m, " mips2");
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| 90 | if (cpu_has_mips_3)
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| 91 | seq_puts(m, " mips3");
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| 92 | if (cpu_has_mips_4)
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| 93 | seq_puts(m, " mips4");
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| 94 | if (cpu_has_mips_5)
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| 95 | seq_puts(m, " mips5");
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| 96 | if (cpu_has_mips32r1)
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| 97 | seq_puts(m, " mips32r1");
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| 98 | if (cpu_has_mips32r2)
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| 99 | seq_puts(m, " mips32r2");
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| 100 | if (cpu_has_mips32r5)
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| 101 | seq_puts(m, " mips32r5");
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| 102 | if (cpu_has_mips32r6)
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| 103 | seq_puts(m, " mips32r6");
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| 104 | if (cpu_has_mips64r1)
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| 105 | seq_puts(m, " mips64r1");
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| 106 | if (cpu_has_mips64r2)
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| 107 | seq_puts(m, " mips64r2");
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| 108 | if (cpu_has_mips64r5)
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| 109 | seq_puts(m, " mips64r5");
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| 110 | if (cpu_has_mips64r6)
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| 111 | seq_puts(m, " mips64r6");
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| 112 | seq_putc(m, '\n');
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| 113 |
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| 114 | seq_puts(m, "ASEs implemented\t:");
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| 115 | if (cpu_has_mips16)
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| 116 | seq_puts(m, " mips16");
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| 117 | if (cpu_has_mips16e2)
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| 118 | seq_puts(m, " mips16e2");
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| 119 | if (cpu_has_mdmx)
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| 120 | seq_puts(m, " mdmx");
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| 121 | if (cpu_has_mips3d)
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| 122 | seq_puts(m, " mips3d");
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| 123 | if (cpu_has_smartmips)
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| 124 | seq_puts(m, " smartmips");
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| 125 | if (cpu_has_dsp)
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| 126 | seq_puts(m, " dsp");
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| 127 | if (cpu_has_dsp2)
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| 128 | seq_puts(m, " dsp2");
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| 129 | if (cpu_has_dsp3)
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| 130 | seq_puts(m, " dsp3");
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| 131 | if (cpu_has_mipsmt)
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| 132 | seq_puts(m, " mt");
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| 133 | if (cpu_has_mmips)
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| 134 | seq_puts(m, " micromips");
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| 135 | if (cpu_has_vz)
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| 136 | seq_puts(m, " vz");
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| 137 | if (cpu_has_msa)
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| 138 | seq_puts(m, " msa");
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| 139 | if (cpu_has_eva)
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| 140 | seq_puts(m, " eva");
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| 141 | if (cpu_has_htw)
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| 142 | seq_puts(m, " htw");
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| 143 | if (cpu_has_xpa)
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| 144 | seq_puts(m, " xpa");
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| 145 | if (cpu_has_loongson_mmi)
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| 146 | seq_puts(m, " loongson-mmi");
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| 147 | if (cpu_has_loongson_cam)
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| 148 | seq_puts(m, " loongson-cam");
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| 149 | if (cpu_has_loongson_ext)
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| 150 | seq_puts(m, " loongson-ext");
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| 151 | if (cpu_has_loongson_ext2)
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| 152 | seq_puts(m, " loongson-ext2");
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| 153 | seq_putc(m, '\n');
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| 154 |
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| 155 | if (cpu_has_mmips)
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| 156 | seq_printf(m, "micromips kernel\t: %s\n",
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| 157 | str_yes_no(read_c0_config3() & MIPS_CONF3_ISA_OE));
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| 158 |
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| 159 | seq_puts(m, "Options implemented\t:");
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| 160 | if (cpu_has_tlb)
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| 161 | seq_puts(m, " tlb");
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| 162 | if (cpu_has_ftlb)
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| 163 | seq_puts(m, " ftlb");
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| 164 | if (cpu_has_tlbinv)
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| 165 | seq_puts(m, " tlbinv");
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| 166 | if (cpu_has_segments)
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| 167 | seq_puts(m, " segments");
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| 168 | if (cpu_has_rixiex)
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| 169 | seq_puts(m, " rixiex");
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| 170 | if (cpu_has_ldpte)
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| 171 | seq_puts(m, " ldpte");
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| 172 | if (cpu_has_maar)
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| 173 | seq_puts(m, " maar");
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| 174 | if (cpu_has_rw_llb)
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| 175 | seq_puts(m, " rw_llb");
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| 176 | if (cpu_has_4kex)
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| 177 | seq_puts(m, " 4kex");
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| 178 | if (cpu_has_3k_cache)
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| 179 | seq_puts(m, " 3k_cache");
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| 180 | if (cpu_has_4k_cache)
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| 181 | seq_puts(m, " 4k_cache");
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| 182 | if (cpu_has_octeon_cache)
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| 183 | seq_puts(m, " octeon_cache");
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| 184 | if (raw_cpu_has_fpu)
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| 185 | seq_puts(m, " fpu");
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| 186 | if (cpu_has_32fpr)
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| 187 | seq_puts(m, " 32fpr");
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| 188 | if (cpu_has_cache_cdex_p)
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| 189 | seq_puts(m, " cache_cdex_p");
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| 190 | if (cpu_has_cache_cdex_s)
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| 191 | seq_puts(m, " cache_cdex_s");
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| 192 | if (cpu_has_prefetch)
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| 193 | seq_puts(m, " prefetch");
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| 194 | if (cpu_has_mcheck)
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| 195 | seq_puts(m, " mcheck");
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| 196 | if (cpu_has_ejtag)
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| 197 | seq_puts(m, " ejtag");
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| 198 | if (cpu_has_llsc)
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| 199 | seq_puts(m, " llsc");
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| 200 | if (cpu_has_guestctl0ext)
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| 201 | seq_puts(m, " guestctl0ext");
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| 202 | if (cpu_has_guestctl1)
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| 203 | seq_puts(m, " guestctl1");
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| 204 | if (cpu_has_guestctl2)
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| 205 | seq_puts(m, " guestctl2");
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| 206 | if (cpu_has_guestid)
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| 207 | seq_puts(m, " guestid");
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| 208 | if (cpu_has_drg)
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| 209 | seq_puts(m, " drg");
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| 210 | if (cpu_has_rixi)
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| 211 | seq_puts(m, " rixi");
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| 212 | if (cpu_has_lpa)
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| 213 | seq_puts(m, " lpa");
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| 214 | if (cpu_has_mvh)
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| 215 | seq_puts(m, " mvh");
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| 216 | if (cpu_has_vtag_icache)
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| 217 | seq_puts(m, " vtag_icache");
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| 218 | if (cpu_has_dc_aliases)
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| 219 | seq_puts(m, " dc_aliases");
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| 220 | if (cpu_has_ic_fills_f_dc)
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| 221 | seq_puts(m, " ic_fills_f_dc");
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| 222 | if (cpu_has_pindexed_dcache)
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| 223 | seq_puts(m, " pindexed_dcache");
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| 224 | if (cpu_has_userlocal)
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| 225 | seq_puts(m, " userlocal");
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| 226 | if (cpu_has_nofpuex)
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| 227 | seq_puts(m, " nofpuex");
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| 228 | if (cpu_has_vint)
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| 229 | seq_puts(m, " vint");
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| 230 | if (cpu_has_veic)
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| 231 | seq_puts(m, " veic");
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| 232 | if (cpu_has_inclusive_pcaches)
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| 233 | seq_puts(m, " inclusive_pcaches");
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| 234 | if (cpu_has_perf_cntr_intr_bit)
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| 235 | seq_puts(m, " perf_cntr_intr_bit");
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| 236 | if (cpu_has_ufr)
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| 237 | seq_puts(m, " ufr");
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| 238 | if (cpu_has_fre)
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| 239 | seq_puts(m, " fre");
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| 240 | if (cpu_has_cdmm)
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| 241 | seq_puts(m, " cdmm");
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| 242 | if (cpu_has_small_pages)
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| 243 | seq_puts(m, " small_pages");
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| 244 | if (cpu_has_nan_legacy)
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| 245 | seq_puts(m, " nan_legacy");
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| 246 | if (cpu_has_nan_2008)
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| 247 | seq_puts(m, " nan_2008");
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| 248 | if (cpu_has_ebase_wg)
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| 249 | seq_puts(m, " ebase_wg");
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| 250 | if (cpu_has_badinstr)
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| 251 | seq_puts(m, " badinstr");
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| 252 | if (cpu_has_badinstrp)
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| 253 | seq_puts(m, " badinstrp");
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| 254 | if (cpu_has_contextconfig)
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| 255 | seq_puts(m, " contextconfig");
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| 256 | if (cpu_has_perf)
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| 257 | seq_puts(m, " perf");
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| 258 | if (cpu_has_mac2008_only)
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| 259 | seq_puts(m, " mac2008_only");
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| 260 | if (cpu_has_ftlbparex)
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| 261 | seq_puts(m, " ftlbparex");
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| 262 | if (cpu_has_gsexcex)
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| 263 | seq_puts(m, " gsexcex");
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| 264 | if (cpu_has_shared_ftlb_ram)
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| 265 | seq_puts(m, " shared_ftlb_ram");
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| 266 | if (cpu_has_shared_ftlb_entries)
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| 267 | seq_puts(m, " shared_ftlb_entries");
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| 268 | if (cpu_has_mipsmt_pertccounters)
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| 269 | seq_puts(m, " mipsmt_pertccounters");
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| 270 | if (cpu_has_mmid)
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| 271 | seq_puts(m, " mmid");
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| 272 | if (cpu_has_mm_sysad)
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| 273 | seq_puts(m, " mm_sysad");
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| 274 | if (cpu_has_mm_full)
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| 275 | seq_puts(m, " mm_full");
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| 276 | seq_putc(m, '\n');
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| 277 |
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| 278 | seq_printf(m, "shadow register sets\t: %d\n",
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| 279 | cpu_data[n].srsets);
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| 280 | seq_printf(m, "kscratch registers\t: %d\n",
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| 281 | hweight8(cpu_data[n].kscratch_mask));
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| 282 | seq_printf(m, "package\t\t\t: %d\n", cpu_data[n].package);
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| 283 | seq_printf(m, "core\t\t\t: %d\n", cpu_core(&cpu_data[n]));
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| 284 |
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| 285 | #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_CPU_MIPSR6)
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| 286 | if (cpu_has_mipsmt)
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| 287 | seq_printf(m, "VPE\t\t\t: %d\n", cpu_vpe_id(&cpu_data[n]));
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| 288 | else if (cpu_has_vp)
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| 289 | seq_printf(m, "VP\t\t\t: %d\n", cpu_vpe_id(&cpu_data[n]));
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| 290 | #endif
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| 291 |
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| 292 | sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
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| 293 | cpu_has_vce ? "%u" : "not available");
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| 294 | seq_printf(m, fmt, 'D', vced_count);
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| 295 | seq_printf(m, fmt, 'I', vcei_count);
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| 296 |
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| 297 | proc_cpuinfo_notifier_args.m = m;
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| 298 | proc_cpuinfo_notifier_args.n = n;
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| 299 |
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| 300 | raw_notifier_call_chain(&proc_cpuinfo_chain, 0,
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| 301 | &proc_cpuinfo_notifier_args);
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| 302 |
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| 303 | seq_putc(m, '\n');
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| 304 |
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| 305 | return 0;
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| 306 | }
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| 307 |
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| 308 | static void *c_start(struct seq_file *m, loff_t *pos)
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| 309 | {
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| 310 | unsigned long i = *pos;
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| 311 |
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| 312 | return i < nr_cpu_ids ? (void *) (i + 1) : NULL;
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| 313 | }
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| 314 |
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| 315 | static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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| 316 | {
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| 317 | ++*pos;
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| 318 | return c_start(m, pos);
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| 319 | }
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| 320 |
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| 321 | static void c_stop(struct seq_file *m, void *v)
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| 322 | {
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| 323 | }
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| 324 |
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| 325 | const struct seq_operations cpuinfo_op = {
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| 326 | .start = c_start,
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| 327 | .next = c_next,
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| 328 | .stop = c_stop,
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| 329 | .show = show_cpuinfo,
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| 330 | };
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