| 1 |
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| 2 | #ifndef _ASM_HASH_H
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| 3 | #define _ASM_HASH_H
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| 4 |
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| 5 | |
| 6 | * HP-PA only implements integer multiply in the FPU. However, for
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| 7 | * integer multiplies by constant, it has a number of shift-and-add
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| 8 | * (but no shift-and-subtract, sigh!) instructions that a compiler
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| 9 | * can synthesize a code sequence with.
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| 10 | *
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| 11 | * Unfortunately, GCC isn't very efficient at using them. For example
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| 12 | * it uses three instructions for "x *= 21" when only two are needed.
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| 13 | * But we can find a sequence manually.
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| 14 |
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| 15 |
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| 16 | #define HAVE_ARCH__HASH_32 1
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| 17 |
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| 18 | |
| 19 | * This is a multiply by GOLDEN_RATIO_32 = 0x61C88647 optimized for the
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| 20 | * PA7100 pairing rules. This is an in-order 2-way superscalar processor.
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| 21 | * Only one instruction in a pair may be a shift (by more than 3 bits),
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| 22 | * but other than that, simple ALU ops (including shift-and-add by up
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| 23 | * to 3 bits) may be paired arbitrarily.
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| 24 | *
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| 25 | * PA8xxx processors also dual-issue ALU instructions, although with
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| 26 | * fewer constraints, so this schedule is good for them, too.
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| 27 | *
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| 28 | * This 6-step sequence was found by Yevgen Voronenko's implementation
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| 29 | * of the Hcub algorithm at http://spiral.ece.cmu.edu/mcm/gen.html.
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| 30 |
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| 31 | static inline u32 __attribute_const__ __hash_32(u32 x)
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| 32 | {
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| 33 | u32 a, b, c;
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| 34 |
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| 35 | |
| 36 | * Phase 1: Compute a = (x << 19) + x,
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| 37 | * b = (x << 9) + a, c = (x << 23) + b.
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| 38 |
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| 39 | a = x << 19;
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| 40 | b = x << 9; a += x;
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| 41 | c = x << 23; b += a;
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| 42 | c += b;
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| 43 |
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| 44 | b <<= 11;
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| 45 | a += c << 3; b -= c;
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| 46 | return (a << 3) + b;
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| 47 | }
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| 48 |
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| 49 | #if BITS_PER_LONG == 64
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| 50 |
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| 51 | #define HAVE_ARCH_HASH_64 1
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| 52 |
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| 53 | |
| 54 | * Finding a good shift-and-add chain for GOLDEN_RATIO_64 is tricky,
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| 55 | * because available software for the purpose chokes on constants this
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| 56 | * large. (It's mostly designed for compiling FIR filter coefficients
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| 57 | * into FPGAs.)
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| 58 | *
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| 59 | * However, Jason Thong pointed out a work-around. The Hcub software
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| 60 | * (http://spiral.ece.cmu.edu/mcm/gen.html) is designed for *multiple*
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| 61 | * constant multiplication, and is good at finding shift-and-add chains
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| 62 | * which share common terms.
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| 63 | *
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| 64 | * Looking at 0x0x61C8864680B583EB in binary:
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| 65 | * 0110000111001000100001100100011010000000101101011000001111101011
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| 66 | * \______________/ \__________/ \_______/ \________/
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| 67 | * \____________________________/ \____________________/
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| 68 | * you can see the non-zero bits are divided into several well-separated
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| 69 | * blocks. Hcub can find algorithms for those terms separately, which
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| 70 | * can then be shifted and added together.
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| 71 | *
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| 72 | * Dividing the input into 2, 3 or 4 blocks, Hcub can find solutions
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| 73 | * with 10, 9 or 8 adds, respectively, making a total of 11 for the
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| 74 | * whole number.
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| 75 | *
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| 76 | * Using just two large blocks, 0xC3910C8D << 31 in the high bits,
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| 77 | * and 0xB583EB in the low bits, produces as good an algorithm as any,
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| 78 | * and with one more small shift than alternatives.
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| 79 | *
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| 80 | * The high bits are a larger number and more work to compute, as well
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| 81 | * as needing one extra cycle to shift left 31 bits before the final
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| 82 | * addition, so they are the critical path for scheduling. The low bits
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| 83 | * can fit into the scheduling slots left over.
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| 84 |
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| 85 |
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| 86 |
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| 87 | |
| 88 | * This _ASSIGN(dst, src) macro performs "dst = src", but prevents GCC
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| 89 | * from inferring anything about the value assigned to "dest".
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| 90 | *
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| 91 | * This prevents it from mis-optimizing certain sequences.
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| 92 | * In particular, gcc is annoyingly eager to combine consecutive shifts.
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| 93 | * Given "x <<= 19; y += x; z += x << 1;", GCC will turn this into
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| 94 | * "y += x << 19; z += x << 20;" even though the latter sequence needs
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| 95 | * an additional instruction and temporary register.
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| 96 | *
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| 97 | * Because no actual assembly code is generated, this construct is
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| 98 | * usefully portable across all GCC platforms, and so can be test-compiled
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| 99 | * on non-PA systems.
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| 100 | *
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| 101 | * In two places, additional unused input dependencies are added. This
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| 102 | * forces GCC's scheduling so it does not rearrange instructions too much.
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| 103 | * Because the PA-8xxx is out of order, I'm not sure how much this matters,
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| 104 | * but why make it more difficult for the processor than necessary?
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| 105 |
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| 106 | #define _ASSIGN(dst, src, ...) asm("" : "=r" (dst) : "0" (src), ##__VA_ARGS__)
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| 107 |
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| 108 | |
| 109 | * Multiply by GOLDEN_RATIO_64 = 0x0x61C8864680B583EB using a heavily
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| 110 | * optimized shift-and-add sequence.
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| 111 | *
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| 112 | * Without the final shift, the multiply proper is 19 instructions,
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| 113 | * 10 cycles and uses only 4 temporaries. Whew!
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| 114 | *
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| 115 | * You are not expected to understand this.
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| 116 |
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| 117 | static __always_inline u32 __attribute_const__
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| 118 | hash_64(u64 a, unsigned int bits)
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| 119 | {
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| 120 | u64 b, c, d;
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| 121 |
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| 122 | |
| 123 | * Encourage GCC to move a dynamic shift to %sar early,
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| 124 | * thereby freeing up an additional temporary register.
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| 125 |
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| 126 | if (!__builtin_constant_p(bits))
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| 127 | asm("" : "=q" (bits) : "0" (64 - bits));
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| 128 | else
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| 129 | bits = 64 - bits;
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| 130 |
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| 131 | _ASSIGN(b, a*5); c = a << 13;
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| 132 | b = (b << 2) + a; _ASSIGN(d, a << 17);
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| 133 | a = b + (a << 1); c += d;
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| 134 | d = a << 10; _ASSIGN(a, a << 19);
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| 135 | d = a - d; _ASSIGN(a, a << 4, "X" (d));
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| 136 | c += b; a += b;
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| 137 | d -= c; c += a << 1;
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| 138 | a += c << 3; _ASSIGN(b, b << (7+31), "X" (c), "X" (d));
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| 139 | a <<= 31; b += d;
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| 140 | a += b;
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| 141 | return a >> bits;
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| 142 | }
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| 143 | #undef _ASSIGN
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| 144 |
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| 145 | #endif
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| 146 |
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| 147 | #endif
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