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| 2 | |
| 3 | * include/asm-parisc/prefetch.h
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| 4 | *
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| 5 | * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book.
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| 6 | * In addition, many implementations do hardware prefetching of both
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| 7 | * instructions and data.
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| 8 | *
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| 9 | * PA7300LC (page 14-4 of the ERS) also implements prefetching by a load
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| 10 | * to gr0 but not in a way that Linux can use. If the load would cause an
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| 11 | * interruption (eg due to prefetching 0), it is suppressed on PA2.0
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| 12 | * processors, but not on 7300LC.
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| 13 | *
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| 14 |
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| 15 |
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| 16 | #ifndef __ASM_PARISC_PREFETCH_H
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| 17 | #define __ASM_PARISC_PREFETCH_H
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| 18 |
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| 19 | #ifndef __ASSEMBLER__
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| 20 | #ifdef CONFIG_PREFETCH
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| 21 |
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| 22 | #define ARCH_HAS_PREFETCH
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| 23 | static inline void prefetch(const void *addr)
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| 24 | {
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| 25 | __asm__(
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| 26 | #ifndef CONFIG_PA20
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| 27 |
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| 28 | " extrw,u,= %0,31,32,%%r0\n"
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| 29 | #endif
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| 30 | " ldw 0(%0), %%r0" : : "r" (addr));
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| 31 | }
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| 32 |
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| 33 |
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| 34 | #ifdef CONFIG_PA20
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| 35 | #define ARCH_HAS_PREFETCHW
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| 36 | static inline void prefetchw(const void *addr)
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| 37 | {
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| 38 | __asm__("ldd 0(%0), %%r0" : : "r" (addr));
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| 39 | }
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| 40 | #endif
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| 41 |
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| 42 | #endif
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| 43 | #endif
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| 44 |
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| 45 | #endif
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