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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Common time service routines for parisc machines.
4 * based on arch/loongarch/kernel/time.c
5 *
6 * Copyright (C) 2024 Helge Deller <[email protected]>
7 */
8#include <linux/clockchips.h>
9#include <linux/delay.h>
10#include <linux/export.h>
11#include <linux/init.h>
12#include <linux/interrupt.h>
13#include <linux/kernel.h>
14#include <linux/sched_clock.h>
15#include <linux/spinlock.h>
16#include <linux/rtc.h>
17#include <linux/platform_device.h>
18#include <asm/processor.h>
19#include <asm/pdcpat.h>
20
21static u64 cr16_clock_freq;
22static unsigned long clocktick;
23
24int time_keeper_id; /* CPU used for timekeeping */
25
26static DEFINE_PER_CPU(struct clock_event_device, parisc_clockevent_device);
27
28static void parisc_event_handler(struct clock_event_device *dev)
29{
30}
31
32static int parisc_timer_next_event(unsigned long delta, struct clock_event_device *evt)
33{
34 unsigned long new_cr16;
35
36 new_cr16 = mfctl(16) + delta;
37 mtctl(new_cr16, 16);
38
39 return 0;
40}
41
42irqreturn_t timer_interrupt(int irq, void *data)
43{
44 struct clock_event_device *cd;
45 int cpu = smp_processor_id();
46
47 cd = &per_cpu(parisc_clockevent_device, cpu);
48
49 if (clockevent_state_periodic(cd))
50 parisc_timer_next_event(clocktick, cd);
51
52 if (clockevent_state_periodic(cd) || clockevent_state_oneshot(cd))
53 cd->event_handler(cd);
54
55 return IRQ_HANDLED;
56}
57
58static int parisc_set_state_oneshot(struct clock_event_device *evt)
59{
60 parisc_timer_next_event(clocktick, evt);
61
62 return 0;
63}
64
65static int parisc_set_state_periodic(struct clock_event_device *evt)
66{
67 parisc_timer_next_event(clocktick, evt);
68
69 return 0;
70}
71
72static int parisc_set_state_shutdown(struct clock_event_device *evt)
73{
74 return 0;
75}
76
77void parisc_clockevent_init(void)
78{
79 unsigned int cpu = smp_processor_id();
80 unsigned long min_delta = 0x600; /* XXX */
81 unsigned long max_delta = (1UL << (BITS_PER_LONG - 1));
82 struct clock_event_device *cd;
83
84 cd = &per_cpu(parisc_clockevent_device, cpu);
85
86 cd->name = "cr16_clockevent";
87 cd->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC |
88 CLOCK_EVT_FEAT_PERCPU;
89
90 cd->irq = TIMER_IRQ;
91 cd->rating = 320;
92 cd->cpumask = cpumask_of(cpu);
93 cd->set_state_oneshot = parisc_set_state_oneshot;
94 cd->set_state_oneshot_stopped = parisc_set_state_shutdown;
95 cd->set_state_periodic = parisc_set_state_periodic;
96 cd->set_state_shutdown = parisc_set_state_shutdown;
97 cd->set_next_event = parisc_timer_next_event;
98 cd->event_handler = parisc_event_handler;
99
100 clockevents_config_and_register(cd, cr16_clock_freq, min_delta, max_delta);
101}
102
103static void parisc_find_64bit_counter(void)
104{
105#ifdef CONFIG_64BIT
106 uint64_t *pclock;
107 unsigned long freq, unique;
108 int ret;
109
110 ret = pdc_pat_pd_get_platform_counter(&pclock, &freq, &unique);
111 if (ret == PDC_OK)
112 pr_info("64-bit counter found at %px, freq: %lu, unique: %lu\n",
113 pclock, freq, unique);
114 else
115 pr_info("64-bit counter not found.\n");
116#endif
117}
118
119unsigned long notrace profile_pc(struct pt_regs *regs)
120{
121 unsigned long pc = instruction_pointer(regs);
122
123 if (regs->gr[0] & PSW_N)
124 pc -= 4;
125
126#ifdef CONFIG_SMP
127 if (in_lock_functions(pc))
128 pc = regs->gr[2];
129#endif
130
131 return pc;
132}
133EXPORT_SYMBOL(profile_pc);
134
135#if IS_ENABLED(CONFIG_RTC_DRV_GENERIC)
136static int rtc_generic_get_time(struct device *dev, struct rtc_time *tm)
137{
138 struct pdc_tod tod_data;
139
140 memset(tm, 0, sizeof(*tm));
141 if (pdc_tod_read(&tod_data) < 0)
142 return -EOPNOTSUPP;
143
144 /* we treat tod_sec as unsigned, so this can work until year 2106 */
145 rtc_time64_to_tm(tod_data.tod_sec, tm);
146 return 0;
147}
148
149static int rtc_generic_set_time(struct device *dev, struct rtc_time *tm)
150{
151 time64_t secs = rtc_tm_to_time64(tm);
152 int ret;
153
154 /* hppa has Y2K38 problem: pdc_tod_set() takes an u32 value! */
155 ret = pdc_tod_set(secs, 0);
156 if (ret != 0) {
157 pr_warn("pdc_tod_set(%lld) returned error %d\n", secs, ret);
158 if (ret == PDC_INVALID_ARG)
159 return -EINVAL;
160 return -EOPNOTSUPP;
161 }
162
163 return 0;
164}
165
166static const struct rtc_class_ops rtc_generic_ops = {
167 .read_time = rtc_generic_get_time,
168 .set_time = rtc_generic_set_time,
169};
170
171static int __init rtc_init(void)
172{
173 struct platform_device *pdev;
174
175 pdev = platform_device_register_data(NULL, "rtc-generic", -1,
176 &rtc_generic_ops,
177 sizeof(rtc_generic_ops));
178
179 return PTR_ERR_OR_ZERO(pdev);
180}
181device_initcall(rtc_init);
182#endif
183
184void read_persistent_clock64(struct timespec64 *ts)
185{
186 static struct pdc_tod tod_data;
187 if (pdc_tod_read(&tod_data) == 0) {
188 ts->tv_sec = tod_data.tod_sec;
189 ts->tv_nsec = tod_data.tod_usec * 1000;
190 } else {
191 printk(KERN_ERR "Error reading tod clock\n");
192 ts->tv_sec = 0;
193 ts->tv_nsec = 0;
194 }
195}
196
197static u64 notrace read_cr16_sched_clock(void)
198{
199 return get_cycles();
200}
201
202static u64 notrace read_cr16(struct clocksource *cs)
203{
204 return get_cycles();
205}
206
207static struct clocksource clocksource_cr16 = {
208 .name = "cr16",
209 .rating = 300,
210 .read = read_cr16,
211 .mask = CLOCKSOURCE_MASK(BITS_PER_LONG),
212 .flags = CLOCK_SOURCE_IS_CONTINUOUS |
213 CLOCK_SOURCE_VALID_FOR_HRES,
214};
215
216/*
217 * timer interrupt and sched_clock() initialization
218 */
219
220void __init time_init(void)
221{
222 cr16_clock_freq = 100 * PAGE0->mem_10msec; /* Hz */
223 clocktick = cr16_clock_freq / HZ;
224
225 /* register as sched_clock source */
226 sched_clock_register(read_cr16_sched_clock, BITS_PER_LONG, cr16_clock_freq);
227
228 parisc_clockevent_init();
229
230 /* check for free-running 64-bit platform counter */
231 parisc_find_64bit_counter();
232
233 /* register at clocksource framework */
234 clocksource_register_hz(&clocksource_cr16, cr16_clock_freq);
235}