| 1 |
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| 2 | |
| 3 | * PS3 platform declarations.
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| 4 | *
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| 5 | * Copyright (C) 2006 Sony Computer Entertainment Inc.
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| 6 | * Copyright 2006 Sony Corp.
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| 7 |
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| 8 |
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| 9 | #if !defined(_ASM_POWERPC_PS3_H)
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| 10 | #define _ASM_POWERPC_PS3_H
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| 11 |
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| 12 | #include <linux/types.h>
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| 13 | #include <linux/device.h>
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| 14 | #include <asm/cell-pmu.h>
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| 15 |
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| 16 | union ps3_firmware_version {
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| 17 | u64 raw;
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| 18 | struct {
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| 19 | u16 pad;
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| 20 | u16 major;
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| 21 | u16 minor;
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| 22 | u16 rev;
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| 23 | };
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| 24 | };
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| 25 |
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| 26 | void ps3_get_firmware_version(union ps3_firmware_version *v);
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| 27 | int ps3_compare_firmware_version(u16 major, u16 minor, u16 rev);
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| 28 |
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| 29 |
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| 30 |
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| 31 | enum ps3_param_av_multi_out {
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| 32 | PS3_PARAM_AV_MULTI_OUT_NTSC = 0,
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| 33 | PS3_PARAM_AV_MULTI_OUT_PAL_RGB = 1,
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| 34 | PS3_PARAM_AV_MULTI_OUT_PAL_YCBCR = 2,
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| 35 | PS3_PARAM_AV_MULTI_OUT_SECAM = 3,
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| 36 | };
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| 37 |
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| 38 | enum ps3_param_av_multi_out ps3_os_area_get_av_multi_out(void);
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| 39 |
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| 40 | extern u64 ps3_os_area_get_rtc_diff(void);
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| 41 | extern void ps3_os_area_set_rtc_diff(u64 rtc_diff);
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| 42 |
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| 43 | struct ps3_os_area_flash_ops {
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| 44 | ssize_t (*read)(void *buf, size_t count, loff_t pos);
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| 45 | ssize_t (*write)(const void *buf, size_t count, loff_t pos);
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| 46 | };
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| 47 |
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| 48 | extern void ps3_os_area_flash_register(const struct ps3_os_area_flash_ops *ops);
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| 49 |
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| 50 |
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| 51 |
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| 52 | enum ps3_dma_page_size {
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| 53 | PS3_DMA_4K = 12U,
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| 54 | PS3_DMA_64K = 16U,
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| 55 | PS3_DMA_1M = 20U,
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| 56 | PS3_DMA_16M = 24U,
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| 57 | };
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| 58 |
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| 59 | enum ps3_dma_region_type {
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| 60 | PS3_DMA_OTHER = 0,
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| 61 | PS3_DMA_INTERNAL = 2,
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| 62 | };
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| 63 |
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| 64 | struct ps3_dma_region_ops;
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| 65 |
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| 66 | |
| 67 | * struct ps3_dma_region - A per device dma state variables structure
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| 68 | * @dev: device structure
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| 69 | * @did: The HV device id.
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| 70 | * @page_size: The ioc pagesize.
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| 71 | * @region_type: The HV region type.
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| 72 | * @bus_addr: The 'translated' bus address of the region.
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| 73 | * @len: The length in bytes of the region.
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| 74 | * @offset: The offset from the start of memory of the region.
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| 75 | * @dma_mask: Device dma_mask.
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| 76 | * @ioid: The IOID of the device who owns this region
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| 77 | * @chunk_list: Opaque variable used by the ioc page manager.
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| 78 | * @region_ops: struct ps3_dma_region_ops - dma region operations
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| 79 |
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| 80 |
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| 81 | struct ps3_dma_region {
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| 82 | struct ps3_system_bus_device *dev;
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| 83 |
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| 84 | const struct ps3_dma_region_ops *region_ops;
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| 85 | unsigned char ioid;
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| 86 | enum ps3_dma_page_size page_size;
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| 87 | enum ps3_dma_region_type region_type;
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| 88 | unsigned long len;
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| 89 | unsigned long offset;
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| 90 | u64 dma_mask;
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| 91 |
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| 92 |
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| 93 | unsigned long bus_addr;
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| 94 | struct {
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| 95 | spinlock_t lock;
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| 96 | struct list_head head;
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| 97 | } chunk_list;
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| 98 | };
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| 99 |
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| 100 | struct ps3_dma_region_ops {
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| 101 | int (*create)(struct ps3_dma_region *);
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| 102 | int (*free)(struct ps3_dma_region *);
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| 103 | int (*map)(struct ps3_dma_region *,
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| 104 | unsigned long virt_addr,
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| 105 | unsigned long len,
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| 106 | dma_addr_t *bus_addr,
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| 107 | u64 iopte_pp);
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| 108 | int (*unmap)(struct ps3_dma_region *,
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| 109 | dma_addr_t bus_addr,
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| 110 | unsigned long len);
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| 111 | };
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| 112 |
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| 113 | struct ps3_system_bus_device;
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| 114 |
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| 115 | |
| 116 | * struct ps3_dma_region_init - Helper to initialize structure variables
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| 117 | *
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| 118 | * Helper to properly initialize variables prior to calling
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| 119 | * ps3_system_bus_device_register.
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| 120 |
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| 121 | int ps3_dma_region_init(struct ps3_system_bus_device *dev,
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| 122 | struct ps3_dma_region *r, enum ps3_dma_page_size page_size,
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| 123 | enum ps3_dma_region_type region_type, void *addr, unsigned long len);
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| 124 | int ps3_dma_region_create(struct ps3_dma_region *r);
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| 125 | int ps3_dma_region_free(struct ps3_dma_region *r);
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| 126 | int ps3_dma_map(struct ps3_dma_region *r, unsigned long virt_addr,
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| 127 | unsigned long len, dma_addr_t *bus_addr,
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| 128 | u64 iopte_pp);
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| 129 | int ps3_dma_unmap(struct ps3_dma_region *r, dma_addr_t bus_addr,
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| 130 | unsigned long len);
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| 131 |
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| 132 |
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| 133 |
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| 134 | enum ps3_mmio_page_size {
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| 135 | PS3_MMIO_4K = 12U,
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| 136 | PS3_MMIO_64K = 16U
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| 137 | };
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| 138 |
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| 139 | struct ps3_mmio_region_ops;
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| 140 | |
| 141 | * struct ps3_mmio_region - a per device mmio state variables structure
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| 142 | *
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| 143 | * Current systems can be supported with a single region per device.
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| 144 |
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| 145 |
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| 146 | struct ps3_mmio_region {
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| 147 | struct ps3_system_bus_device *dev;
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| 148 | const struct ps3_mmio_region_ops *mmio_ops;
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| 149 | unsigned long bus_addr;
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| 150 | unsigned long len;
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| 151 | enum ps3_mmio_page_size page_size;
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| 152 | unsigned long lpar_addr;
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| 153 | };
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| 154 |
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| 155 | struct ps3_mmio_region_ops {
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| 156 | int (*create)(struct ps3_mmio_region *);
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| 157 | int (*free)(struct ps3_mmio_region *);
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| 158 | };
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| 159 | |
| 160 | * ps3_mmio_region_init - Helper to initialize structure variables
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| 161 | *
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| 162 | * Helper to properly initialize variables prior to calling
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| 163 | * ps3_system_bus_device_register.
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| 164 | *
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| 165 | * Returns: %0 on success, %-errno on error (or BUG())
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| 166 |
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| 167 |
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| 168 | int ps3_mmio_region_init(struct ps3_system_bus_device *dev,
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| 169 | struct ps3_mmio_region *r, unsigned long bus_addr, unsigned long len,
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| 170 | enum ps3_mmio_page_size page_size);
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| 171 | int ps3_mmio_region_create(struct ps3_mmio_region *r);
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| 172 | int ps3_free_mmio_region(struct ps3_mmio_region *r);
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| 173 | unsigned long ps3_mm_phys_to_lpar(unsigned long phys_addr);
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| 174 |
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| 175 |
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| 176 |
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| 177 | enum ps3_cpu_binding {
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| 178 | PS3_BINDING_CPU_ANY = -1,
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| 179 | PS3_BINDING_CPU_0 = 0,
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| 180 | PS3_BINDING_CPU_1 = 1,
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| 181 | };
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| 182 |
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| 183 | int ps3_irq_plug_setup(enum ps3_cpu_binding cpu, unsigned long outlet,
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| 184 | unsigned int *virq);
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| 185 | int ps3_irq_plug_destroy(unsigned int virq);
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| 186 | int ps3_event_receive_port_setup(enum ps3_cpu_binding cpu, unsigned int *virq);
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| 187 | int ps3_event_receive_port_destroy(unsigned int virq);
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| 188 | int ps3_send_event_locally(unsigned int virq);
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| 189 |
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| 190 | int ps3_io_irq_setup(enum ps3_cpu_binding cpu, unsigned int interrupt_id,
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| 191 | unsigned int *virq);
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| 192 | int ps3_io_irq_destroy(unsigned int virq);
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| 193 | int ps3_vuart_irq_setup(enum ps3_cpu_binding cpu, void* virt_addr_bmp,
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| 194 | unsigned int *virq);
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| 195 | int ps3_vuart_irq_destroy(unsigned int virq);
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| 196 | int ps3_spe_irq_setup(enum ps3_cpu_binding cpu, unsigned long spe_id,
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| 197 | unsigned int class, unsigned int *virq);
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| 198 | int ps3_spe_irq_destroy(unsigned int virq);
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| 199 |
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| 200 | int ps3_sb_event_receive_port_setup(struct ps3_system_bus_device *dev,
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| 201 | enum ps3_cpu_binding cpu, unsigned int *virq);
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| 202 | int ps3_sb_event_receive_port_destroy(struct ps3_system_bus_device *dev,
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| 203 | unsigned int virq);
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| 204 |
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| 205 |
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| 206 |
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| 207 | enum lv1_result {
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| 208 | LV1_SUCCESS = 0,
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| 209 |
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| 210 | LV1_RESOURCE_SHORTAGE = -2,
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| 211 | LV1_NO_PRIVILEGE = -3,
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| 212 | LV1_DENIED_BY_POLICY = -4,
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| 213 | LV1_ACCESS_VIOLATION = -5,
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| 214 | LV1_NO_ENTRY = -6,
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| 215 | LV1_DUPLICATE_ENTRY = -7,
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| 216 | LV1_TYPE_MISMATCH = -8,
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| 217 | LV1_BUSY = -9,
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| 218 | LV1_EMPTY = -10,
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| 219 | LV1_WRONG_STATE = -11,
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| 220 |
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| 221 | LV1_NO_MATCH = -13,
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| 222 | LV1_ALREADY_CONNECTED = -14,
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| 223 | LV1_UNSUPPORTED_PARAMETER_VALUE = -15,
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| 224 | LV1_CONDITION_NOT_SATISFIED = -16,
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| 225 | LV1_ILLEGAL_PARAMETER_VALUE = -17,
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| 226 | LV1_BAD_OPTION = -18,
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| 227 | LV1_IMPLEMENTATION_LIMITATION = -19,
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| 228 | LV1_NOT_IMPLEMENTED = -20,
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| 229 | LV1_INVALID_CLASS_ID = -21,
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| 230 | LV1_CONSTRAINT_NOT_SATISFIED = -22,
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| 231 | LV1_ALIGNMENT_ERROR = -23,
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| 232 | LV1_HARDWARE_ERROR = -24,
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| 233 | LV1_INVALID_DATA_FORMAT = -25,
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| 234 | LV1_INVALID_OPERATION = -26,
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| 235 | LV1_INTERNAL_ERROR = -32768,
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| 236 | };
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| 237 |
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| 238 | static inline const char* ps3_result(int result)
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| 239 | {
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| 240 | #if defined(DEBUG) || defined(PS3_VERBOSE_RESULT) || defined(CONFIG_PS3_VERBOSE_RESULT)
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| 241 | switch (result) {
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| 242 | case LV1_SUCCESS:
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| 243 | return "LV1_SUCCESS (0)";
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| 244 | case -1:
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| 245 | return "** unknown result ** (-1)";
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| 246 | case LV1_RESOURCE_SHORTAGE:
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| 247 | return "LV1_RESOURCE_SHORTAGE (-2)";
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| 248 | case LV1_NO_PRIVILEGE:
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| 249 | return "LV1_NO_PRIVILEGE (-3)";
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| 250 | case LV1_DENIED_BY_POLICY:
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| 251 | return "LV1_DENIED_BY_POLICY (-4)";
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| 252 | case LV1_ACCESS_VIOLATION:
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| 253 | return "LV1_ACCESS_VIOLATION (-5)";
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| 254 | case LV1_NO_ENTRY:
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| 255 | return "LV1_NO_ENTRY (-6)";
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| 256 | case LV1_DUPLICATE_ENTRY:
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| 257 | return "LV1_DUPLICATE_ENTRY (-7)";
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| 258 | case LV1_TYPE_MISMATCH:
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| 259 | return "LV1_TYPE_MISMATCH (-8)";
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| 260 | case LV1_BUSY:
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| 261 | return "LV1_BUSY (-9)";
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| 262 | case LV1_EMPTY:
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| 263 | return "LV1_EMPTY (-10)";
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| 264 | case LV1_WRONG_STATE:
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| 265 | return "LV1_WRONG_STATE (-11)";
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| 266 | case -12:
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| 267 | return "** unknown result ** (-12)";
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| 268 | case LV1_NO_MATCH:
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| 269 | return "LV1_NO_MATCH (-13)";
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| 270 | case LV1_ALREADY_CONNECTED:
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| 271 | return "LV1_ALREADY_CONNECTED (-14)";
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| 272 | case LV1_UNSUPPORTED_PARAMETER_VALUE:
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| 273 | return "LV1_UNSUPPORTED_PARAMETER_VALUE (-15)";
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| 274 | case LV1_CONDITION_NOT_SATISFIED:
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| 275 | return "LV1_CONDITION_NOT_SATISFIED (-16)";
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| 276 | case LV1_ILLEGAL_PARAMETER_VALUE:
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| 277 | return "LV1_ILLEGAL_PARAMETER_VALUE (-17)";
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| 278 | case LV1_BAD_OPTION:
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| 279 | return "LV1_BAD_OPTION (-18)";
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| 280 | case LV1_IMPLEMENTATION_LIMITATION:
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| 281 | return "LV1_IMPLEMENTATION_LIMITATION (-19)";
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| 282 | case LV1_NOT_IMPLEMENTED:
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| 283 | return "LV1_NOT_IMPLEMENTED (-20)";
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| 284 | case LV1_INVALID_CLASS_ID:
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| 285 | return "LV1_INVALID_CLASS_ID (-21)";
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| 286 | case LV1_CONSTRAINT_NOT_SATISFIED:
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| 287 | return "LV1_CONSTRAINT_NOT_SATISFIED (-22)";
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| 288 | case LV1_ALIGNMENT_ERROR:
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| 289 | return "LV1_ALIGNMENT_ERROR (-23)";
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| 290 | case LV1_HARDWARE_ERROR:
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| 291 | return "LV1_HARDWARE_ERROR (-24)";
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| 292 | case LV1_INVALID_DATA_FORMAT:
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| 293 | return "LV1_INVALID_DATA_FORMAT (-25)";
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| 294 | case LV1_INVALID_OPERATION:
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| 295 | return "LV1_INVALID_OPERATION (-26)";
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| 296 | case LV1_INTERNAL_ERROR:
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| 297 | return "LV1_INTERNAL_ERROR (-32768)";
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| 298 | default:
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| 299 | BUG();
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| 300 | return "** unknown result **";
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| 301 | };
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| 302 | #else
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| 303 | return "";
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| 304 | #endif
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| 305 | }
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| 306 |
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| 307 |
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| 308 |
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| 309 | enum ps3_match_id {
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| 310 | PS3_MATCH_ID_EHCI = 1,
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| 311 | PS3_MATCH_ID_OHCI = 2,
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| 312 | PS3_MATCH_ID_GELIC = 3,
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| 313 | PS3_MATCH_ID_AV_SETTINGS = 4,
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| 314 | PS3_MATCH_ID_SYSTEM_MANAGER = 5,
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| 315 | PS3_MATCH_ID_STOR_DISK = 6,
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| 316 | PS3_MATCH_ID_STOR_ROM = 7,
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| 317 | PS3_MATCH_ID_STOR_FLASH = 8,
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| 318 | PS3_MATCH_ID_SOUND = 9,
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| 319 | PS3_MATCH_ID_GPU = 10,
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| 320 | PS3_MATCH_ID_LPM = 11,
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| 321 | };
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| 322 |
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| 323 | enum ps3_match_sub_id {
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| 324 | PS3_MATCH_SUB_ID_GPU_FB = 1,
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| 325 | PS3_MATCH_SUB_ID_GPU_RAMDISK = 2,
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| 326 | };
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| 327 |
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| 328 | #define PS3_MODULE_ALIAS_EHCI "ps3:1:0"
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| 329 | #define PS3_MODULE_ALIAS_OHCI "ps3:2:0"
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| 330 | #define PS3_MODULE_ALIAS_GELIC "ps3:3:0"
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| 331 | #define PS3_MODULE_ALIAS_AV_SETTINGS "ps3:4:0"
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| 332 | #define PS3_MODULE_ALIAS_SYSTEM_MANAGER "ps3:5:0"
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| 333 | #define PS3_MODULE_ALIAS_STOR_DISK "ps3:6:0"
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| 334 | #define PS3_MODULE_ALIAS_STOR_ROM "ps3:7:0"
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| 335 | #define PS3_MODULE_ALIAS_STOR_FLASH "ps3:8:0"
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| 336 | #define PS3_MODULE_ALIAS_SOUND "ps3:9:0"
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| 337 | #define PS3_MODULE_ALIAS_GPU_FB "ps3:10:1"
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| 338 | #define PS3_MODULE_ALIAS_GPU_RAMDISK "ps3:10:2"
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| 339 | #define PS3_MODULE_ALIAS_LPM "ps3:11:0"
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| 340 |
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| 341 | enum ps3_system_bus_device_type {
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| 342 | PS3_DEVICE_TYPE_IOC0 = 1,
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| 343 | PS3_DEVICE_TYPE_SB,
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| 344 | PS3_DEVICE_TYPE_VUART,
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| 345 | PS3_DEVICE_TYPE_LPM,
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| 346 | };
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| 347 |
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| 348 | |
| 349 | * struct ps3_system_bus_device - a device on the system bus
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| 350 |
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| 351 |
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| 352 | struct ps3_system_bus_device {
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| 353 | enum ps3_match_id match_id;
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| 354 | enum ps3_match_sub_id match_sub_id;
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| 355 | enum ps3_system_bus_device_type dev_type;
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| 356 |
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| 357 | u64 bus_id;
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| 358 | u64 dev_id;
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| 359 | unsigned int interrupt_id;
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| 360 | struct ps3_dma_region *d_region;
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| 361 | struct ps3_mmio_region *m_region;
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| 362 | unsigned int port_number;
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| 363 | struct {
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| 364 | u64 node_id;
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| 365 | u64 pu_id;
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| 366 | u64 rights;
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| 367 | } lpm;
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| 368 |
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| 369 |
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| 370 | struct device core;
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| 371 | void *driver_priv;
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| 372 | };
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| 373 |
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| 374 | int ps3_open_hv_device(struct ps3_system_bus_device *dev);
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| 375 | int ps3_close_hv_device(struct ps3_system_bus_device *dev);
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| 376 |
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| 377 | |
| 378 | * struct ps3_system_bus_driver - a driver for a device on the system bus
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| 379 |
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| 380 |
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| 381 | struct ps3_system_bus_driver {
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| 382 | enum ps3_match_id match_id;
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| 383 | enum ps3_match_sub_id match_sub_id;
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| 384 | struct device_driver core;
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| 385 | int (*probe)(struct ps3_system_bus_device *);
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| 386 | void (*remove)(struct ps3_system_bus_device *);
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| 387 | void (*shutdown)(struct ps3_system_bus_device *);
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| 388 |
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| 389 |
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| 390 | };
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| 391 |
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| 392 | int ps3_system_bus_device_register(struct ps3_system_bus_device *dev);
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| 393 | int ps3_system_bus_driver_register(struct ps3_system_bus_driver *drv);
|
| 394 | void ps3_system_bus_driver_unregister(struct ps3_system_bus_driver *drv);
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| 395 |
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| 396 | #define ps3_drv_to_system_bus_drv(_drv) container_of_const(_drv, struct ps3_system_bus_driver, core)
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| 397 | static inline struct ps3_system_bus_device *ps3_dev_to_system_bus_dev(
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| 398 | const struct device *_dev)
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| 399 | {
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| 400 | return container_of(_dev, struct ps3_system_bus_device, core);
|
| 401 | }
|
| 402 | static inline struct ps3_system_bus_driver *
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| 403 | ps3_system_bus_dev_to_system_bus_drv(struct ps3_system_bus_device *_dev)
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| 404 | {
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| 405 | BUG_ON(!_dev);
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| 406 | BUG_ON(!_dev->core.driver);
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| 407 | return ps3_drv_to_system_bus_drv(_dev->core.driver);
|
| 408 | }
|
| 409 |
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| 410 | |
| 411 | * ps3_system_bus_set_drvdata - set driver's private data for this device
|
| 412 | * @dev: device structure
|
| 413 | * @data: Data to set
|
| 414 |
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| 415 |
|
| 416 | static inline void ps3_system_bus_set_drvdata(
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| 417 | struct ps3_system_bus_device *dev, void *data)
|
| 418 | {
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| 419 | dev_set_drvdata(&dev->core, data);
|
| 420 | }
|
| 421 | static inline void *ps3_system_bus_get_drvdata(
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| 422 | struct ps3_system_bus_device *dev)
|
| 423 | {
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| 424 | return dev_get_drvdata(&dev->core);
|
| 425 | }
|
| 426 |
|
| 427 |
|
| 428 |
|
| 429 | struct ps3_sys_manager_ops {
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| 430 | struct ps3_system_bus_device *dev;
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| 431 | void (*power_off)(struct ps3_system_bus_device *dev);
|
| 432 | void (*restart)(struct ps3_system_bus_device *dev);
|
| 433 | };
|
| 434 |
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| 435 | void ps3_sys_manager_register_ops(const struct ps3_sys_manager_ops *ops);
|
| 436 | void __noreturn ps3_sys_manager_power_off(void);
|
| 437 | void __noreturn ps3_sys_manager_restart(void);
|
| 438 | void __noreturn ps3_sys_manager_halt(void);
|
| 439 | int ps3_sys_manager_get_wol(void);
|
| 440 | void ps3_sys_manager_set_wol(int state);
|
| 441 |
|
| 442 | struct ps3_prealloc {
|
| 443 | const char *name;
|
| 444 | void *address;
|
| 445 | unsigned long size;
|
| 446 | unsigned long align;
|
| 447 | };
|
| 448 |
|
| 449 | extern struct ps3_prealloc ps3fb_videomemory;
|
| 450 | extern struct ps3_prealloc ps3flash_bounce_buffer;
|
| 451 |
|
| 452 |
|
| 453 |
|
| 454 | |
| 455 | * enum ps3_lpm_rights - Rigths granted by the system policy module.
|
| 456 | *
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| 457 | * @PS3_LPM_RIGHTS_USE_LPM: The right to use the lpm.
|
| 458 | * @PS3_LPM_RIGHTS_USE_TB: The right to use the internal trace buffer.
|
| 459 |
|
| 460 |
|
| 461 | enum ps3_lpm_rights {
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| 462 | PS3_LPM_RIGHTS_USE_LPM = 0x001,
|
| 463 | PS3_LPM_RIGHTS_USE_TB = 0x100,
|
| 464 | };
|
| 465 |
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| 466 | |
| 467 | * enum ps3_lpm_tb_type - Type of trace buffer lv1 should use.
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| 468 | *
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| 469 | * @PS3_LPM_TB_TYPE_NONE: Do not use a trace buffer.
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| 470 | * @PS3_LPM_TB_TYPE_INTERNAL: Use the lv1 internal trace buffer. Must have
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| 471 | * rights @PS3_LPM_RIGHTS_USE_TB.
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| 472 |
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| 473 |
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| 474 | enum ps3_lpm_tb_type {
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| 475 | PS3_LPM_TB_TYPE_NONE = 0,
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| 476 | PS3_LPM_TB_TYPE_INTERNAL = 1,
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| 477 | };
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| 478 |
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| 479 | int ps3_lpm_open(enum ps3_lpm_tb_type tb_type, void *tb_cache,
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| 480 | u64 tb_cache_size);
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| 481 | int ps3_lpm_close(void);
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| 482 | int ps3_lpm_copy_tb(unsigned long offset, void *buf, unsigned long count,
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| 483 | unsigned long *bytes_copied);
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| 484 | int ps3_lpm_copy_tb_to_user(unsigned long offset, void __user *buf,
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| 485 | unsigned long count, unsigned long *bytes_copied);
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| 486 | void ps3_set_bookmark(u64 bookmark);
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| 487 | void ps3_set_pm_bookmark(u64 tag, u64 incident, u64 th_id);
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| 488 | int ps3_set_signal(u64 rtas_signal_group, u8 signal_bit, u16 sub_unit,
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| 489 | u8 bus_word);
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| 490 |
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| 491 | u32 ps3_read_phys_ctr(u32 cpu, u32 phys_ctr);
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| 492 | void ps3_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val);
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| 493 | u32 ps3_read_ctr(u32 cpu, u32 ctr);
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| 494 | void ps3_write_ctr(u32 cpu, u32 ctr, u32 val);
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| 495 |
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| 496 | u32 ps3_read_pm07_control(u32 cpu, u32 ctr);
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| 497 | void ps3_write_pm07_control(u32 cpu, u32 ctr, u32 val);
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| 498 | u32 ps3_read_pm(u32 cpu, enum pm_reg_name reg);
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| 499 | void ps3_write_pm(u32 cpu, enum pm_reg_name reg, u32 val);
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| 500 |
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| 501 | u32 ps3_get_ctr_size(u32 cpu, u32 phys_ctr);
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| 502 | void ps3_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size);
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| 503 |
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| 504 | void ps3_enable_pm(u32 cpu);
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| 505 | void ps3_disable_pm(u32 cpu);
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| 506 | void ps3_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask);
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| 507 | void ps3_disable_pm_interrupts(u32 cpu);
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| 508 |
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| 509 | u32 ps3_get_and_clear_pm_interrupts(u32 cpu);
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| 510 | void ps3_sync_irq(int node);
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| 511 | u32 ps3_get_hw_thread_id(int cpu);
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| 512 | u64 ps3_get_spe_id(void *arg);
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| 513 |
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| 514 | void ps3_early_mm_init(void);
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| 515 |
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| 516 | #ifdef CONFIG_PPC_EARLY_DEBUG_PS3GELIC
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| 517 | void udbg_shutdown_ps3gelic(void);
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| 518 | #else
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| 519 | static inline void udbg_shutdown_ps3gelic(void) {}
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| 520 | #endif
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| 521 |
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| 522 | #endif
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