| 1 | |
| 2 | |
| 3 | * This program is used to generate definitions needed by
|
| 4 | * assembly language modules.
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| 5 | *
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| 6 | * We use the technique used in the OSF Mach kernel code:
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| 7 | * generate asm statements containing #defines,
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| 8 | * compile this file to assembler, and then extract the
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| 9 | * #defines from the assembly-language output.
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| 10 |
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| 11 | #define COMPILE_OFFSETS
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| 12 |
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| 13 | #include <linux/compat.h>
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| 14 | #include <linux/signal.h>
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| 15 | #include <linux/sched.h>
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| 16 | #include <linux/kernel.h>
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| 17 | #include <linux/errno.h>
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| 18 | #include <linux/string.h>
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| 19 | #include <linux/types.h>
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| 20 | #include <linux/mman.h>
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| 21 | #include <linux/mm.h>
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| 22 | #include <linux/suspend.h>
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| 23 | #include <linux/hrtimer.h>
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| 24 | #ifdef CONFIG_PPC64
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| 25 | #include <linux/time.h>
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| 26 | #include <linux/hardirq.h>
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| 27 | #endif
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| 28 | #include <linux/kbuild.h>
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| 29 |
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| 30 | #include <asm/io.h>
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| 31 | #include <asm/page.h>
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| 32 | #include <asm/processor.h>
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| 33 | #include <asm/cputable.h>
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| 34 | #include <asm/thread_info.h>
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| 35 | #include <asm/rtas.h>
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| 36 | #include <asm/vdso_datapage.h>
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| 37 | #include <asm/dbell.h>
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| 38 | #ifdef CONFIG_PPC64
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| 39 | #include <asm/paca.h>
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| 40 | #include <asm/lppaca.h>
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| 41 | #include <asm/cache.h>
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| 42 | #include <asm/mmu.h>
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| 43 | #include <asm/hvcall.h>
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| 44 | #include <asm/xics.h>
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| 45 | #endif
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| 46 | #ifdef CONFIG_PPC_POWERNV
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| 47 | #include <asm/opal.h>
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| 48 | #endif
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| 49 | #if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
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| 50 | #include <linux/kvm_host.h>
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| 51 | #endif
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| 52 | #if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
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| 53 | #include <asm/kvm_book3s.h>
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| 54 | #include <asm/kvm_ppc.h>
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| 55 | #endif
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| 56 |
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| 57 | #ifdef CONFIG_PPC32
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| 58 | #ifdef CONFIG_BOOKE
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| 59 | #include "head_booke.h"
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| 60 | #endif
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| 61 | #endif
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| 62 |
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| 63 | #if defined(CONFIG_PPC_E500)
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| 64 | #include "../mm/mmu_decl.h"
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| 65 | #endif
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| 66 |
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| 67 | #ifdef CONFIG_PPC_8xx
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| 68 | #include <asm/fixmap.h>
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| 69 | #endif
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| 70 |
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| 71 | #ifdef CONFIG_XMON
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| 72 | #include "../xmon/xmon_bpts.h"
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| 73 | #endif
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| 74 |
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| 75 | #define STACK_PT_REGS_OFFSET(sym, val) \
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| 76 | DEFINE(sym, STACK_INT_FRAME_REGS + offsetof(struct pt_regs, val))
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| 77 |
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| 78 | int main(void)
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| 79 | {
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| 80 | OFFSET(THREAD, task_struct, thread);
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| 81 | OFFSET(MM, task_struct, mm);
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| 82 | #ifdef CONFIG_STACKPROTECTOR
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| 83 | OFFSET(TASK_CANARY, task_struct, stack_canary);
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| 84 | #ifdef CONFIG_PPC64
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| 85 | OFFSET(PACA_CANARY, paca_struct, canary);
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| 86 | #endif
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| 87 | #endif
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| 88 | #ifdef CONFIG_PPC32
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| 89 | #ifdef CONFIG_PPC_RTAS
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| 90 | OFFSET(RTAS_SP, thread_struct, rtas_sp);
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| 91 | #endif
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| 92 | #endif
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| 93 | OFFSET(TASK_STACK, task_struct, stack);
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| 94 | #ifdef CONFIG_SMP
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| 95 | OFFSET(TASK_CPU, task_struct, thread_info.cpu);
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| 96 | #endif
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| 97 |
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| 98 | #ifdef CONFIG_LIVEPATCH_64
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| 99 | OFFSET(TI_livepatch_sp, thread_info, livepatch_sp);
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| 100 | #endif
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| 101 |
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| 102 | OFFSET(KSP, thread_struct, ksp);
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| 103 | OFFSET(PT_REGS, thread_struct, regs);
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| 104 | #ifdef CONFIG_BOOKE
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| 105 | OFFSET(THREAD_NORMSAVES, thread_struct, normsave[0]);
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| 106 | #endif
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| 107 | #ifdef CONFIG_PPC_FPU
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| 108 | OFFSET(THREAD_FPEXC_MODE, thread_struct, fpexc_mode);
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| 109 | OFFSET(THREAD_FPSTATE, thread_struct, fp_state.fpr);
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| 110 | OFFSET(THREAD_FPSAVEAREA, thread_struct, fp_save_area);
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| 111 | #endif
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| 112 | OFFSET(FPSTATE_FPSCR, thread_fp_state, fpscr);
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| 113 | OFFSET(THREAD_LOAD_FP, thread_struct, load_fp);
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| 114 | #ifdef CONFIG_ALTIVEC
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| 115 | OFFSET(THREAD_VRSTATE, thread_struct, vr_state.vr);
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| 116 | OFFSET(THREAD_VRSAVEAREA, thread_struct, vr_save_area);
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| 117 | OFFSET(THREAD_USED_VR, thread_struct, used_vr);
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| 118 | OFFSET(VRSTATE_VSCR, thread_vr_state, vscr);
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| 119 | OFFSET(THREAD_LOAD_VEC, thread_struct, load_vec);
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| 120 | #endif
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| 121 | #ifdef CONFIG_VSX
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| 122 | OFFSET(THREAD_USED_VSR, thread_struct, used_vsr);
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| 123 | #endif
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| 124 | #ifdef CONFIG_PPC64
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| 125 | OFFSET(KSP_VSID, thread_struct, ksp_vsid);
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| 126 | #else
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| 127 | OFFSET(PGDIR, thread_struct, pgdir);
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| 128 | OFFSET(SRR0, thread_struct, srr0);
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| 129 | OFFSET(SRR1, thread_struct, srr1);
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| 130 | OFFSET(DAR, thread_struct, dar);
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| 131 | OFFSET(DSISR, thread_struct, dsisr);
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| 132 | #ifdef CONFIG_PPC_BOOK3S_32
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| 133 | OFFSET(THR0, thread_struct, r0);
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| 134 | OFFSET(THR3, thread_struct, r3);
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| 135 | OFFSET(THR4, thread_struct, r4);
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| 136 | OFFSET(THR5, thread_struct, r5);
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| 137 | OFFSET(THR6, thread_struct, r6);
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| 138 | OFFSET(THR8, thread_struct, r8);
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| 139 | OFFSET(THR9, thread_struct, r9);
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| 140 | OFFSET(THR11, thread_struct, r11);
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| 141 | OFFSET(THLR, thread_struct, lr);
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| 142 | OFFSET(THCTR, thread_struct, ctr);
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| 143 | OFFSET(THSR0, thread_struct, sr0);
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| 144 | #endif
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| 145 | #ifdef CONFIG_SPE
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| 146 | OFFSET(THREAD_EVR0, thread_struct, evr[0]);
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| 147 | OFFSET(THREAD_ACC, thread_struct, acc);
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| 148 | OFFSET(THREAD_USED_SPE, thread_struct, used_spe);
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| 149 | #endif
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| 150 | #endif
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| 151 | #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
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| 152 | OFFSET(THREAD_KVM_SVCPU, thread_struct, kvm_shadow_vcpu);
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| 153 | #endif
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| 154 | #if defined(CONFIG_KVM) && defined(CONFIG_BOOKE)
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| 155 | OFFSET(THREAD_KVM_VCPU, thread_struct, kvm_vcpu);
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| 156 | #endif
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| 157 |
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| 158 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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| 159 | OFFSET(PACATMSCRATCH, paca_struct, tm_scratch);
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| 160 | OFFSET(THREAD_TM_TFHAR, thread_struct, tm_tfhar);
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| 161 | OFFSET(THREAD_TM_TEXASR, thread_struct, tm_texasr);
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| 162 | OFFSET(THREAD_TM_TFIAR, thread_struct, tm_tfiar);
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| 163 | OFFSET(THREAD_TM_TAR, thread_struct, tm_tar);
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| 164 | OFFSET(THREAD_TM_PPR, thread_struct, tm_ppr);
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| 165 | OFFSET(THREAD_TM_DSCR, thread_struct, tm_dscr);
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| 166 | OFFSET(THREAD_TM_AMR, thread_struct, tm_amr);
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| 167 | OFFSET(PT_CKPT_REGS, thread_struct, ckpt_regs);
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| 168 | OFFSET(THREAD_CKVRSTATE, thread_struct, ckvr_state.vr);
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| 169 | OFFSET(THREAD_CKVRSAVE, thread_struct, ckvrsave);
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| 170 | OFFSET(THREAD_CKFPSTATE, thread_struct, ckfp_state.fpr);
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| 171 |
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| 172 | DEFINE(TM_FRAME_SIZE, STACK_INT_FRAME_SIZE + 16);
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| 173 | #endif
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| 174 |
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| 175 | OFFSET(TI_LOCAL_FLAGS, thread_info, local_flags);
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| 176 |
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| 177 | #ifdef CONFIG_PPC64
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| 178 | OFFSET(DCACHEL1BLOCKSIZE, ppc64_caches, l1d.block_size);
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| 179 | OFFSET(DCACHEL1LOGBLOCKSIZE, ppc64_caches, l1d.log_block_size);
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| 180 |
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| 181 | OFFSET(PACAPACAINDEX, paca_struct, paca_index);
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| 182 | OFFSET(PACAPROCSTART, paca_struct, cpu_start);
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| 183 | OFFSET(PACAKSAVE, paca_struct, kstack);
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| 184 | OFFSET(PACACURRENT, paca_struct, __current);
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| 185 | DEFINE(PACA_THREAD_INFO, offsetof(struct paca_struct, __current) +
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| 186 | offsetof(struct task_struct, thread_info));
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| 187 | OFFSET(PACASAVEDMSR, paca_struct, saved_msr);
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| 188 | OFFSET(PACAR1, paca_struct, saved_r1);
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| 189 | #ifndef CONFIG_PPC_KERNEL_PCREL
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| 190 | OFFSET(PACATOC, paca_struct, kernel_toc);
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| 191 | #endif
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| 192 | OFFSET(PACAKBASE, paca_struct, kernelbase);
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| 193 | OFFSET(PACAKMSR, paca_struct, kernel_msr);
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| 194 | #ifdef CONFIG_PPC_BOOK3S_64
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| 195 | OFFSET(PACAHSRR_VALID, paca_struct, hsrr_valid);
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| 196 | OFFSET(PACASRR_VALID, paca_struct, srr_valid);
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| 197 | #endif
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| 198 | OFFSET(PACAIRQSOFTMASK, paca_struct, irq_soft_mask);
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| 199 | OFFSET(PACAIRQHAPPENED, paca_struct, irq_happened);
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| 200 | OFFSET(PACA_FTRACE_ENABLED, paca_struct, ftrace_enabled);
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| 201 |
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| 202 | #ifdef CONFIG_PPC_BOOK3E_64
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| 203 | OFFSET(PACAPGD, paca_struct, pgd);
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| 204 | OFFSET(PACA_KERNELPGD, paca_struct, kernel_pgd);
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| 205 | OFFSET(PACA_EXGEN, paca_struct, exgen);
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| 206 | OFFSET(PACA_EXTLB, paca_struct, extlb);
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| 207 | OFFSET(PACA_EXMC, paca_struct, exmc);
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| 208 | OFFSET(PACA_EXCRIT, paca_struct, excrit);
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| 209 | OFFSET(PACA_EXDBG, paca_struct, exdbg);
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| 210 | OFFSET(PACA_MC_STACK, paca_struct, mc_kstack);
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| 211 | OFFSET(PACA_CRIT_STACK, paca_struct, crit_kstack);
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| 212 | OFFSET(PACA_DBG_STACK, paca_struct, dbg_kstack);
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| 213 | OFFSET(PACA_TCD_PTR, paca_struct, tcd_ptr);
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| 214 |
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| 215 | OFFSET(TCD_ESEL_NEXT, tlb_core_data, esel_next);
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| 216 | OFFSET(TCD_ESEL_MAX, tlb_core_data, esel_max);
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| 217 | OFFSET(TCD_ESEL_FIRST, tlb_core_data, esel_first);
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| 218 | #endif
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| 219 |
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| 220 | #ifdef CONFIG_PPC_BOOK3S_64
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| 221 | OFFSET(PACA_EXGEN, paca_struct, exgen);
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| 222 | OFFSET(PACA_EXMC, paca_struct, exmc);
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| 223 | OFFSET(PACA_EXNMI, paca_struct, exnmi);
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| 224 | #ifdef CONFIG_PPC_64S_HASH_MMU
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| 225 | OFFSET(PACA_SLBSHADOWPTR, paca_struct, slb_shadow_ptr);
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| 226 | OFFSET(SLBSHADOW_STACKVSID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid);
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| 227 | OFFSET(SLBSHADOW_STACKESID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid);
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| 228 | OFFSET(SLBSHADOW_SAVEAREA, slb_shadow, save_area);
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| 229 | #endif
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| 230 | OFFSET(LPPACA_PMCINUSE, lppaca, pmcregs_in_use);
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| 231 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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| 232 | OFFSET(PACA_PMCINUSE, paca_struct, pmcregs_in_use);
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| 233 | #endif
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| 234 | OFFSET(LPPACA_YIELDCOUNT, lppaca, yield_count);
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| 235 | #endif
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| 236 | OFFSET(PACAEMERGSP, paca_struct, emergency_sp);
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| 237 | #ifdef CONFIG_PPC_BOOK3S_64
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| 238 | OFFSET(PACAMCEMERGSP, paca_struct, mc_emergency_sp);
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| 239 | OFFSET(PACA_NMI_EMERG_SP, paca_struct, nmi_emergency_sp);
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| 240 | OFFSET(PACA_IN_MCE, paca_struct, in_mce);
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| 241 | OFFSET(PACA_IN_NMI, paca_struct, in_nmi);
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| 242 | OFFSET(PACA_RFI_FLUSH_FALLBACK_AREA, paca_struct, rfi_flush_fallback_area);
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| 243 | OFFSET(PACA_EXRFI, paca_struct, exrfi);
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| 244 | OFFSET(PACA_L1D_FLUSH_SIZE, paca_struct, l1d_flush_size);
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| 245 |
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| 246 | #endif
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| 247 | OFFSET(PACAHWCPUID, paca_struct, hw_cpu_id);
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| 248 | OFFSET(PACAKEXECSTATE, paca_struct, kexec_state);
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| 249 | OFFSET(PACA_DSCR_DEFAULT, paca_struct, dscr_default);
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| 250 | OFFSET(PACA_EXIT_SAVE_R1, paca_struct, exit_save_r1);
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| 251 | #ifdef CONFIG_PPC_BOOK3E_64
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| 252 | OFFSET(PACA_TRAP_SAVE, paca_struct, trap_save);
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| 253 | #endif
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| 254 | OFFSET(PACA_SPRG_VDSO, paca_struct, sprg_vdso);
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| 255 | #else
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| 256 | #endif
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| 257 |
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| 258 |
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| 259 | OFFSET(RTASBASE, rtas_t, base);
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| 260 | OFFSET(RTASENTRY, rtas_t, entry);
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| 261 |
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| 262 |
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| 263 | DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
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| 264 | DEFINE(SWITCH_FRAME_SIZE, STACK_SWITCH_FRAME_SIZE);
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| 265 | STACK_PT_REGS_OFFSET(GPR0, gpr[0]);
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| 266 | STACK_PT_REGS_OFFSET(GPR1, gpr[1]);
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| 267 | STACK_PT_REGS_OFFSET(GPR2, gpr[2]);
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| 268 | STACK_PT_REGS_OFFSET(GPR3, gpr[3]);
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| 269 | STACK_PT_REGS_OFFSET(GPR4, gpr[4]);
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| 270 | STACK_PT_REGS_OFFSET(GPR5, gpr[5]);
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| 271 | STACK_PT_REGS_OFFSET(GPR6, gpr[6]);
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| 272 | STACK_PT_REGS_OFFSET(GPR7, gpr[7]);
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| 273 | STACK_PT_REGS_OFFSET(GPR8, gpr[8]);
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| 274 | STACK_PT_REGS_OFFSET(GPR9, gpr[9]);
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| 275 | STACK_PT_REGS_OFFSET(GPR10, gpr[10]);
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| 276 | STACK_PT_REGS_OFFSET(GPR11, gpr[11]);
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| 277 | STACK_PT_REGS_OFFSET(GPR12, gpr[12]);
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| 278 | STACK_PT_REGS_OFFSET(GPR13, gpr[13]);
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| 279 | |
| 280 | * Note: these symbols include _ because they overlap with special
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| 281 | * register names
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| 282 |
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| 283 | STACK_PT_REGS_OFFSET(_NIP, nip);
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| 284 | STACK_PT_REGS_OFFSET(_MSR, msr);
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| 285 | STACK_PT_REGS_OFFSET(_CTR, ctr);
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| 286 | STACK_PT_REGS_OFFSET(_LINK, link);
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| 287 | STACK_PT_REGS_OFFSET(_CCR, ccr);
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| 288 | STACK_PT_REGS_OFFSET(_XER, xer);
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| 289 | STACK_PT_REGS_OFFSET(_DAR, dar);
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| 290 | STACK_PT_REGS_OFFSET(_DEAR, dear);
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| 291 | STACK_PT_REGS_OFFSET(_DSISR, dsisr);
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| 292 | STACK_PT_REGS_OFFSET(_ESR, esr);
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| 293 | STACK_PT_REGS_OFFSET(ORIG_GPR3, orig_gpr3);
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| 294 | STACK_PT_REGS_OFFSET(RESULT, result);
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| 295 | STACK_PT_REGS_OFFSET(_TRAP, trap);
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| 296 | #ifdef CONFIG_PPC64
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| 297 | STACK_PT_REGS_OFFSET(SOFTE, softe);
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| 298 | STACK_PT_REGS_OFFSET(_PPR, ppr);
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| 299 | #endif
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| 300 |
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| 301 | #ifdef CONFIG_PPC_PKEY
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| 302 | STACK_PT_REGS_OFFSET(STACK_REGS_AMR, amr);
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| 303 | STACK_PT_REGS_OFFSET(STACK_REGS_IAMR, iamr);
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| 304 | #endif
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| 305 |
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| 306 | #if defined(CONFIG_PPC32) && defined(CONFIG_BOOKE)
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| 307 | STACK_PT_REGS_OFFSET(MAS0, mas0);
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| 308 |
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| 309 | STACK_PT_REGS_OFFSET(MMUCR, mas0);
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| 310 | STACK_PT_REGS_OFFSET(MAS1, mas1);
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| 311 | STACK_PT_REGS_OFFSET(MAS2, mas2);
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| 312 | STACK_PT_REGS_OFFSET(MAS3, mas3);
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| 313 | STACK_PT_REGS_OFFSET(MAS6, mas6);
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| 314 | STACK_PT_REGS_OFFSET(MAS7, mas7);
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| 315 | STACK_PT_REGS_OFFSET(_SRR0, srr0);
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| 316 | STACK_PT_REGS_OFFSET(_SRR1, srr1);
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| 317 | STACK_PT_REGS_OFFSET(_CSRR0, csrr0);
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| 318 | STACK_PT_REGS_OFFSET(_CSRR1, csrr1);
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| 319 | STACK_PT_REGS_OFFSET(_DSRR0, dsrr0);
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| 320 | STACK_PT_REGS_OFFSET(_DSRR1, dsrr1);
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| 321 | #endif
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| 322 |
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| 323 |
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| 324 | OFFSET(CPU_SPEC_FEATURES, cpu_spec, cpu_features);
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| 325 | OFFSET(CPU_SPEC_SETUP, cpu_spec, cpu_setup);
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| 326 | OFFSET(CPU_SPEC_RESTORE, cpu_spec, cpu_restore);
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| 327 |
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| 328 | OFFSET(pbe_address, pbe, address);
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| 329 | OFFSET(pbe_orig_address, pbe, orig_address);
|
| 330 | OFFSET(pbe_next, pbe, next);
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| 331 |
|
| 332 | #ifndef CONFIG_PPC64
|
| 333 | DEFINE(TASK_SIZE, TASK_SIZE);
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| 334 | DEFINE(NUM_USER_SEGMENTS, ALIGN(TASK_SIZE, SZ_256M) >> 28);
|
| 335 | #endif
|
| 336 |
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| 337 |
|
| 338 | OFFSET(CFG_TB_TICKS_PER_SEC, vdso_arch_data, tb_ticks_per_sec);
|
| 339 | #ifdef CONFIG_PPC64
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| 340 | OFFSET(CFG_ICACHE_BLOCKSZ, vdso_arch_data, icache_block_size);
|
| 341 | OFFSET(CFG_DCACHE_BLOCKSZ, vdso_arch_data, dcache_block_size);
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| 342 | OFFSET(CFG_ICACHE_LOGBLOCKSZ, vdso_arch_data, icache_log_block_size);
|
| 343 | OFFSET(CFG_DCACHE_LOGBLOCKSZ, vdso_arch_data, dcache_log_block_size);
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| 344 | OFFSET(CFG_SYSCALL_MAP64, vdso_arch_data, syscall_map);
|
| 345 | OFFSET(CFG_SYSCALL_MAP32, vdso_arch_data, compat_syscall_map);
|
| 346 | #else
|
| 347 | OFFSET(CFG_SYSCALL_MAP32, vdso_arch_data, syscall_map);
|
| 348 | #endif
|
| 349 |
|
| 350 | #ifdef CONFIG_BUG
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| 351 | DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
|
| 352 | #endif
|
| 353 |
|
| 354 | #ifdef CONFIG_KVM
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| 355 | OFFSET(VCPU_HOST_STACK, kvm_vcpu, arch.host_stack);
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| 356 | OFFSET(VCPU_HOST_PID, kvm_vcpu, arch.host_pid);
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| 357 | OFFSET(VCPU_GUEST_PID, kvm_vcpu, arch.pid);
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| 358 | OFFSET(VCPU_GPRS, kvm_vcpu, arch.regs.gpr);
|
| 359 | OFFSET(VCPU_VRSAVE, kvm_vcpu, arch.vrsave);
|
| 360 | OFFSET(VCPU_FPRS, kvm_vcpu, arch.fp.fpr);
|
| 361 | #ifdef CONFIG_ALTIVEC
|
| 362 | OFFSET(VCPU_VRS, kvm_vcpu, arch.vr.vr);
|
| 363 | #endif
|
| 364 | OFFSET(VCPU_XER, kvm_vcpu, arch.regs.xer);
|
| 365 | OFFSET(VCPU_CTR, kvm_vcpu, arch.regs.ctr);
|
| 366 | OFFSET(VCPU_LR, kvm_vcpu, arch.regs.link);
|
| 367 | #ifdef CONFIG_PPC_BOOK3S
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| 368 | OFFSET(VCPU_TAR, kvm_vcpu, arch.tar);
|
| 369 | #endif
|
| 370 | OFFSET(VCPU_CR, kvm_vcpu, arch.regs.ccr);
|
| 371 | OFFSET(VCPU_PC, kvm_vcpu, arch.regs.nip);
|
| 372 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
|
| 373 | OFFSET(VCPU_MSR, kvm_vcpu, arch.shregs.msr);
|
| 374 | OFFSET(VCPU_SRR0, kvm_vcpu, arch.shregs.srr0);
|
| 375 | OFFSET(VCPU_SRR1, kvm_vcpu, arch.shregs.srr1);
|
| 376 | OFFSET(VCPU_SPRG0, kvm_vcpu, arch.shregs.sprg0);
|
| 377 | OFFSET(VCPU_SPRG1, kvm_vcpu, arch.shregs.sprg1);
|
| 378 | OFFSET(VCPU_SPRG2, kvm_vcpu, arch.shregs.sprg2);
|
| 379 | OFFSET(VCPU_SPRG3, kvm_vcpu, arch.shregs.sprg3);
|
| 380 | #endif
|
| 381 | #ifdef CONFIG_KVM_BOOK3S_HV_P8_TIMING
|
| 382 | OFFSET(VCPU_TB_RMENTRY, kvm_vcpu, arch.rm_entry);
|
| 383 | OFFSET(VCPU_TB_RMINTR, kvm_vcpu, arch.rm_intr);
|
| 384 | OFFSET(VCPU_TB_RMEXIT, kvm_vcpu, arch.rm_exit);
|
| 385 | OFFSET(VCPU_TB_GUEST, kvm_vcpu, arch.guest_time);
|
| 386 | OFFSET(VCPU_TB_CEDE, kvm_vcpu, arch.cede_time);
|
| 387 | OFFSET(VCPU_CUR_ACTIVITY, kvm_vcpu, arch.cur_activity);
|
| 388 | OFFSET(VCPU_ACTIVITY_START, kvm_vcpu, arch.cur_tb_start);
|
| 389 | OFFSET(TAS_SEQCOUNT, kvmhv_tb_accumulator, seqcount);
|
| 390 | OFFSET(TAS_TOTAL, kvmhv_tb_accumulator, tb_total);
|
| 391 | OFFSET(TAS_MIN, kvmhv_tb_accumulator, tb_min);
|
| 392 | OFFSET(TAS_MAX, kvmhv_tb_accumulator, tb_max);
|
| 393 | #endif
|
| 394 | OFFSET(VCPU_SHARED_SPRG3, kvm_vcpu_arch_shared, sprg3);
|
| 395 | OFFSET(VCPU_SHARED_SPRG4, kvm_vcpu_arch_shared, sprg4);
|
| 396 | OFFSET(VCPU_SHARED_SPRG5, kvm_vcpu_arch_shared, sprg5);
|
| 397 | OFFSET(VCPU_SHARED_SPRG6, kvm_vcpu_arch_shared, sprg6);
|
| 398 | OFFSET(VCPU_SHARED_SPRG7, kvm_vcpu_arch_shared, sprg7);
|
| 399 | OFFSET(VCPU_SHADOW_PID, kvm_vcpu, arch.shadow_pid);
|
| 400 | OFFSET(VCPU_SHADOW_PID1, kvm_vcpu, arch.shadow_pid1);
|
| 401 | OFFSET(VCPU_SHARED, kvm_vcpu, arch.shared);
|
| 402 | OFFSET(VCPU_SHARED_MSR, kvm_vcpu_arch_shared, msr);
|
| 403 | OFFSET(VCPU_SHADOW_MSR, kvm_vcpu, arch.shadow_msr);
|
| 404 | #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
|
| 405 | OFFSET(VCPU_SHAREDBE, kvm_vcpu, arch.shared_big_endian);
|
| 406 | #endif
|
| 407 |
|
| 408 | OFFSET(VCPU_SHARED_MAS0, kvm_vcpu_arch_shared, mas0);
|
| 409 | OFFSET(VCPU_SHARED_MAS1, kvm_vcpu_arch_shared, mas1);
|
| 410 | OFFSET(VCPU_SHARED_MAS2, kvm_vcpu_arch_shared, mas2);
|
| 411 | OFFSET(VCPU_SHARED_MAS7_3, kvm_vcpu_arch_shared, mas7_3);
|
| 412 | OFFSET(VCPU_SHARED_MAS4, kvm_vcpu_arch_shared, mas4);
|
| 413 | OFFSET(VCPU_SHARED_MAS6, kvm_vcpu_arch_shared, mas6);
|
| 414 |
|
| 415 | OFFSET(VCPU_KVM, kvm_vcpu, kvm);
|
| 416 | OFFSET(KVM_LPID, kvm, arch.lpid);
|
| 417 |
|
| 418 |
|
| 419 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
|
| 420 | OFFSET(KVM_SDR1, kvm, arch.sdr1);
|
| 421 | OFFSET(KVM_HOST_LPID, kvm, arch.host_lpid);
|
| 422 | OFFSET(KVM_HOST_LPCR, kvm, arch.host_lpcr);
|
| 423 | OFFSET(KVM_HOST_SDR1, kvm, arch.host_sdr1);
|
| 424 | OFFSET(KVM_ENABLED_HCALLS, kvm, arch.enabled_hcalls);
|
| 425 | OFFSET(KVM_VRMA_SLB_V, kvm, arch.vrma_slb_v);
|
| 426 | OFFSET(KVM_SECURE_GUEST, kvm, arch.secure_guest);
|
| 427 | OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr);
|
| 428 | OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar);
|
| 429 | OFFSET(VCPU_VPA, kvm_vcpu, arch.vpa.pinned_addr);
|
| 430 | OFFSET(VCPU_VPA_DIRTY, kvm_vcpu, arch.vpa.dirty);
|
| 431 | OFFSET(VCPU_HEIR, kvm_vcpu, arch.emul_inst);
|
| 432 | OFFSET(VCPU_CPU, kvm_vcpu, cpu);
|
| 433 | OFFSET(VCPU_THREAD_CPU, kvm_vcpu, arch.thread_cpu);
|
| 434 | #endif
|
| 435 | #ifdef CONFIG_PPC_BOOK3S
|
| 436 | OFFSET(VCPU_PURR, kvm_vcpu, arch.purr);
|
| 437 | OFFSET(VCPU_SPURR, kvm_vcpu, arch.spurr);
|
| 438 | OFFSET(VCPU_IC, kvm_vcpu, arch.ic);
|
| 439 | OFFSET(VCPU_DSCR, kvm_vcpu, arch.dscr);
|
| 440 | OFFSET(VCPU_AMR, kvm_vcpu, arch.amr);
|
| 441 | OFFSET(VCPU_UAMOR, kvm_vcpu, arch.uamor);
|
| 442 | OFFSET(VCPU_IAMR, kvm_vcpu, arch.iamr);
|
| 443 | OFFSET(VCPU_CTRL, kvm_vcpu, arch.ctrl);
|
| 444 | OFFSET(VCPU_DABR, kvm_vcpu, arch.dabr);
|
| 445 | OFFSET(VCPU_DABRX, kvm_vcpu, arch.dabrx);
|
| 446 | OFFSET(VCPU_DAWR0, kvm_vcpu, arch.dawr0);
|
| 447 | OFFSET(VCPU_DAWRX0, kvm_vcpu, arch.dawrx0);
|
| 448 | OFFSET(VCPU_CIABR, kvm_vcpu, arch.ciabr);
|
| 449 | OFFSET(VCPU_HFLAGS, kvm_vcpu, arch.hflags);
|
| 450 | OFFSET(VCPU_DEC_EXPIRES, kvm_vcpu, arch.dec_expires);
|
| 451 | OFFSET(VCPU_PENDING_EXC, kvm_vcpu, arch.pending_exceptions);
|
| 452 | OFFSET(VCPU_CEDED, kvm_vcpu, arch.ceded);
|
| 453 | OFFSET(VCPU_PRODDED, kvm_vcpu, arch.prodded);
|
| 454 | OFFSET(VCPU_MMCR, kvm_vcpu, arch.mmcr);
|
| 455 | OFFSET(VCPU_MMCRA, kvm_vcpu, arch.mmcra);
|
| 456 | OFFSET(VCPU_MMCRS, kvm_vcpu, arch.mmcrs);
|
| 457 | OFFSET(VCPU_PMC, kvm_vcpu, arch.pmc);
|
| 458 | OFFSET(VCPU_SIAR, kvm_vcpu, arch.siar);
|
| 459 | OFFSET(VCPU_SDAR, kvm_vcpu, arch.sdar);
|
| 460 | OFFSET(VCPU_SIER, kvm_vcpu, arch.sier);
|
| 461 | OFFSET(VCPU_SLB, kvm_vcpu, arch.slb);
|
| 462 | OFFSET(VCPU_SLB_MAX, kvm_vcpu, arch.slb_max);
|
| 463 | OFFSET(VCPU_SLB_NR, kvm_vcpu, arch.slb_nr);
|
| 464 | OFFSET(VCPU_FAULT_DSISR, kvm_vcpu, arch.fault_dsisr);
|
| 465 | OFFSET(VCPU_FAULT_DAR, kvm_vcpu, arch.fault_dar);
|
| 466 | OFFSET(VCPU_INTR_MSR, kvm_vcpu, arch.intr_msr);
|
| 467 | OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
|
| 468 | OFFSET(VCPU_TRAP, kvm_vcpu, arch.trap);
|
| 469 | OFFSET(VCPU_CFAR, kvm_vcpu, arch.cfar);
|
| 470 | OFFSET(VCPU_PPR, kvm_vcpu, arch.ppr);
|
| 471 | OFFSET(VCPU_FSCR, kvm_vcpu, arch.fscr);
|
| 472 | OFFSET(VCPU_PSPB, kvm_vcpu, arch.pspb);
|
| 473 | OFFSET(VCPU_EBBHR, kvm_vcpu, arch.ebbhr);
|
| 474 | OFFSET(VCPU_EBBRR, kvm_vcpu, arch.ebbrr);
|
| 475 | OFFSET(VCPU_BESCR, kvm_vcpu, arch.bescr);
|
| 476 | OFFSET(VCPU_CSIGR, kvm_vcpu, arch.csigr);
|
| 477 | OFFSET(VCPU_TACR, kvm_vcpu, arch.tacr);
|
| 478 | OFFSET(VCPU_TCSCR, kvm_vcpu, arch.tcscr);
|
| 479 | OFFSET(VCPU_ACOP, kvm_vcpu, arch.acop);
|
| 480 | OFFSET(VCPU_WORT, kvm_vcpu, arch.wort);
|
| 481 | OFFSET(VCPU_HFSCR, kvm_vcpu, arch.hfscr);
|
| 482 | OFFSET(VCORE_ENTRY_EXIT, kvmppc_vcore, entry_exit_map);
|
| 483 | OFFSET(VCORE_IN_GUEST, kvmppc_vcore, in_guest);
|
| 484 | OFFSET(VCORE_NAPPING_THREADS, kvmppc_vcore, napping_threads);
|
| 485 | OFFSET(VCORE_KVM, kvmppc_vcore, kvm);
|
| 486 | OFFSET(VCORE_TB_OFFSET, kvmppc_vcore, tb_offset);
|
| 487 | OFFSET(VCORE_TB_OFFSET_APPL, kvmppc_vcore, tb_offset_applied);
|
| 488 | OFFSET(VCORE_LPCR, kvmppc_vcore, lpcr);
|
| 489 | OFFSET(VCORE_PCR, kvmppc_vcore, pcr);
|
| 490 | OFFSET(VCORE_DPDES, kvmppc_vcore, dpdes);
|
| 491 | OFFSET(VCORE_VTB, kvmppc_vcore, vtb);
|
| 492 | OFFSET(VCPU_SLB_E, kvmppc_slb, orige);
|
| 493 | OFFSET(VCPU_SLB_V, kvmppc_slb, origv);
|
| 494 | DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
|
| 495 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
| 496 | OFFSET(VCPU_TFHAR, kvm_vcpu, arch.tfhar);
|
| 497 | OFFSET(VCPU_TFIAR, kvm_vcpu, arch.tfiar);
|
| 498 | OFFSET(VCPU_TEXASR, kvm_vcpu, arch.texasr);
|
| 499 | OFFSET(VCPU_ORIG_TEXASR, kvm_vcpu, arch.orig_texasr);
|
| 500 | OFFSET(VCPU_GPR_TM, kvm_vcpu, arch.gpr_tm);
|
| 501 | OFFSET(VCPU_FPRS_TM, kvm_vcpu, arch.fp_tm.fpr);
|
| 502 | OFFSET(VCPU_VRS_TM, kvm_vcpu, arch.vr_tm.vr);
|
| 503 | OFFSET(VCPU_VRSAVE_TM, kvm_vcpu, arch.vrsave_tm);
|
| 504 | OFFSET(VCPU_CR_TM, kvm_vcpu, arch.cr_tm);
|
| 505 | OFFSET(VCPU_XER_TM, kvm_vcpu, arch.xer_tm);
|
| 506 | OFFSET(VCPU_LR_TM, kvm_vcpu, arch.lr_tm);
|
| 507 | OFFSET(VCPU_CTR_TM, kvm_vcpu, arch.ctr_tm);
|
| 508 | OFFSET(VCPU_AMR_TM, kvm_vcpu, arch.amr_tm);
|
| 509 | OFFSET(VCPU_PPR_TM, kvm_vcpu, arch.ppr_tm);
|
| 510 | OFFSET(VCPU_DSCR_TM, kvm_vcpu, arch.dscr_tm);
|
| 511 | OFFSET(VCPU_TAR_TM, kvm_vcpu, arch.tar_tm);
|
| 512 | #endif
|
| 513 |
|
| 514 | #ifdef CONFIG_PPC_BOOK3S_64
|
| 515 | #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
|
| 516 | OFFSET(PACA_SVCPU, paca_struct, shadow_vcpu);
|
| 517 | # define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
|
| 518 | #else
|
| 519 | # define SVCPU_FIELD(x, f)
|
| 520 | #endif
|
| 521 | # define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
|
| 522 | #else
|
| 523 | # define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
|
| 524 | # define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
|
| 525 | #endif
|
| 526 |
|
| 527 | SVCPU_FIELD(SVCPU_CR, cr);
|
| 528 | SVCPU_FIELD(SVCPU_XER, xer);
|
| 529 | SVCPU_FIELD(SVCPU_CTR, ctr);
|
| 530 | SVCPU_FIELD(SVCPU_LR, lr);
|
| 531 | SVCPU_FIELD(SVCPU_PC, pc);
|
| 532 | SVCPU_FIELD(SVCPU_R0, gpr[0]);
|
| 533 | SVCPU_FIELD(SVCPU_R1, gpr[1]);
|
| 534 | SVCPU_FIELD(SVCPU_R2, gpr[2]);
|
| 535 | SVCPU_FIELD(SVCPU_R3, gpr[3]);
|
| 536 | SVCPU_FIELD(SVCPU_R4, gpr[4]);
|
| 537 | SVCPU_FIELD(SVCPU_R5, gpr[5]);
|
| 538 | SVCPU_FIELD(SVCPU_R6, gpr[6]);
|
| 539 | SVCPU_FIELD(SVCPU_R7, gpr[7]);
|
| 540 | SVCPU_FIELD(SVCPU_R8, gpr[8]);
|
| 541 | SVCPU_FIELD(SVCPU_R9, gpr[9]);
|
| 542 | SVCPU_FIELD(SVCPU_R10, gpr[10]);
|
| 543 | SVCPU_FIELD(SVCPU_R11, gpr[11]);
|
| 544 | SVCPU_FIELD(SVCPU_R12, gpr[12]);
|
| 545 | SVCPU_FIELD(SVCPU_R13, gpr[13]);
|
| 546 | SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
|
| 547 | SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
|
| 548 | SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
|
| 549 | SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
|
| 550 | #ifdef CONFIG_PPC_BOOK3S_32
|
| 551 | SVCPU_FIELD(SVCPU_SR, sr);
|
| 552 | #endif
|
| 553 | #ifdef CONFIG_PPC64
|
| 554 | SVCPU_FIELD(SVCPU_SLB, slb);
|
| 555 | SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
|
| 556 | SVCPU_FIELD(SVCPU_SHADOW_FSCR, shadow_fscr);
|
| 557 | #endif
|
| 558 |
|
| 559 | HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
|
| 560 | HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
|
| 561 | HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
|
| 562 | HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
|
| 563 | HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
|
| 564 | HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
|
| 565 | HSTATE_FIELD(HSTATE_SCRATCH2, scratch2);
|
| 566 | HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
|
| 567 | HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
|
| 568 | HSTATE_FIELD(HSTATE_NAPPING, napping);
|
| 569 |
|
| 570 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
|
| 571 | HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
|
| 572 | HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
|
| 573 | HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
|
| 574 | HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
|
| 575 | HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi);
|
| 576 | HSTATE_FIELD(HSTATE_PTID, ptid);
|
| 577 | HSTATE_FIELD(HSTATE_FAKE_SUSPEND, fake_suspend);
|
| 578 | HSTATE_FIELD(HSTATE_MMCR0, host_mmcr[0]);
|
| 579 | HSTATE_FIELD(HSTATE_MMCR1, host_mmcr[1]);
|
| 580 | HSTATE_FIELD(HSTATE_MMCRA, host_mmcr[2]);
|
| 581 | HSTATE_FIELD(HSTATE_SIAR, host_mmcr[3]);
|
| 582 | HSTATE_FIELD(HSTATE_SDAR, host_mmcr[4]);
|
| 583 | HSTATE_FIELD(HSTATE_MMCR2, host_mmcr[5]);
|
| 584 | HSTATE_FIELD(HSTATE_SIER, host_mmcr[6]);
|
| 585 | HSTATE_FIELD(HSTATE_PMC1, host_pmc[0]);
|
| 586 | HSTATE_FIELD(HSTATE_PMC2, host_pmc[1]);
|
| 587 | HSTATE_FIELD(HSTATE_PMC3, host_pmc[2]);
|
| 588 | HSTATE_FIELD(HSTATE_PMC4, host_pmc[3]);
|
| 589 | HSTATE_FIELD(HSTATE_PMC5, host_pmc[4]);
|
| 590 | HSTATE_FIELD(HSTATE_PMC6, host_pmc[5]);
|
| 591 | HSTATE_FIELD(HSTATE_PURR, host_purr);
|
| 592 | HSTATE_FIELD(HSTATE_SPURR, host_spurr);
|
| 593 | HSTATE_FIELD(HSTATE_DSCR, host_dscr);
|
| 594 | HSTATE_FIELD(HSTATE_DABR, dabr);
|
| 595 | HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
|
| 596 | HSTATE_FIELD(HSTATE_SPLIT_MODE, kvm_split_mode);
|
| 597 | OFFSET(KVM_SPLIT_RPR, kvm_split_mode, rpr);
|
| 598 | OFFSET(KVM_SPLIT_PMMAR, kvm_split_mode, pmmar);
|
| 599 | OFFSET(KVM_SPLIT_LDBAR, kvm_split_mode, ldbar);
|
| 600 | OFFSET(KVM_SPLIT_DO_NAP, kvm_split_mode, do_nap);
|
| 601 | OFFSET(KVM_SPLIT_NAPPED, kvm_split_mode, napped);
|
| 602 | #endif
|
| 603 |
|
| 604 | #ifdef CONFIG_PPC_BOOK3S_64
|
| 605 | HSTATE_FIELD(HSTATE_CFAR, cfar);
|
| 606 | HSTATE_FIELD(HSTATE_PPR, ppr);
|
| 607 | HSTATE_FIELD(HSTATE_HOST_FSCR, host_fscr);
|
| 608 | #endif
|
| 609 |
|
| 610 | #else
|
| 611 | OFFSET(VCPU_CR, kvm_vcpu, arch.regs.ccr);
|
| 612 | OFFSET(VCPU_XER, kvm_vcpu, arch.regs.xer);
|
| 613 | OFFSET(VCPU_LR, kvm_vcpu, arch.regs.link);
|
| 614 | OFFSET(VCPU_CTR, kvm_vcpu, arch.regs.ctr);
|
| 615 | OFFSET(VCPU_PC, kvm_vcpu, arch.regs.nip);
|
| 616 | OFFSET(VCPU_SPRG9, kvm_vcpu, arch.sprg9);
|
| 617 | OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
|
| 618 | OFFSET(VCPU_FAULT_DEAR, kvm_vcpu, arch.fault_dear);
|
| 619 | OFFSET(VCPU_FAULT_ESR, kvm_vcpu, arch.fault_esr);
|
| 620 | OFFSET(VCPU_CRIT_SAVE, kvm_vcpu, arch.crit_save);
|
| 621 | #endif
|
| 622 | #endif
|
| 623 |
|
| 624 | #ifdef CONFIG_KVM_GUEST
|
| 625 | OFFSET(KVM_MAGIC_SCRATCH1, kvm_vcpu_arch_shared, scratch1);
|
| 626 | OFFSET(KVM_MAGIC_SCRATCH2, kvm_vcpu_arch_shared, scratch2);
|
| 627 | OFFSET(KVM_MAGIC_SCRATCH3, kvm_vcpu_arch_shared, scratch3);
|
| 628 | OFFSET(KVM_MAGIC_INT, kvm_vcpu_arch_shared, int_pending);
|
| 629 | OFFSET(KVM_MAGIC_MSR, kvm_vcpu_arch_shared, msr);
|
| 630 | OFFSET(KVM_MAGIC_CRITICAL, kvm_vcpu_arch_shared, critical);
|
| 631 | OFFSET(KVM_MAGIC_SR, kvm_vcpu_arch_shared, sr);
|
| 632 | #endif
|
| 633 |
|
| 634 | #ifdef CONFIG_44x
|
| 635 | DEFINE(PGD_T_LOG2, PGD_T_LOG2);
|
| 636 | DEFINE(PTE_T_LOG2, PTE_T_LOG2);
|
| 637 | #endif
|
| 638 | #ifdef CONFIG_PPC_E500
|
| 639 | DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
|
| 640 | OFFSET(TLBCAM_MAS0, tlbcam, MAS0);
|
| 641 | OFFSET(TLBCAM_MAS1, tlbcam, MAS1);
|
| 642 | OFFSET(TLBCAM_MAS2, tlbcam, MAS2);
|
| 643 | OFFSET(TLBCAM_MAS3, tlbcam, MAS3);
|
| 644 | OFFSET(TLBCAM_MAS7, tlbcam, MAS7);
|
| 645 | #endif
|
| 646 |
|
| 647 | #if defined(CONFIG_KVM) && defined(CONFIG_SPE)
|
| 648 | OFFSET(VCPU_EVR, kvm_vcpu, arch.evr[0]);
|
| 649 | OFFSET(VCPU_ACC, kvm_vcpu, arch.acc);
|
| 650 | OFFSET(VCPU_SPEFSCR, kvm_vcpu, arch.spefscr);
|
| 651 | OFFSET(VCPU_HOST_SPEFSCR, kvm_vcpu, arch.host_spefscr);
|
| 652 | #endif
|
| 653 |
|
| 654 | #ifdef CONFIG_KVM_BOOKE_HV
|
| 655 | OFFSET(VCPU_HOST_MAS4, kvm_vcpu, arch.host_mas4);
|
| 656 | OFFSET(VCPU_HOST_MAS6, kvm_vcpu, arch.host_mas6);
|
| 657 | #endif
|
| 658 |
|
| 659 | #ifdef CONFIG_KVM_EXIT_TIMING
|
| 660 | OFFSET(VCPU_TIMING_EXIT_TBU, kvm_vcpu, arch.timing_exit.tv32.tbu);
|
| 661 | OFFSET(VCPU_TIMING_EXIT_TBL, kvm_vcpu, arch.timing_exit.tv32.tbl);
|
| 662 | OFFSET(VCPU_TIMING_LAST_ENTER_TBU, kvm_vcpu, arch.timing_last_enter.tv32.tbu);
|
| 663 | OFFSET(VCPU_TIMING_LAST_ENTER_TBL, kvm_vcpu, arch.timing_last_enter.tv32.tbl);
|
| 664 | #endif
|
| 665 |
|
| 666 | DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);
|
| 667 |
|
| 668 | #ifdef CONFIG_PPC_8xx
|
| 669 | DEFINE(VIRT_IMMR_BASE, (u64)__fix_to_virt(FIX_IMMR_BASE));
|
| 670 | #endif
|
| 671 |
|
| 672 | #ifdef CONFIG_XMON
|
| 673 | DEFINE(BPT_SIZE, BPT_SIZE);
|
| 674 | #endif
|
| 675 |
|
| 676 | #ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE
|
| 677 | DEFINE(FTRACE_OOL_STUB_SIZE, sizeof(struct ftrace_ool_stub));
|
| 678 | #endif
|
| 679 |
|
| 680 | #ifdef CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS
|
| 681 | OFFSET(FTRACE_OPS_FUNC, ftrace_ops, func);
|
| 682 | #ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
|
| 683 | OFFSET(FTRACE_OPS_DIRECT_CALL, ftrace_ops, direct_call);
|
| 684 | #endif
|
| 685 | #endif
|
| 686 |
|
| 687 | return 0;
|
| 688 | }
|