| 1 | /* SPDX-License-Identifier: GPL-2.0 */
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| 2 |
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| 3 | /*
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| 4 | * String handling functions for PowerPC32
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| 5 | *
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| 6 | * Copyright (C) 1996 Paul Mackerras.
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| 7 | *
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| 8 | */
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| 9 |
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| 10 | |
| 11 | |
| 12 | |
| 13 |
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| 14 | .text
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| 15 |
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| 16 | CACHELINE_BYTES = L1_CACHE_BYTES
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| 17 | LG_CACHELINE_BYTES = L1_CACHE_SHIFT
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| 18 | CACHELINE_MASK = (L1_CACHE_BYTES-1)
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| 19 |
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| 20 | _GLOBAL(__arch_clear_user)
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| 21 | /*
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| 22 | * Use dcbz on the complete cache lines in the destination
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| 23 | * to set them to zero. This requires that the destination
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| 24 | * area is cacheable.
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| 25 | */
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| 26 | cmplwi cr0, r4, 4
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| 27 | mr r10, r3
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| 28 | li r3, 0
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| 29 | blt 7f
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| 30 |
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| 31 | 11: stw r3, 0(r10)
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| 32 | beqlr
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| 33 | andi. r0, r10, 3
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| 34 | add r11, r0, r4
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| 35 | subf r6, r0, r10
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| 36 |
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| 37 | clrlwi r7, r6, 32 - LG_CACHELINE_BYTES
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| 38 | add r8, r7, r11
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| 39 | srwi r9, r8, LG_CACHELINE_BYTES
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| 40 | addic. r9, r9, -1 /* total number of complete cachelines */
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| 41 | ble 2f
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| 42 | xori r0, r7, CACHELINE_MASK & ~3
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| 43 | srwi. r0, r0, 2
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| 44 | beq 3f
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| 45 | mtctr r0
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| 46 | 4: stwu r3, 4(r6)
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| 47 | bdnz 4b
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| 48 | 3: mtctr r9
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| 49 | li r7, 4
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| 50 | 10: dcbz r7, r6
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| 51 | addi r6, r6, CACHELINE_BYTES
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| 52 | bdnz 10b
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| 53 | clrlwi r11, r8, 32 - LG_CACHELINE_BYTES
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| 54 | addi r11, r11, 4
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| 55 |
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| 56 | 2: srwi r0 ,r11 ,2
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| 57 | mtctr r0
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| 58 | bdz 6f
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| 59 | 1: stwu r3, 4(r6)
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| 60 | bdnz 1b
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| 61 | 6: andi. r11, r11, 3
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| 62 | beqlr
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| 63 | mtctr r11
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| 64 | addi r6, r6, 3
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| 65 | 8: stbu r3, 1(r6)
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| 66 | bdnz 8b
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| 67 | blr
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| 68 |
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| 69 | 7: cmpwi cr0, r4, 0
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| 70 | beqlr
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| 71 | mtctr r4
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| 72 | addi r6, r10, -1
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| 73 | 9: stbu r3, 1(r6)
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| 74 | bdnz 9b
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| 75 | blr
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| 76 |
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| 77 | 90: mr r3, r4
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| 78 | blr
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| 79 | 91: add r3, r10, r4
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| 80 | subf r3, r6, r3
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| 81 | blr
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| 82 |
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| 83 | EX_TABLE(11b, 90b)
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| 84 | EX_TABLE(4b, 91b)
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| 85 | EX_TABLE(10b, 91b)
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| 86 | EX_TABLE(1b, 91b)
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| 87 | EX_TABLE(8b, 91b)
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| 88 | EX_TABLE(9b, 91b)
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| 89 |
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| 90 | EXPORT_SYMBOL(__arch_clear_user)
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