| 1 | |
| 2 | |
| 3 | * In-kernel vector facility support functions
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| 4 | *
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| 5 | * Copyright IBM Corp. 2015
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| 6 | * Author(s): Hendrik Brueckner <[email protected]>
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| 7 |
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| 8 |
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| 9 | #include <linux/export.h>
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| 10 | #include <linux/kernel.h>
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| 11 | #include <linux/cpu.h>
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| 12 | #include <linux/sched.h>
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| 13 | #include <asm/fpu.h>
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| 14 |
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| 15 | void __kernel_fpu_begin(struct kernel_fpu *state, int flags)
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| 16 | {
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| 17 | __vector128 *vxrs = state->vxrs;
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| 18 | int mask;
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| 19 |
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| 20 | |
| 21 | * Limit the save to the FPU/vector registers already
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| 22 | * in use by the previous context.
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| 23 |
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| 24 | flags &= state->hdr.mask;
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| 25 | if (flags & KERNEL_FPC)
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| 26 | fpu_stfpc(&state->hdr.fpc);
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| 27 | if (!cpu_has_vx()) {
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| 28 | if (flags & KERNEL_VXR_LOW)
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| 29 | save_fp_regs_vx(vxrs);
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| 30 | return;
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| 31 | }
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| 32 | mask = flags & KERNEL_VXR;
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| 33 | if (mask == KERNEL_VXR) {
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| 34 | vxrs += fpu_vstm(0, 15, vxrs);
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| 35 | vxrs += fpu_vstm(16, 31, vxrs);
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| 36 | return;
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| 37 | }
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| 38 | if (mask == KERNEL_VXR_MID) {
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| 39 | vxrs += fpu_vstm(8, 23, vxrs);
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| 40 | return;
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| 41 | }
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| 42 | mask = flags & KERNEL_VXR_LOW;
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| 43 | if (mask) {
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| 44 | if (mask == KERNEL_VXR_LOW)
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| 45 | vxrs += fpu_vstm(0, 15, vxrs);
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| 46 | else if (mask == KERNEL_VXR_V0V7)
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| 47 | vxrs += fpu_vstm(0, 7, vxrs);
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| 48 | else
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| 49 | vxrs += fpu_vstm(8, 15, vxrs);
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| 50 | }
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| 51 | mask = flags & KERNEL_VXR_HIGH;
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| 52 | if (mask) {
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| 53 | if (mask == KERNEL_VXR_HIGH)
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| 54 | vxrs += fpu_vstm(16, 31, vxrs);
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| 55 | else if (mask == KERNEL_VXR_V16V23)
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| 56 | vxrs += fpu_vstm(16, 23, vxrs);
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| 57 | else
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| 58 | vxrs += fpu_vstm(24, 31, vxrs);
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| 59 | }
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| 60 | }
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| 61 | EXPORT_SYMBOL(__kernel_fpu_begin);
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| 62 |
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| 63 | void __kernel_fpu_end(struct kernel_fpu *state, int flags)
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| 64 | {
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| 65 | __vector128 *vxrs = state->vxrs;
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| 66 | int mask;
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| 67 |
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| 68 | |
| 69 | * Limit the restore to the FPU/vector registers of the
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| 70 | * previous context that have been overwritten by the
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| 71 | * current context.
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| 72 |
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| 73 | flags &= state->hdr.mask;
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| 74 | if (flags & KERNEL_FPC)
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| 75 | fpu_lfpc(&state->hdr.fpc);
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| 76 | if (!cpu_has_vx()) {
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| 77 | if (flags & KERNEL_VXR_LOW)
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| 78 | load_fp_regs_vx(vxrs);
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| 79 | return;
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| 80 | }
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| 81 | mask = flags & KERNEL_VXR;
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| 82 | if (mask == KERNEL_VXR) {
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| 83 | vxrs += fpu_vlm(0, 15, vxrs);
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| 84 | vxrs += fpu_vlm(16, 31, vxrs);
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| 85 | return;
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| 86 | }
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| 87 | if (mask == KERNEL_VXR_MID) {
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| 88 | vxrs += fpu_vlm(8, 23, vxrs);
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| 89 | return;
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| 90 | }
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| 91 | mask = flags & KERNEL_VXR_LOW;
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| 92 | if (mask) {
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| 93 | if (mask == KERNEL_VXR_LOW)
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| 94 | vxrs += fpu_vlm(0, 15, vxrs);
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| 95 | else if (mask == KERNEL_VXR_V0V7)
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| 96 | vxrs += fpu_vlm(0, 7, vxrs);
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| 97 | else
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| 98 | vxrs += fpu_vlm(8, 15, vxrs);
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| 99 | }
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| 100 | mask = flags & KERNEL_VXR_HIGH;
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| 101 | if (mask) {
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| 102 | if (mask == KERNEL_VXR_HIGH)
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| 103 | vxrs += fpu_vlm(16, 31, vxrs);
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| 104 | else if (mask == KERNEL_VXR_V16V23)
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| 105 | vxrs += fpu_vlm(16, 23, vxrs);
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| 106 | else
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| 107 | vxrs += fpu_vlm(24, 31, vxrs);
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| 108 | }
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| 109 | }
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| 110 | EXPORT_SYMBOL(__kernel_fpu_end);
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| 111 |
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| 112 | void load_fpu_state(struct fpu *state, int flags)
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| 113 | {
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| 114 | __vector128 *vxrs = &state->vxrs[0];
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| 115 | int mask;
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| 116 |
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| 117 | if (flags & KERNEL_FPC)
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| 118 | fpu_lfpc_safe(&state->fpc);
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| 119 | if (!cpu_has_vx()) {
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| 120 | if (flags & KERNEL_VXR_V0V7)
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| 121 | load_fp_regs_vx(state->vxrs);
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| 122 | return;
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| 123 | }
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| 124 | mask = flags & KERNEL_VXR;
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| 125 | if (mask == KERNEL_VXR) {
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| 126 | fpu_vlm(0, 15, &vxrs[0]);
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| 127 | fpu_vlm(16, 31, &vxrs[16]);
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| 128 | return;
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| 129 | }
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| 130 | if (mask == KERNEL_VXR_MID) {
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| 131 | fpu_vlm(8, 23, &vxrs[8]);
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| 132 | return;
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| 133 | }
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| 134 | mask = flags & KERNEL_VXR_LOW;
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| 135 | if (mask) {
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| 136 | if (mask == KERNEL_VXR_LOW)
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| 137 | fpu_vlm(0, 15, &vxrs[0]);
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| 138 | else if (mask == KERNEL_VXR_V0V7)
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| 139 | fpu_vlm(0, 7, &vxrs[0]);
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| 140 | else
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| 141 | fpu_vlm(8, 15, &vxrs[8]);
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| 142 | }
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| 143 | mask = flags & KERNEL_VXR_HIGH;
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| 144 | if (mask) {
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| 145 | if (mask == KERNEL_VXR_HIGH)
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| 146 | fpu_vlm(16, 31, &vxrs[16]);
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| 147 | else if (mask == KERNEL_VXR_V16V23)
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| 148 | fpu_vlm(16, 23, &vxrs[16]);
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| 149 | else
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| 150 | fpu_vlm(24, 31, &vxrs[24]);
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| 151 | }
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| 152 | }
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| 153 |
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| 154 | void save_fpu_state(struct fpu *state, int flags)
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| 155 | {
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| 156 | __vector128 *vxrs = &state->vxrs[0];
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| 157 | int mask;
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| 158 |
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| 159 | if (flags & KERNEL_FPC)
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| 160 | fpu_stfpc(&state->fpc);
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| 161 | if (!cpu_has_vx()) {
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| 162 | if (flags & KERNEL_VXR_LOW)
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| 163 | save_fp_regs_vx(state->vxrs);
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| 164 | return;
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| 165 | }
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| 166 | mask = flags & KERNEL_VXR;
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| 167 | if (mask == KERNEL_VXR) {
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| 168 | fpu_vstm(0, 15, &vxrs[0]);
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| 169 | fpu_vstm(16, 31, &vxrs[16]);
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| 170 | return;
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| 171 | }
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| 172 | if (mask == KERNEL_VXR_MID) {
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| 173 | fpu_vstm(8, 23, &vxrs[8]);
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| 174 | return;
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| 175 | }
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| 176 | mask = flags & KERNEL_VXR_LOW;
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| 177 | if (mask) {
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| 178 | if (mask == KERNEL_VXR_LOW)
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| 179 | fpu_vstm(0, 15, &vxrs[0]);
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| 180 | else if (mask == KERNEL_VXR_V0V7)
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| 181 | fpu_vstm(0, 7, &vxrs[0]);
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| 182 | else
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| 183 | fpu_vstm(8, 15, &vxrs[8]);
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| 184 | }
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| 185 | mask = flags & KERNEL_VXR_HIGH;
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| 186 | if (mask) {
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| 187 | if (mask == KERNEL_VXR_HIGH)
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| 188 | fpu_vstm(16, 31, &vxrs[16]);
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| 189 | else if (mask == KERNEL_VXR_V16V23)
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| 190 | fpu_vstm(16, 23, &vxrs[16]);
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| 191 | else
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| 192 | fpu_vstm(24, 31, &vxrs[24]);
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| 193 | }
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| 194 | }
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| 195 | EXPORT_SYMBOL(save_fpu_state);
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