| 1 | |
| 2 | |
| 3 | * arch/sh/kernel/process.c
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| 4 | *
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| 5 | * This file handles the architecture-dependent parts of process handling..
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| 6 | *
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| 7 | * Copyright (C) 1995 Linus Torvalds
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| 8 | *
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| 9 | * SuperH version: Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
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| 10 | * Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC
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| 11 | * Copyright (C) 2002 - 2008 Paul Mundt
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| 12 |
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| 13 | #include <linux/module.h>
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| 14 | #include <linux/mm.h>
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| 15 | #include <linux/sched/debug.h>
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| 16 | #include <linux/sched/task.h>
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| 17 | #include <linux/sched/task_stack.h>
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| 18 | #include <linux/slab.h>
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| 19 | #include <linux/elfcore.h>
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| 20 | #include <linux/fs.h>
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| 21 | #include <linux/ftrace.h>
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| 22 | #include <linux/hw_breakpoint.h>
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| 23 | #include <linux/prefetch.h>
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| 24 | #include <linux/stackprotector.h>
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| 25 | #include <linux/uaccess.h>
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| 26 | #include <asm/mmu_context.h>
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| 27 | #include <asm/fpu.h>
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| 28 | #include <asm/syscalls.h>
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| 29 | #include <asm/switch_to.h>
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| 30 |
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| 31 | void show_regs(struct pt_regs * regs)
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| 32 | {
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| 33 | pr_info("\n");
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| 34 | show_regs_print_info(KERN_DEFAULT);
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| 35 |
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| 36 | pr_info("PC is at %pS\n", (void *)instruction_pointer(regs));
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| 37 | pr_info("PR is at %pS\n", (void *)regs->pr);
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| 38 |
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| 39 | pr_info("PC : %08lx SP : %08lx SR : %08lx ", regs->pc,
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| 40 | regs->regs[15], regs->sr);
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| 41 | #ifdef CONFIG_MMU
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| 42 | pr_cont("TEA : %08x\n", __raw_readl(MMU_TEA));
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| 43 | #else
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| 44 | pr_cont("\n");
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| 45 | #endif
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| 46 |
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| 47 | pr_info("R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n",
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| 48 | regs->regs[0], regs->regs[1], regs->regs[2], regs->regs[3]);
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| 49 | pr_info("R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n",
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| 50 | regs->regs[4], regs->regs[5], regs->regs[6], regs->regs[7]);
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| 51 | pr_info("R8 : %08lx R9 : %08lx R10 : %08lx R11 : %08lx\n",
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| 52 | regs->regs[8], regs->regs[9], regs->regs[10], regs->regs[11]);
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| 53 | pr_info("R12 : %08lx R13 : %08lx R14 : %08lx\n",
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| 54 | regs->regs[12], regs->regs[13], regs->regs[14]);
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| 55 | pr_info("MACH: %08lx MACL: %08lx GBR : %08lx PR : %08lx\n",
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| 56 | regs->mach, regs->macl, regs->gbr, regs->pr);
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| 57 |
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| 58 | show_trace(NULL, (unsigned long *)regs->regs[15], regs, KERN_DEFAULT);
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| 59 | show_code(regs);
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| 60 | }
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| 61 |
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| 62 | void start_thread(struct pt_regs *regs, unsigned long new_pc,
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| 63 | unsigned long new_sp)
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| 64 | {
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| 65 | regs->pr = 0;
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| 66 | regs->sr = SR_FD;
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| 67 | regs->pc = new_pc;
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| 68 | regs->regs[15] = new_sp;
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| 69 |
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| 70 | free_thread_xstate(current);
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| 71 | }
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| 72 | EXPORT_SYMBOL(start_thread);
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| 73 |
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| 74 | void flush_thread(void)
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| 75 | {
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| 76 | struct task_struct *tsk = current;
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| 77 |
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| 78 | flush_ptrace_hw_breakpoint(tsk);
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| 79 |
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| 80 | #if defined(CONFIG_SH_FPU)
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| 81 |
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| 82 | clear_fpu(tsk, task_pt_regs(tsk));
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| 83 | clear_used_math();
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| 84 | #endif
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| 85 | }
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| 86 |
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| 87 | asmlinkage void ret_from_fork(void);
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| 88 | asmlinkage void ret_from_kernel_thread(void);
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| 89 |
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| 90 | int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)
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| 91 | {
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| 92 | u64 clone_flags = args->flags;
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| 93 | unsigned long usp = args->stack;
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| 94 | unsigned long tls = args->tls;
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| 95 | struct thread_info *ti = task_thread_info(p);
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| 96 | struct pt_regs *childregs;
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| 97 |
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| 98 | #if defined(CONFIG_SH_DSP)
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| 99 | struct task_struct *tsk = current;
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| 100 |
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| 101 | if (is_dsp_enabled(tsk)) {
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| 102 | |
| 103 | * __save_dsp(p);
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| 104 | * p->thread.dsp_status.status |= SR_DSP
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| 105 |
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| 106 | p->thread.dsp_status = tsk->thread.dsp_status;
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| 107 | }
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| 108 | #endif
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| 109 |
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| 110 | memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
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| 111 |
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| 112 | childregs = task_pt_regs(p);
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| 113 | p->thread.sp = (unsigned long) childregs;
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| 114 | if (unlikely(args->fn)) {
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| 115 | memset(childregs, 0, sizeof(struct pt_regs));
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| 116 | p->thread.pc = (unsigned long) ret_from_kernel_thread;
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| 117 | childregs->regs[4] = (unsigned long) args->fn_arg;
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| 118 | childregs->regs[5] = (unsigned long) args->fn;
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| 119 | childregs->sr = SR_MD;
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| 120 | #if defined(CONFIG_SH_FPU)
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| 121 | childregs->sr |= SR_FD;
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| 122 | #endif
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| 123 | ti->status &= ~TS_USEDFPU;
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| 124 | p->thread.fpu_counter = 0;
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| 125 | return 0;
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| 126 | }
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| 127 | *childregs = *current_pt_regs();
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| 128 |
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| 129 | if (usp)
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| 130 | childregs->regs[15] = usp;
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| 131 |
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| 132 | if (clone_flags & CLONE_SETTLS)
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| 133 | childregs->gbr = tls;
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| 134 |
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| 135 | childregs->regs[0] = 0;
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| 136 | p->thread.pc = (unsigned long) ret_from_fork;
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| 137 | return 0;
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| 138 | }
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| 139 |
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| 140 | |
| 141 | * switch_to(x,y) should switch tasks from x to y.
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| 142 | *
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| 143 |
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| 144 | __notrace_funcgraph struct task_struct *
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| 145 | __switch_to(struct task_struct *prev, struct task_struct *next)
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| 146 | {
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| 147 | struct thread_struct *next_t = &next->thread;
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| 148 |
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| 149 | #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP)
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| 150 | __stack_chk_guard = next->stack_canary;
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| 151 | #endif
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| 152 |
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| 153 | unlazy_fpu(prev, task_pt_regs(prev));
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| 154 |
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| 155 |
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| 156 | if (next->thread.fpu_counter > 5)
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| 157 | prefetch(next_t->xstate);
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| 158 |
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| 159 | #ifdef CONFIG_MMU
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| 160 | |
| 161 | * Restore the kernel mode register
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| 162 | * k7 (r7_bank1)
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| 163 |
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| 164 | asm volatile("ldc %0, r7_bank"
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| 165 | :
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| 166 | : "r" (task_thread_info(next)));
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| 167 | #endif
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| 168 |
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| 169 | |
| 170 | * If the task has used fpu the last 5 timeslices, just do a full
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| 171 | * restore of the math state immediately to avoid the trap; the
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| 172 | * chances of needing FPU soon are obviously high now
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| 173 |
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| 174 | if (next->thread.fpu_counter > 5)
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| 175 | __fpu_state_restore();
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| 176 |
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| 177 | return prev;
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| 178 | }
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| 179 |
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| 180 | unsigned long __get_wchan(struct task_struct *p)
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| 181 | {
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| 182 | unsigned long pc;
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| 183 |
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| 184 | |
| 185 | * The same comment as on the Alpha applies here, too ...
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| 186 |
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| 187 | pc = thread_saved_pc(p);
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| 188 |
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| 189 | #ifdef CONFIG_FRAME_POINTER
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| 190 | if (in_sched_functions(pc)) {
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| 191 | unsigned long schedule_frame = (unsigned long)p->thread.sp;
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| 192 | return ((unsigned long *)schedule_frame)[21];
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| 193 | }
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| 194 | #endif
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| 195 |
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| 196 | return pc;
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| 197 | }
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