| 1 | |
| 2 | #include <linux/types.h>
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| 3 | #include "bitops.h"
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| 4 |
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| 5 | #include <asm/processor-flags.h>
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| 6 | #include <asm/msr-index.h>
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| 7 | #include "cpuflags.h"
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| 8 |
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| 9 | struct cpu_features cpu;
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| 10 | u32 cpu_vendor[3];
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| 11 |
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| 12 | static bool loaded_flags;
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| 13 |
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| 14 | static int has_fpu(void)
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| 15 | {
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| 16 | u16 fcw = -1, fsw = -1;
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| 17 | unsigned long cr0;
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| 18 |
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| 19 | asm volatile("mov %%cr0,%0" : "=r" (cr0));
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| 20 | if (cr0 & (X86_CR0_EM|X86_CR0_TS)) {
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| 21 | cr0 &= ~(X86_CR0_EM|X86_CR0_TS);
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| 22 | asm volatile("mov %0,%%cr0" : : "r" (cr0));
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| 23 | }
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| 24 |
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| 25 | asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
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| 26 | : "+m" (fsw), "+m" (fcw));
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| 27 |
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| 28 | return fsw == 0 && (fcw & 0x103f) == 0x003f;
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| 29 | }
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| 30 |
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| 31 | #ifdef CONFIG_X86_32
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| 32 | |
| 33 | * For building the 16-bit code we want to explicitly specify 32-bit
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| 34 | * push/pop operations, rather than just saying 'pushf' or 'popf' and
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| 35 | * letting the compiler choose.
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| 36 |
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| 37 | bool has_eflag(unsigned long mask)
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| 38 | {
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| 39 | unsigned long f0, f1;
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| 40 |
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| 41 | asm volatile("pushfl \n\t"
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| 42 | "pushfl \n\t"
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| 43 | "pop %0 \n\t"
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| 44 | "mov %0,%1 \n\t"
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| 45 | "xor %2,%1 \n\t"
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| 46 | "push %1 \n\t"
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| 47 | "popfl \n\t"
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| 48 | "pushfl \n\t"
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| 49 | "pop %1 \n\t"
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| 50 | "popfl"
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| 51 | : "=&r" (f0), "=&r" (f1)
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| 52 | : "ri" (mask));
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| 53 |
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| 54 | return !!((f0^f1) & mask);
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| 55 | }
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| 56 | #endif
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| 57 |
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| 58 | void cpuid_count(u32 id, u32 count, u32 *a, u32 *b, u32 *c, u32 *d)
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| 59 | {
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| 60 | asm volatile("cpuid"
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| 61 | : "=a" (*a), "=b" (*b), "=c" (*c), "=d" (*d)
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| 62 | : "0" (id), "2" (count)
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| 63 | );
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| 64 | }
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| 65 |
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| 66 | #define cpuid(id, a, b, c, d) cpuid_count(id, 0, a, b, c, d)
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| 67 |
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| 68 | void get_cpuflags(void)
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| 69 | {
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| 70 | u32 max_intel_level, max_amd_level;
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| 71 | u32 tfms;
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| 72 | u32 ignored;
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| 73 |
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| 74 | if (loaded_flags)
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| 75 | return;
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| 76 | loaded_flags = true;
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| 77 |
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| 78 | if (has_fpu())
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| 79 | set_bit(X86_FEATURE_FPU, cpu.flags);
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| 80 |
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| 81 | if (has_eflag(X86_EFLAGS_ID)) {
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| 82 | cpuid(0x0, &max_intel_level, &cpu_vendor[0], &cpu_vendor[2],
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| 83 | &cpu_vendor[1]);
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| 84 |
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| 85 | if (max_intel_level >= 0x00000001 &&
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| 86 | max_intel_level <= 0x0000ffff) {
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| 87 | cpuid(0x1, &tfms, &ignored, &cpu.flags[4],
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| 88 | &cpu.flags[0]);
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| 89 | cpu.level = (tfms >> 8) & 15;
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| 90 | cpu.family = cpu.level;
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| 91 | cpu.model = (tfms >> 4) & 15;
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| 92 | if (cpu.level >= 6)
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| 93 | cpu.model += ((tfms >> 16) & 0xf) << 4;
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| 94 | }
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| 95 |
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| 96 | if (max_intel_level >= 0x00000007) {
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| 97 | cpuid_count(0x00000007, 0, &ignored, &ignored,
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| 98 | &cpu.flags[16], &ignored);
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| 99 | }
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| 100 |
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| 101 | cpuid(0x80000000, &max_amd_level, &ignored, &ignored,
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| 102 | &ignored);
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| 103 |
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| 104 | if (max_amd_level >= 0x80000001 &&
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| 105 | max_amd_level <= 0x8000ffff) {
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| 106 | cpuid(0x80000001, &ignored, &ignored, &cpu.flags[6],
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| 107 | &cpu.flags[1]);
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| 108 | }
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| 109 | }
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| 110 | }
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