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1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_PERCPU_H
3#define _ASM_X86_PERCPU_H
4
5#ifdef CONFIG_X86_64
6# define __percpu_seg gs
7# define __percpu_rel (%rip)
8#else
9# define __percpu_seg fs
10# define __percpu_rel
11#endif
12
13#ifdef __ASSEMBLER__
14
15#ifdef CONFIG_SMP
16# define __percpu %__percpu_seg:
17#else
18# define __percpu
19#endif
20
21#define PER_CPU_VAR(var) __percpu(var)__percpu_rel
22
23#else /* !__ASSEMBLER__: */
24
25#include <linux/args.h>
26#include <linux/bits.h>
27#include <linux/build_bug.h>
28#include <linux/stringify.h>
29#include <asm/asm.h>
30
31#ifdef CONFIG_SMP
32
33#define __force_percpu_prefix "%%"__stringify(__percpu_seg)":"
34
35#ifdef CONFIG_CC_HAS_NAMED_AS
36
37#ifdef __CHECKER__
38# define __seg_gs __attribute__((address_space(__seg_gs)))
39# define __seg_fs __attribute__((address_space(__seg_fs)))
40#endif
41
42#define __percpu_prefix
43
44#else /* !CONFIG_CC_HAS_NAMED_AS: */
45
46#define __percpu_prefix __force_percpu_prefix
47
48#endif /* CONFIG_CC_HAS_NAMED_AS */
49
50/*
51 * Compared to the generic __my_cpu_offset version, the following
52 * saves one instruction and avoids clobbering a temp register.
53 */
54#define __my_cpu_offset this_cpu_read(this_cpu_off)
55
56/*
57 * arch_raw_cpu_ptr should not be used in 32-bit VDSO for a 64-bit
58 * kernel, because games are played with CONFIG_X86_64 there and
59 * sizeof(this_cpu_off) becames 4.
60 */
61#ifndef BUILD_VDSO32_64
62#define arch_raw_cpu_ptr(_ptr) \
63({ \
64 unsigned long tcp_ptr__ = raw_cpu_read_long(this_cpu_off); \
65 \
66 tcp_ptr__ += (__force unsigned long)(_ptr); \
67 (TYPEOF_UNQUAL(*(_ptr)) __force __kernel *)tcp_ptr__; \
68})
69#else
70#define arch_raw_cpu_ptr(_ptr) \
71({ \
72 BUILD_BUG(); \
73 (TYPEOF_UNQUAL(*(_ptr)) __force __kernel *)0; \
74})
75#endif
76
77#define PER_CPU_VAR(var) %__percpu_seg:(var)__percpu_rel
78
79#else /* !CONFIG_SMP: */
80
81#define __force_percpu_prefix
82#define __percpu_prefix
83
84#define PER_CPU_VAR(var) (var)__percpu_rel
85
86#endif /* CONFIG_SMP */
87
88#if defined(CONFIG_USE_X86_SEG_SUPPORT) && defined(USE_TYPEOF_UNQUAL)
89# define __my_cpu_type(var) typeof(var)
90# define __my_cpu_ptr(ptr) (ptr)
91# define __my_cpu_var(var) (var)
92#else
93# define __my_cpu_type(var) typeof(var) __percpu_seg_override
94# define __my_cpu_ptr(ptr) (__my_cpu_type(*(ptr))*)(__force uintptr_t)(ptr)
95# define __my_cpu_var(var) (*__my_cpu_ptr(&(var)))
96#endif
97
98#define __force_percpu_arg(x) __force_percpu_prefix "%" #x
99#define __percpu_arg(x) __percpu_prefix "%" #x
100
101/*
102 * For arch-specific code, we can use direct single-insn ops (they
103 * don't give an lvalue though).
104 */
105
106#define __pcpu_type_1 u8
107#define __pcpu_type_2 u16
108#define __pcpu_type_4 u32
109#define __pcpu_type_8 u64
110
111#define __pcpu_cast_1(val) ((u8)(((unsigned long) val) & 0xff))
112#define __pcpu_cast_2(val) ((u16)(((unsigned long) val) & 0xffff))
113#define __pcpu_cast_4(val) ((u32)(((unsigned long) val) & 0xffffffff))
114#define __pcpu_cast_8(val) ((u64)(val))
115
116#define __pcpu_op_1(op) op "b "
117#define __pcpu_op_2(op) op "w "
118#define __pcpu_op_4(op) op "l "
119#define __pcpu_op_8(op) op "q "
120
121#define __pcpu_reg_1(mod, x) mod "q" (x)
122#define __pcpu_reg_2(mod, x) mod "r" (x)
123#define __pcpu_reg_4(mod, x) mod "r" (x)
124#define __pcpu_reg_8(mod, x) mod "r" (x)
125
126#define __pcpu_reg_imm_1(x) "qi" (x)
127#define __pcpu_reg_imm_2(x) "ri" (x)
128#define __pcpu_reg_imm_4(x) "ri" (x)
129#define __pcpu_reg_imm_8(x) "re" (x)
130
131#ifdef CONFIG_USE_X86_SEG_SUPPORT
132
133#define __raw_cpu_read(size, qual, pcp) \
134({ \
135 *(qual __my_cpu_type(pcp) * __force)__my_cpu_ptr(&(pcp)); \
136})
137
138#define __raw_cpu_write(size, qual, pcp, val) \
139do { \
140 *(qual __my_cpu_type(pcp) * __force)__my_cpu_ptr(&(pcp)) = (val); \
141} while (0)
142
143#define __raw_cpu_read_const(pcp) __raw_cpu_read(, , pcp)
144
145#else /* !CONFIG_USE_X86_SEG_SUPPORT: */
146
147#define __raw_cpu_read(size, qual, _var) \
148({ \
149 __pcpu_type_##size pfo_val__; \
150 \
151 asm qual (__pcpu_op_##size("mov") \
152 __percpu_arg([var]) ", %[val]" \
153 : [val] __pcpu_reg_##size("=", pfo_val__) \
154 : [var] "m" (__my_cpu_var(_var))); \
155 \
156 (typeof(_var))(unsigned long) pfo_val__; \
157})
158
159#define __raw_cpu_write(size, qual, _var, _val) \
160do { \
161 __pcpu_type_##size pto_val__ = __pcpu_cast_##size(_val); \
162 \
163 if (0) { \
164 TYPEOF_UNQUAL(_var) pto_tmp__; \
165 pto_tmp__ = (_val); \
166 (void)pto_tmp__; \
167 } \
168 asm qual (__pcpu_op_##size("mov") "%[val], " \
169 __percpu_arg([var]) \
170 : [var] "=m" (__my_cpu_var(_var)) \
171 : [val] __pcpu_reg_imm_##size(pto_val__)); \
172} while (0)
173
174/*
175 * The generic per-CPU infrastrucutre is not suitable for
176 * reading const-qualified variables.
177 */
178#define __raw_cpu_read_const(pcp) ({ BUILD_BUG(); (typeof(pcp))0; })
179
180#endif /* CONFIG_USE_X86_SEG_SUPPORT */
181
182#define __raw_cpu_read_stable(size, _var) \
183({ \
184 __pcpu_type_##size pfo_val__; \
185 \
186 asm(__pcpu_op_##size("mov") \
187 __force_percpu_arg(a[var]) ", %[val]" \
188 : [val] __pcpu_reg_##size("=", pfo_val__) \
189 : [var] "i" (&(_var))); \
190 \
191 (typeof(_var))(unsigned long) pfo_val__; \
192})
193
194#define percpu_unary_op(size, qual, op, _var) \
195({ \
196 asm qual (__pcpu_op_##size(op) __percpu_arg([var]) \
197 : [var] "+m" (__my_cpu_var(_var))); \
198})
199
200#define percpu_binary_op(size, qual, op, _var, _val) \
201do { \
202 __pcpu_type_##size pto_val__ = __pcpu_cast_##size(_val); \
203 \
204 if (0) { \
205 TYPEOF_UNQUAL(_var) pto_tmp__; \
206 pto_tmp__ = (_val); \
207 (void)pto_tmp__; \
208 } \
209 asm qual (__pcpu_op_##size(op) "%[val], " __percpu_arg([var]) \
210 : [var] "+m" (__my_cpu_var(_var)) \
211 : [val] __pcpu_reg_imm_##size(pto_val__)); \
212} while (0)
213
214/*
215 * Generate a per-CPU add to memory instruction and optimize code
216 * if one is added or subtracted.
217 */
218#define percpu_add_op(size, qual, var, val) \
219do { \
220 const int pao_ID__ = \
221 (__builtin_constant_p(val) && \
222 ((val) == 1 || \
223 (val) == (typeof(val))-1)) ? (int)(val) : 0; \
224 \
225 if (0) { \
226 TYPEOF_UNQUAL(var) pao_tmp__; \
227 pao_tmp__ = (val); \
228 (void)pao_tmp__; \
229 } \
230 if (pao_ID__ == 1) \
231 percpu_unary_op(size, qual, "inc", var); \
232 else if (pao_ID__ == -1) \
233 percpu_unary_op(size, qual, "dec", var); \
234 else \
235 percpu_binary_op(size, qual, "add", var, val); \
236} while (0)
237
238/*
239 * Add return operation
240 */
241#define percpu_add_return_op(size, qual, _var, _val) \
242({ \
243 __pcpu_type_##size paro_tmp__ = __pcpu_cast_##size(_val); \
244 \
245 asm qual (__pcpu_op_##size("xadd") "%[tmp], " \
246 __percpu_arg([var]) \
247 : [tmp] __pcpu_reg_##size("+", paro_tmp__), \
248 [var] "+m" (__my_cpu_var(_var)) \
249 : : "memory"); \
250 (typeof(_var))(unsigned long) (paro_tmp__ + _val); \
251})
252
253/*
254 * raw_cpu_xchg() can use a load-store since
255 * it is not required to be IRQ-safe.
256 */
257#define raw_percpu_xchg_op(_var, _nval) \
258({ \
259 TYPEOF_UNQUAL(_var) pxo_old__ = raw_cpu_read(_var); \
260 \
261 raw_cpu_write(_var, _nval); \
262 \
263 pxo_old__; \
264})
265
266/*
267 * this_cpu_xchg() is implemented using CMPXCHG without a LOCK prefix.
268 * XCHG is expensive due to the implied LOCK prefix. The processor
269 * cannot prefetch cachelines if XCHG is used.
270 */
271#define this_percpu_xchg_op(_var, _nval) \
272({ \
273 TYPEOF_UNQUAL(_var) pxo_old__ = this_cpu_read(_var); \
274 \
275 do { } while (!this_cpu_try_cmpxchg(_var, &pxo_old__, _nval)); \
276 \
277 pxo_old__; \
278})
279
280/*
281 * CMPXCHG has no such implied lock semantics as a result it is much
282 * more efficient for CPU-local operations.
283 */
284#define percpu_cmpxchg_op(size, qual, _var, _oval, _nval) \
285({ \
286 __pcpu_type_##size pco_old__ = __pcpu_cast_##size(_oval); \
287 __pcpu_type_##size pco_new__ = __pcpu_cast_##size(_nval); \
288 \
289 asm qual (__pcpu_op_##size("cmpxchg") "%[nval], " \
290 __percpu_arg([var]) \
291 : [oval] "+a" (pco_old__), \
292 [var] "+m" (__my_cpu_var(_var)) \
293 : [nval] __pcpu_reg_##size(, pco_new__) \
294 : "memory"); \
295 \
296 (typeof(_var))(unsigned long) pco_old__; \
297})
298
299#define percpu_try_cmpxchg_op(size, qual, _var, _ovalp, _nval) \
300({ \
301 bool success; \
302 __pcpu_type_##size *pco_oval__ = (__pcpu_type_##size *)(_ovalp); \
303 __pcpu_type_##size pco_old__ = *pco_oval__; \
304 __pcpu_type_##size pco_new__ = __pcpu_cast_##size(_nval); \
305 \
306 asm qual (__pcpu_op_##size("cmpxchg") "%[nval], " \
307 __percpu_arg([var]) \
308 : "=@ccz" (success), \
309 [oval] "+a" (pco_old__), \
310 [var] "+m" (__my_cpu_var(_var)) \
311 : [nval] __pcpu_reg_##size(, pco_new__) \
312 : "memory"); \
313 if (unlikely(!success)) \
314 *pco_oval__ = pco_old__; \
315 \
316 likely(success); \
317})
318
319#if defined(CONFIG_X86_32) && !defined(CONFIG_UML)
320
321#define percpu_cmpxchg64_op(size, qual, _var, _oval, _nval) \
322({ \
323 union { \
324 u64 var; \
325 struct { \
326 u32 low, high; \
327 }; \
328 } old__, new__; \
329 \
330 old__.var = _oval; \
331 new__.var = _nval; \
332 \
333 asm_inline qual ( \
334 ALTERNATIVE("call this_cpu_cmpxchg8b_emu", \
335 "cmpxchg8b " __percpu_arg([var]), X86_FEATURE_CX8) \
336 : ALT_OUTPUT_SP([var] "+m" (__my_cpu_var(_var)), \
337 "+a" (old__.low), "+d" (old__.high)) \
338 : "b" (new__.low), "c" (new__.high), \
339 "S" (&(_var)) \
340 : "memory"); \
341 \
342 old__.var; \
343})
344
345#define raw_cpu_cmpxchg64(pcp, oval, nval) percpu_cmpxchg64_op(8, , pcp, oval, nval)
346#define this_cpu_cmpxchg64(pcp, oval, nval) percpu_cmpxchg64_op(8, volatile, pcp, oval, nval)
347
348#define percpu_try_cmpxchg64_op(size, qual, _var, _ovalp, _nval) \
349({ \
350 bool success; \
351 u64 *_oval = (u64 *)(_ovalp); \
352 union { \
353 u64 var; \
354 struct { \
355 u32 low, high; \
356 }; \
357 } old__, new__; \
358 \
359 old__.var = *_oval; \
360 new__.var = _nval; \
361 \
362 asm_inline qual ( \
363 ALTERNATIVE("call this_cpu_cmpxchg8b_emu", \
364 "cmpxchg8b " __percpu_arg([var]), X86_FEATURE_CX8) \
365 : ALT_OUTPUT_SP("=@ccz" (success), \
366 [var] "+m" (__my_cpu_var(_var)), \
367 "+a" (old__.low), "+d" (old__.high)) \
368 : "b" (new__.low), "c" (new__.high), \
369 "S" (&(_var)) \
370 : "memory"); \
371 if (unlikely(!success)) \
372 *_oval = old__.var; \
373 \
374 likely(success); \
375})
376
377#define raw_cpu_try_cmpxchg64(pcp, ovalp, nval) percpu_try_cmpxchg64_op(8, , pcp, ovalp, nval)
378#define this_cpu_try_cmpxchg64(pcp, ovalp, nval) percpu_try_cmpxchg64_op(8, volatile, pcp, ovalp, nval)
379
380#endif /* defined(CONFIG_X86_32) && !defined(CONFIG_UML) */
381
382#ifdef CONFIG_X86_64
383#define raw_cpu_cmpxchg64(pcp, oval, nval) percpu_cmpxchg_op(8, , pcp, oval, nval);
384#define this_cpu_cmpxchg64(pcp, oval, nval) percpu_cmpxchg_op(8, volatile, pcp, oval, nval);
385
386#define raw_cpu_try_cmpxchg64(pcp, ovalp, nval) percpu_try_cmpxchg_op(8, , pcp, ovalp, nval);
387#define this_cpu_try_cmpxchg64(pcp, ovalp, nval) percpu_try_cmpxchg_op(8, volatile, pcp, ovalp, nval);
388
389#define percpu_cmpxchg128_op(size, qual, _var, _oval, _nval) \
390({ \
391 union { \
392 u128 var; \
393 struct { \
394 u64 low, high; \
395 }; \
396 } old__, new__; \
397 \
398 old__.var = _oval; \
399 new__.var = _nval; \
400 \
401 asm_inline qual ( \
402 ALTERNATIVE("call this_cpu_cmpxchg16b_emu", \
403 "cmpxchg16b " __percpu_arg([var]), X86_FEATURE_CX16) \
404 : ALT_OUTPUT_SP([var] "+m" (__my_cpu_var(_var)), \
405 "+a" (old__.low), "+d" (old__.high)) \
406 : "b" (new__.low), "c" (new__.high), \
407 "S" (&(_var)) \
408 : "memory"); \
409 \
410 old__.var; \
411})
412
413#define raw_cpu_cmpxchg128(pcp, oval, nval) percpu_cmpxchg128_op(16, , pcp, oval, nval)
414#define this_cpu_cmpxchg128(pcp, oval, nval) percpu_cmpxchg128_op(16, volatile, pcp, oval, nval)
415
416#define percpu_try_cmpxchg128_op(size, qual, _var, _ovalp, _nval) \
417({ \
418 bool success; \
419 u128 *_oval = (u128 *)(_ovalp); \
420 union { \
421 u128 var; \
422 struct { \
423 u64 low, high; \
424 }; \
425 } old__, new__; \
426 \
427 old__.var = *_oval; \
428 new__.var = _nval; \
429 \
430 asm_inline qual ( \
431 ALTERNATIVE("call this_cpu_cmpxchg16b_emu", \
432 "cmpxchg16b " __percpu_arg([var]), X86_FEATURE_CX16) \
433 : ALT_OUTPUT_SP("=@ccz" (success), \
434 [var] "+m" (__my_cpu_var(_var)), \
435 "+a" (old__.low), "+d" (old__.high)) \
436 : "b" (new__.low), "c" (new__.high), \
437 "S" (&(_var)) \
438 : "memory"); \
439 if (unlikely(!success)) \
440 *_oval = old__.var; \
441 \
442 likely(success); \
443})
444
445#define raw_cpu_try_cmpxchg128(pcp, ovalp, nval) percpu_try_cmpxchg128_op(16, , pcp, ovalp, nval)
446#define this_cpu_try_cmpxchg128(pcp, ovalp, nval) percpu_try_cmpxchg128_op(16, volatile, pcp, ovalp, nval)
447
448#endif /* CONFIG_X86_64 */
449
450#define raw_cpu_read_1(pcp) __raw_cpu_read(1, , pcp)
451#define raw_cpu_read_2(pcp) __raw_cpu_read(2, , pcp)
452#define raw_cpu_read_4(pcp) __raw_cpu_read(4, , pcp)
453#define raw_cpu_write_1(pcp, val) __raw_cpu_write(1, , pcp, val)
454#define raw_cpu_write_2(pcp, val) __raw_cpu_write(2, , pcp, val)
455#define raw_cpu_write_4(pcp, val) __raw_cpu_write(4, , pcp, val)
456
457#define this_cpu_read_1(pcp) __raw_cpu_read(1, volatile, pcp)
458#define this_cpu_read_2(pcp) __raw_cpu_read(2, volatile, pcp)
459#define this_cpu_read_4(pcp) __raw_cpu_read(4, volatile, pcp)
460#define this_cpu_write_1(pcp, val) __raw_cpu_write(1, volatile, pcp, val)
461#define this_cpu_write_2(pcp, val) __raw_cpu_write(2, volatile, pcp, val)
462#define this_cpu_write_4(pcp, val) __raw_cpu_write(4, volatile, pcp, val)
463
464#define this_cpu_read_stable_1(pcp) __raw_cpu_read_stable(1, pcp)
465#define this_cpu_read_stable_2(pcp) __raw_cpu_read_stable(2, pcp)
466#define this_cpu_read_stable_4(pcp) __raw_cpu_read_stable(4, pcp)
467
468#define raw_cpu_add_1(pcp, val) percpu_add_op(1, , (pcp), val)
469#define raw_cpu_add_2(pcp, val) percpu_add_op(2, , (pcp), val)
470#define raw_cpu_add_4(pcp, val) percpu_add_op(4, , (pcp), val)
471#define raw_cpu_and_1(pcp, val) percpu_binary_op(1, , "and", (pcp), val)
472#define raw_cpu_and_2(pcp, val) percpu_binary_op(2, , "and", (pcp), val)
473#define raw_cpu_and_4(pcp, val) percpu_binary_op(4, , "and", (pcp), val)
474#define raw_cpu_or_1(pcp, val) percpu_binary_op(1, , "or", (pcp), val)
475#define raw_cpu_or_2(pcp, val) percpu_binary_op(2, , "or", (pcp), val)
476#define raw_cpu_or_4(pcp, val) percpu_binary_op(4, , "or", (pcp), val)
477#define raw_cpu_xchg_1(pcp, val) raw_percpu_xchg_op(pcp, val)
478#define raw_cpu_xchg_2(pcp, val) raw_percpu_xchg_op(pcp, val)
479#define raw_cpu_xchg_4(pcp, val) raw_percpu_xchg_op(pcp, val)
480
481#define this_cpu_add_1(pcp, val) percpu_add_op(1, volatile, (pcp), val)
482#define this_cpu_add_2(pcp, val) percpu_add_op(2, volatile, (pcp), val)
483#define this_cpu_add_4(pcp, val) percpu_add_op(4, volatile, (pcp), val)
484#define this_cpu_and_1(pcp, val) percpu_binary_op(1, volatile, "and", (pcp), val)
485#define this_cpu_and_2(pcp, val) percpu_binary_op(2, volatile, "and", (pcp), val)
486#define this_cpu_and_4(pcp, val) percpu_binary_op(4, volatile, "and", (pcp), val)
487#define this_cpu_or_1(pcp, val) percpu_binary_op(1, volatile, "or", (pcp), val)
488#define this_cpu_or_2(pcp, val) percpu_binary_op(2, volatile, "or", (pcp), val)
489#define this_cpu_or_4(pcp, val) percpu_binary_op(4, volatile, "or", (pcp), val)
490#define this_cpu_xchg_1(pcp, nval) this_percpu_xchg_op(pcp, nval)
491#define this_cpu_xchg_2(pcp, nval) this_percpu_xchg_op(pcp, nval)
492#define this_cpu_xchg_4(pcp, nval) this_percpu_xchg_op(pcp, nval)
493
494#define raw_cpu_add_return_1(pcp, val) percpu_add_return_op(1, , pcp, val)
495#define raw_cpu_add_return_2(pcp, val) percpu_add_return_op(2, , pcp, val)
496#define raw_cpu_add_return_4(pcp, val) percpu_add_return_op(4, , pcp, val)
497#define raw_cpu_cmpxchg_1(pcp, oval, nval) percpu_cmpxchg_op(1, , pcp, oval, nval)
498#define raw_cpu_cmpxchg_2(pcp, oval, nval) percpu_cmpxchg_op(2, , pcp, oval, nval)
499#define raw_cpu_cmpxchg_4(pcp, oval, nval) percpu_cmpxchg_op(4, , pcp, oval, nval)
500#define raw_cpu_try_cmpxchg_1(pcp, ovalp, nval) percpu_try_cmpxchg_op(1, , pcp, ovalp, nval)
501#define raw_cpu_try_cmpxchg_2(pcp, ovalp, nval) percpu_try_cmpxchg_op(2, , pcp, ovalp, nval)
502#define raw_cpu_try_cmpxchg_4(pcp, ovalp, nval) percpu_try_cmpxchg_op(4, , pcp, ovalp, nval)
503
504#define this_cpu_add_return_1(pcp, val) percpu_add_return_op(1, volatile, pcp, val)
505#define this_cpu_add_return_2(pcp, val) percpu_add_return_op(2, volatile, pcp, val)
506#define this_cpu_add_return_4(pcp, val) percpu_add_return_op(4, volatile, pcp, val)
507#define this_cpu_cmpxchg_1(pcp, oval, nval) percpu_cmpxchg_op(1, volatile, pcp, oval, nval)
508#define this_cpu_cmpxchg_2(pcp, oval, nval) percpu_cmpxchg_op(2, volatile, pcp, oval, nval)
509#define this_cpu_cmpxchg_4(pcp, oval, nval) percpu_cmpxchg_op(4, volatile, pcp, oval, nval)
510#define this_cpu_try_cmpxchg_1(pcp, ovalp, nval) percpu_try_cmpxchg_op(1, volatile, pcp, ovalp, nval)
511#define this_cpu_try_cmpxchg_2(pcp, ovalp, nval) percpu_try_cmpxchg_op(2, volatile, pcp, ovalp, nval)
512#define this_cpu_try_cmpxchg_4(pcp, ovalp, nval) percpu_try_cmpxchg_op(4, volatile, pcp, ovalp, nval)
513
514/*
515 * Per-CPU atomic 64-bit operations are only available under 64-bit kernels.
516 * 32-bit kernels must fall back to generic operations.
517 */
518#ifdef CONFIG_X86_64
519
520#define raw_cpu_read_8(pcp) __raw_cpu_read(8, , pcp)
521#define raw_cpu_write_8(pcp, val) __raw_cpu_write(8, , pcp, val)
522
523#define this_cpu_read_8(pcp) __raw_cpu_read(8, volatile, pcp)
524#define this_cpu_write_8(pcp, val) __raw_cpu_write(8, volatile, pcp, val)
525
526#define this_cpu_read_stable_8(pcp) __raw_cpu_read_stable(8, pcp)
527
528#define raw_cpu_add_8(pcp, val) percpu_add_op(8, , (pcp), val)
529#define raw_cpu_and_8(pcp, val) percpu_binary_op(8, , "and", (pcp), val)
530#define raw_cpu_or_8(pcp, val) percpu_binary_op(8, , "or", (pcp), val)
531#define raw_cpu_add_return_8(pcp, val) percpu_add_return_op(8, , pcp, val)
532#define raw_cpu_xchg_8(pcp, nval) raw_percpu_xchg_op(pcp, nval)
533#define raw_cpu_cmpxchg_8(pcp, oval, nval) percpu_cmpxchg_op(8, , pcp, oval, nval)
534#define raw_cpu_try_cmpxchg_8(pcp, ovalp, nval) percpu_try_cmpxchg_op(8, , pcp, ovalp, nval)
535
536#define this_cpu_add_8(pcp, val) percpu_add_op(8, volatile, (pcp), val)
537#define this_cpu_and_8(pcp, val) percpu_binary_op(8, volatile, "and", (pcp), val)
538#define this_cpu_or_8(pcp, val) percpu_binary_op(8, volatile, "or", (pcp), val)
539#define this_cpu_add_return_8(pcp, val) percpu_add_return_op(8, volatile, pcp, val)
540#define this_cpu_xchg_8(pcp, nval) this_percpu_xchg_op(pcp, nval)
541#define this_cpu_cmpxchg_8(pcp, oval, nval) percpu_cmpxchg_op(8, volatile, pcp, oval, nval)
542#define this_cpu_try_cmpxchg_8(pcp, ovalp, nval) percpu_try_cmpxchg_op(8, volatile, pcp, ovalp, nval)
543
544#define raw_cpu_read_long(pcp) raw_cpu_read_8(pcp)
545
546#else /* !CONFIG_X86_64: */
547
548/* There is no generic 64-bit read stable operation for 32-bit targets. */
549#define this_cpu_read_stable_8(pcp) ({ BUILD_BUG(); (typeof(pcp))0; })
550
551#define raw_cpu_read_long(pcp) raw_cpu_read_4(pcp)
552
553#endif /* CONFIG_X86_64 */
554
555#define this_cpu_read_const(pcp) __raw_cpu_read_const(pcp)
556
557/*
558 * this_cpu_read() makes the compiler load the per-CPU variable every time
559 * it is accessed while this_cpu_read_stable() allows the value to be cached.
560 * this_cpu_read_stable() is more efficient and can be used if its value
561 * is guaranteed to be valid across CPUs. The current users include
562 * current_task and cpu_current_top_of_stack, both of which are
563 * actually per-thread variables implemented as per-CPU variables and
564 * thus stable for the duration of the respective task.
565 */
566#define this_cpu_read_stable(pcp) __pcpu_size_call_return(this_cpu_read_stable_, pcp)
567
568#define x86_this_cpu_constant_test_bit(_nr, _var) \
569({ \
570 unsigned long __percpu *addr__ = \
571 (unsigned long __percpu *)&(_var) + BIT_WORD(_nr); \
572 \
573 !!(BIT_MASK(_nr) & raw_cpu_read(*addr__)); \
574})
575
576#define x86_this_cpu_variable_test_bit(_nr, _var) \
577({ \
578 bool oldbit; \
579 \
580 asm volatile("btl %[nr], " __percpu_arg([var]) \
581 : "=@ccc" (oldbit) \
582 : [var] "m" (__my_cpu_var(_var)), \
583 [nr] "rI" (_nr)); \
584 oldbit; \
585})
586
587#define x86_this_cpu_test_bit(_nr, _var) \
588 (__builtin_constant_p(_nr) \
589 ? x86_this_cpu_constant_test_bit(_nr, _var) \
590 : x86_this_cpu_variable_test_bit(_nr, _var))
591
592
593#include <asm-generic/percpu.h>
594
595/* We can use this directly for local CPU (faster). */
596DECLARE_PER_CPU_CACHE_HOT(unsigned long, this_cpu_off);
597
598#endif /* !__ASSEMBLER__ */
599
600#ifdef CONFIG_SMP
601
602/*
603 * Define the "EARLY_PER_CPU" macros. These are used for some per_cpu
604 * variables that are initialized and accessed before there are per_cpu
605 * areas allocated.
606 */
607
608#define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \
609 DEFINE_PER_CPU(_type, _name) = _initvalue; \
610 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
611 { [0 ... NR_CPUS-1] = _initvalue }; \
612 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
613
614#define DEFINE_EARLY_PER_CPU_READ_MOSTLY(_type, _name, _initvalue) \
615 DEFINE_PER_CPU_READ_MOSTLY(_type, _name) = _initvalue; \
616 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
617 { [0 ... NR_CPUS-1] = _initvalue }; \
618 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
619
620#define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \
621 EXPORT_PER_CPU_SYMBOL(_name)
622
623#define DECLARE_EARLY_PER_CPU(_type, _name) \
624 DECLARE_PER_CPU(_type, _name); \
625 extern __typeof__(_type) *_name##_early_ptr; \
626 extern __typeof__(_type) _name##_early_map[]
627
628#define DECLARE_EARLY_PER_CPU_READ_MOSTLY(_type, _name) \
629 DECLARE_PER_CPU_READ_MOSTLY(_type, _name); \
630 extern __typeof__(_type) *_name##_early_ptr; \
631 extern __typeof__(_type) _name##_early_map[]
632
633#define early_per_cpu_ptr(_name) (_name##_early_ptr)
634#define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx])
635
636#define early_per_cpu(_name, _cpu) \
637 *(early_per_cpu_ptr(_name) ? \
638 &early_per_cpu_ptr(_name)[_cpu] : \
639 &per_cpu(_name, _cpu))
640
641#else /* !CONFIG_SMP: */
642#define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \
643 DEFINE_PER_CPU(_type, _name) = _initvalue
644
645#define DEFINE_EARLY_PER_CPU_READ_MOSTLY(_type, _name, _initvalue) \
646 DEFINE_PER_CPU_READ_MOSTLY(_type, _name) = _initvalue
647
648#define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \
649 EXPORT_PER_CPU_SYMBOL(_name)
650
651#define DECLARE_EARLY_PER_CPU(_type, _name) \
652 DECLARE_PER_CPU(_type, _name)
653
654#define DECLARE_EARLY_PER_CPU_READ_MOSTLY(_type, _name) \
655 DECLARE_PER_CPU_READ_MOSTLY(_type, _name)
656
657#define early_per_cpu(_name, _cpu) per_cpu(_name, _cpu)
658#define early_per_cpu_ptr(_name) NULL
659/* no early_per_cpu_map() */
660
661#endif /* !CONFIG_SMP */
662
663#endif /* _ASM_X86_PERCPU_H */