projects/linux·blob master · refs

116 lines · 2.9 KiB

1// SPDX-License-Identifier: GPL-2.0
2#include <linux/kernel.h>
3#include <linux/sched.h>
4#include <linux/sched/clock.h>
5#include <linux/mm.h>
6
7#include <asm/cpufeature.h>
8#include <asm/cpuid/api.h>
9#include <asm/msr.h>
10
11#include "cpu.h"
12
13static void early_init_transmeta(struct cpuinfo_x86 *c)
14{
15 u32 xlvl;
16
17 /* Transmeta-defined flags: level 0x80860001 */
18 xlvl = cpuid_eax(0x80860000);
19 if ((xlvl & 0xffff0000) == 0x80860000) {
20 if (xlvl >= 0x80860001)
21 c->x86_capability[CPUID_8086_0001_EDX] = cpuid_edx(0x80860001);
22 }
23}
24
25static void init_transmeta(struct cpuinfo_x86 *c)
26{
27 u64 msr;
28 unsigned int max, dummy;
29 unsigned int cms_rev1, cms_rev2;
30 unsigned int cpu_rev, cpu_freq = 0, cpu_flags, new_cpu_rev;
31 char cpu_info[65];
32
33 early_init_transmeta(c);
34
35 cpu_detect_cache_sizes(c);
36
37 /* Print CMS and CPU revision */
38 max = cpuid_eax(0x80860000);
39 cpu_rev = 0;
40 if (max >= 0x80860001) {
41 cpuid(0x80860001, &dummy, &cpu_rev, &cpu_freq, &cpu_flags);
42 if (cpu_rev != 0x02000000) {
43 pr_info("CPU: Processor revision %u.%u.%u.%u, %u MHz\n",
44 (cpu_rev >> 24) & 0xff,
45 (cpu_rev >> 16) & 0xff,
46 (cpu_rev >> 8) & 0xff,
47 cpu_rev & 0xff,
48 cpu_freq);
49 }
50 }
51 if (max >= 0x80860002) {
52 cpuid(0x80860002, &new_cpu_rev, &cms_rev1, &cms_rev2, &dummy);
53 if (cpu_rev == 0x02000000) {
54 pr_info("CPU: Processor revision %08X, %u MHz\n",
55 new_cpu_rev, cpu_freq);
56 }
57 pr_info("CPU: Code Morphing Software revision %u.%u.%u-%u-%u\n",
58 (cms_rev1 >> 24) & 0xff,
59 (cms_rev1 >> 16) & 0xff,
60 (cms_rev1 >> 8) & 0xff,
61 cms_rev1 & 0xff,
62 cms_rev2);
63 }
64 if (max >= 0x80860006) {
65 cpuid(0x80860003,
66 (void *)&cpu_info[0],
67 (void *)&cpu_info[4],
68 (void *)&cpu_info[8],
69 (void *)&cpu_info[12]);
70 cpuid(0x80860004,
71 (void *)&cpu_info[16],
72 (void *)&cpu_info[20],
73 (void *)&cpu_info[24],
74 (void *)&cpu_info[28]);
75 cpuid(0x80860005,
76 (void *)&cpu_info[32],
77 (void *)&cpu_info[36],
78 (void *)&cpu_info[40],
79 (void *)&cpu_info[44]);
80 cpuid(0x80860006,
81 (void *)&cpu_info[48],
82 (void *)&cpu_info[52],
83 (void *)&cpu_info[56],
84 (void *)&cpu_info[60]);
85 cpu_info[64] = '\0';
86 pr_info("CPU: %s\n", cpu_info);
87 }
88
89 /* Unhide possibly hidden capability flags */
90 rdmsrq(0x80860004, msr);
91 wrmsrq(0x80860004, msr | ~0U);
92 cpuid_refresh_leaf(c, 0x1);
93 c->x86_capability[CPUID_1_EDX] = cpuid_edx(0x00000001);
94 wrmsrq(0x80860004, msr);
95
96 /* All Transmeta CPUs have a constant TSC */
97 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
98
99#ifdef CONFIG_SYSCTL
100 /*
101 * randomize_va_space slows us down enormously;
102 * it probably triggers retranslation of x86->native bytecode
103 */
104 randomize_va_space = 0;
105#endif
106}
107
108static const struct cpu_dev transmeta_cpu_dev = {
109 .c_vendor = "Transmeta",
110 .c_ident = { "GenuineTMx86", "TransmetaCPU" },
111 .c_early_init = early_init_transmeta,
112 .c_init = init_transmeta,
113 .c_x86_vendor = X86_VENDOR_TRANSMETA,
114};
115
116cpu_dev_register(transmeta_cpu_dev);