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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * AHCI SATA platform library
4 *
5 * Copyright 2004-2005 Red Hat, Inc.
6 * Jeff Garzik <[email protected]>
7 * Copyright 2010 MontaVista Software, LLC.
8 * Anton Vorontsov <[email protected]>
9 */
10
11#include <linux/clk.h>
12#include <linux/kernel.h>
13#include <linux/gfp.h>
14#include <linux/module.h>
15#include <linux/pm.h>
16#include <linux/interrupt.h>
17#include <linux/device.h>
18#include <linux/platform_device.h>
19#include <linux/libata.h>
20#include <linux/ahci_platform.h>
21#include <linux/phy/phy.h>
22#include <linux/pm_runtime.h>
23#include <linux/of.h>
24#include <linux/of_platform.h>
25#include <linux/reset.h>
26#include "ahci.h"
27
28static void ahci_host_stop(struct ata_host *host);
29
30struct ata_port_operations ahci_platform_ops = {
31 .inherits = &ahci_ops,
32 .host_stop = ahci_host_stop,
33};
34EXPORT_SYMBOL_GPL(ahci_platform_ops);
35
36/**
37 * ahci_platform_enable_phys - Enable PHYs
38 * @hpriv: host private area to store config values
39 *
40 * This function enables all the PHYs found in hpriv->phys, if any.
41 * If a PHY fails to be enabled, it disables all the PHYs already
42 * enabled in reverse order and returns an error.
43 *
44 * RETURNS:
45 * 0 on success otherwise a negative error code
46 */
47int ahci_platform_enable_phys(struct ahci_host_priv *hpriv)
48{
49 int rc, i;
50
51 for (i = 0; i < hpriv->nports; i++) {
52 if (ahci_ignore_port(hpriv, i))
53 continue;
54
55 rc = phy_init(hpriv->phys[i]);
56 if (rc)
57 goto disable_phys;
58
59 rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA);
60 if (rc) {
61 phy_exit(hpriv->phys[i]);
62 goto disable_phys;
63 }
64
65 rc = phy_power_on(hpriv->phys[i]);
66 if (rc) {
67 phy_exit(hpriv->phys[i]);
68 goto disable_phys;
69 }
70 }
71
72 return 0;
73
74disable_phys:
75 while (--i >= 0) {
76 if (ahci_ignore_port(hpriv, i))
77 continue;
78
79 phy_power_off(hpriv->phys[i]);
80 phy_exit(hpriv->phys[i]);
81 }
82 return rc;
83}
84EXPORT_SYMBOL_GPL(ahci_platform_enable_phys);
85
86/**
87 * ahci_platform_disable_phys - Disable PHYs
88 * @hpriv: host private area to store config values
89 *
90 * This function disables all PHYs found in hpriv->phys.
91 */
92void ahci_platform_disable_phys(struct ahci_host_priv *hpriv)
93{
94 int i;
95
96 for (i = 0; i < hpriv->nports; i++) {
97 if (ahci_ignore_port(hpriv, i))
98 continue;
99
100 phy_power_off(hpriv->phys[i]);
101 phy_exit(hpriv->phys[i]);
102 }
103}
104EXPORT_SYMBOL_GPL(ahci_platform_disable_phys);
105
106/**
107 * ahci_platform_find_clk - Find platform clock
108 * @hpriv: host private area to store config values
109 * @con_id: clock connection ID
110 *
111 * This function returns a pointer to the clock descriptor of the clock with
112 * the passed ID.
113 *
114 * RETURNS:
115 * Pointer to the clock descriptor on success otherwise NULL
116 */
117struct clk *ahci_platform_find_clk(struct ahci_host_priv *hpriv, const char *con_id)
118{
119 int i;
120
121 for (i = 0; i < hpriv->n_clks; i++) {
122 if (hpriv->clks[i].id && !strcmp(hpriv->clks[i].id, con_id))
123 return hpriv->clks[i].clk;
124 }
125
126 return NULL;
127}
128EXPORT_SYMBOL_GPL(ahci_platform_find_clk);
129
130/**
131 * ahci_platform_enable_clks - Enable platform clocks
132 * @hpriv: host private area to store config values
133 *
134 * This function enables all the clks found for the AHCI device.
135 *
136 * RETURNS:
137 * 0 on success otherwise a negative error code
138 */
139int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)
140{
141 return clk_bulk_prepare_enable(hpriv->n_clks, hpriv->clks);
142}
143EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);
144
145/**
146 * ahci_platform_disable_clks - Disable platform clocks
147 * @hpriv: host private area to store config values
148 *
149 * This function disables all the clocks enabled before
150 * (bulk-clocks-disable function is supposed to do that in reverse
151 * from the enabling procedure order).
152 */
153void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
154{
155 clk_bulk_disable_unprepare(hpriv->n_clks, hpriv->clks);
156}
157EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
158
159/**
160 * ahci_platform_deassert_rsts - Deassert/trigger platform resets
161 * @hpriv: host private area to store config values
162 *
163 * This function deasserts or triggers all the reset lines found for
164 * the AHCI device.
165 *
166 * RETURNS:
167 * 0 on success otherwise a negative error code
168 */
169int ahci_platform_deassert_rsts(struct ahci_host_priv *hpriv)
170{
171 if (hpriv->f_rsts & AHCI_PLATFORM_RST_TRIGGER)
172 return reset_control_reset(hpriv->rsts);
173
174 return reset_control_deassert(hpriv->rsts);
175}
176EXPORT_SYMBOL_GPL(ahci_platform_deassert_rsts);
177
178/**
179 * ahci_platform_assert_rsts - Assert/rearm platform resets
180 * @hpriv: host private area to store config values
181 *
182 * This function asserts or rearms (for self-deasserting resets) all
183 * the reset controls found for the AHCI device.
184 *
185 * RETURNS:
186 * 0 on success otherwise a negative error code
187 */
188int ahci_platform_assert_rsts(struct ahci_host_priv *hpriv)
189{
190 if (hpriv->f_rsts & AHCI_PLATFORM_RST_TRIGGER)
191 return reset_control_rearm(hpriv->rsts);
192
193 return reset_control_assert(hpriv->rsts);
194}
195EXPORT_SYMBOL_GPL(ahci_platform_assert_rsts);
196
197/**
198 * ahci_platform_enable_regulators - Enable regulators
199 * @hpriv: host private area to store config values
200 *
201 * This function enables all the regulators found in controller and
202 * hpriv->target_pwrs, if any. If a regulator fails to be enabled, it
203 * disables all the regulators already enabled in reverse order and
204 * returns an error.
205 *
206 * RETURNS:
207 * 0 on success otherwise a negative error code
208 */
209int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv)
210{
211 int rc, i;
212
213 rc = regulator_enable(hpriv->ahci_regulator);
214 if (rc)
215 return rc;
216
217 rc = regulator_enable(hpriv->phy_regulator);
218 if (rc)
219 goto disable_ahci_pwrs;
220
221 for (i = 0; i < hpriv->nports; i++) {
222 if (!hpriv->target_pwrs[i])
223 continue;
224
225 rc = regulator_enable(hpriv->target_pwrs[i]);
226 if (rc)
227 goto disable_target_pwrs;
228 }
229
230 return 0;
231
232disable_target_pwrs:
233 while (--i >= 0)
234 if (hpriv->target_pwrs[i])
235 regulator_disable(hpriv->target_pwrs[i]);
236
237 regulator_disable(hpriv->phy_regulator);
238disable_ahci_pwrs:
239 regulator_disable(hpriv->ahci_regulator);
240 return rc;
241}
242EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators);
243
244/**
245 * ahci_platform_disable_regulators - Disable regulators
246 * @hpriv: host private area to store config values
247 *
248 * This function disables all regulators found in hpriv->target_pwrs and
249 * AHCI controller.
250 */
251void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv)
252{
253 int i;
254
255 for (i = 0; i < hpriv->nports; i++) {
256 if (!hpriv->target_pwrs[i])
257 continue;
258 regulator_disable(hpriv->target_pwrs[i]);
259 }
260
261 regulator_disable(hpriv->ahci_regulator);
262 regulator_disable(hpriv->phy_regulator);
263}
264EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators);
265/**
266 * ahci_platform_enable_resources - Enable platform resources
267 * @hpriv: host private area to store config values
268 *
269 * This function enables all ahci_platform managed resources in the
270 * following order:
271 * 1) Regulator
272 * 2) Clocks (through ahci_platform_enable_clks)
273 * 3) Resets
274 * 4) Phys
275 *
276 * If resource enabling fails at any point the previous enabled resources
277 * are disabled in reverse order.
278 *
279 * RETURNS:
280 * 0 on success otherwise a negative error code
281 */
282int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
283{
284 int rc;
285
286 rc = ahci_platform_enable_regulators(hpriv);
287 if (rc)
288 return rc;
289
290 rc = ahci_platform_enable_clks(hpriv);
291 if (rc)
292 goto disable_regulator;
293
294 rc = ahci_platform_deassert_rsts(hpriv);
295 if (rc)
296 goto disable_clks;
297
298 rc = ahci_platform_enable_phys(hpriv);
299 if (rc)
300 goto disable_rsts;
301
302 return 0;
303
304disable_rsts:
305 ahci_platform_assert_rsts(hpriv);
306
307disable_clks:
308 ahci_platform_disable_clks(hpriv);
309
310disable_regulator:
311 ahci_platform_disable_regulators(hpriv);
312
313 return rc;
314}
315EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
316
317/**
318 * ahci_platform_disable_resources - Disable platform resources
319 * @hpriv: host private area to store config values
320 *
321 * This function disables all ahci_platform managed resources in the
322 * following order:
323 * 1) Phys
324 * 2) Resets
325 * 3) Clocks (through ahci_platform_disable_clks)
326 * 4) Regulator
327 */
328void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
329{
330 ahci_platform_disable_phys(hpriv);
331
332 ahci_platform_assert_rsts(hpriv);
333
334 ahci_platform_disable_clks(hpriv);
335
336 ahci_platform_disable_regulators(hpriv);
337}
338EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
339
340static void ahci_platform_put_resources(struct device *dev, void *res)
341{
342 struct ahci_host_priv *hpriv = res;
343 int c;
344
345 if (hpriv->got_runtime_pm) {
346 pm_runtime_put_sync(dev);
347 pm_runtime_disable(dev);
348 }
349
350 /*
351 * The regulators are tied to child node device and not to the
352 * SATA device itself. So we can't use devm for automatically
353 * releasing them. We have to do it manually here.
354 */
355 for (c = 0; c < hpriv->nports; c++)
356 if (hpriv->target_pwrs && hpriv->target_pwrs[c])
357 regulator_put(hpriv->target_pwrs[c]);
358
359 kfree(hpriv->target_pwrs);
360}
361
362static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port,
363 struct device *dev, struct device_node *node)
364{
365 int rc;
366
367 hpriv->phys[port] = devm_of_phy_get(dev, node, NULL);
368
369 if (!IS_ERR(hpriv->phys[port]))
370 return 0;
371
372 rc = PTR_ERR(hpriv->phys[port]);
373 switch (rc) {
374 case -ENOSYS:
375 /* No PHY support. Check if PHY is required. */
376 if (of_property_present(node, "phys")) {
377 dev_err(dev,
378 "couldn't get PHY in node %pOFn: ENOSYS\n",
379 node);
380 break;
381 }
382 fallthrough;
383 case -ENODEV:
384 /* continue normally */
385 hpriv->phys[port] = NULL;
386 rc = 0;
387 break;
388 case -EPROBE_DEFER:
389 /* Do not complain yet */
390 break;
391
392 default:
393 dev_err(dev,
394 "couldn't get PHY in node %pOFn: %d\n",
395 node, rc);
396
397 break;
398 }
399
400 return rc;
401}
402
403static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port,
404 struct device *dev)
405{
406 struct regulator *target_pwr;
407 int rc = 0;
408
409 target_pwr = regulator_get(dev, "target");
410
411 if (!IS_ERR(target_pwr))
412 hpriv->target_pwrs[port] = target_pwr;
413 else
414 rc = PTR_ERR(target_pwr);
415
416 return rc;
417}
418
419static int ahci_platform_get_firmware(struct ahci_host_priv *hpriv,
420 struct device *dev)
421{
422 u32 port;
423
424 if (!of_property_read_u32(dev->of_node, "hba-cap", &hpriv->saved_cap))
425 hpriv->saved_cap &= (HOST_CAP_SSS | HOST_CAP_MPS);
426
427 of_property_read_u32(dev->of_node,
428 "ports-implemented", &hpriv->saved_port_map);
429
430 for_each_child_of_node_scoped(dev->of_node, child) {
431 if (!of_device_is_available(child))
432 continue;
433
434 if (of_property_read_u32(child, "reg", &port))
435 return -EINVAL;
436
437 if (!of_property_read_u32(child, "hba-port-cap", &hpriv->saved_port_cap[port]))
438 hpriv->saved_port_cap[port] &= PORT_CMD_CAP;
439 }
440
441 return 0;
442}
443
444static u32 ahci_platform_find_max_port_id(struct device *dev)
445{
446 u32 max_port = 0;
447
448 for_each_child_of_node_scoped(dev->of_node, child) {
449 u32 port;
450
451 if (!of_property_read_u32(child, "reg", &port))
452 max_port = max(max_port, port);
453 }
454
455 return max_port;
456}
457
458/**
459 * ahci_platform_get_resources - Get platform resources
460 * @pdev: platform device to get resources for
461 * @flags: bitmap representing the resource to get
462 *
463 * This function allocates an ahci_host_priv struct, and gets the following
464 * resources, storing a reference to them inside the returned struct:
465 *
466 * 1) mmio registers (IORESOURCE_MEM 0, mandatory)
467 * 2) regulator for controlling the targets power (optional)
468 * regulator for controlling the AHCI controller (optional)
469 * 3) all clocks specified in the devicetree node, or a single
470 * clock for non-OF platforms (optional)
471 * 4) resets, if flags has AHCI_PLATFORM_GET_RESETS (optional)
472 * 5) phys (optional)
473 *
474 * RETURNS:
475 * The allocated ahci_host_priv on success, otherwise an ERR_PTR value
476 */
477struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
478 unsigned int flags)
479{
480 int child_nodes, rc = -ENOMEM, enabled_ports = 0;
481 struct device *dev = &pdev->dev;
482 struct ahci_host_priv *hpriv;
483 u32 mask_port_map = 0;
484 u32 max_port;
485 int nports;
486
487 if (!devres_open_group(dev, NULL, GFP_KERNEL))
488 return ERR_PTR(-ENOMEM);
489
490 /* find maximum port id for allocating structures */
491 max_port = ahci_platform_find_max_port_id(dev);
492 /*
493 * Set nports according to maximum port id. Clamp at
494 * AHCI_MAX_PORTS, warning message for invalid port id
495 * is generated later.
496 * When DT has no sub-nodes max_port is 0, nports is 1,
497 * in order to be able to use the
498 * ahci_platform_[en|dis]able_[phys|regulators] functions.
499 */
500 nports = min(AHCI_MAX_PORTS, max_port + 1);
501 hpriv = devres_alloc(ahci_platform_put_resources, struct_size(hpriv, phys, nports),
502 GFP_KERNEL);
503 if (!hpriv)
504 goto err_out;
505
506 hpriv->nports = nports;
507
508 devres_add(dev, hpriv);
509
510 /*
511 * If the DT provided an "ahci" named resource, use it. Otherwise,
512 * fallback to using the default first resource for the device node.
513 */
514 if (platform_get_resource_byname(pdev, IORESOURCE_MEM, "ahci"))
515 hpriv->mmio = devm_platform_ioremap_resource_byname(pdev, "ahci");
516 else
517 hpriv->mmio = devm_platform_ioremap_resource(pdev, 0);
518 if (IS_ERR(hpriv->mmio)) {
519 rc = PTR_ERR(hpriv->mmio);
520 goto err_out;
521 }
522
523 /*
524 * Bulk clocks getting procedure can fail to find any clock due to
525 * running on a non-OF platform or due to the clocks being defined in
526 * bypass of the DT firmware (like da850, spear13xx). In that case we
527 * fallback to getting a single clock source right from the dev clocks
528 * list.
529 */
530 rc = devm_clk_bulk_get_all(dev, &hpriv->clks);
531 if (rc < 0)
532 goto err_out;
533
534 if (rc > 0) {
535 /* Got clocks in bulk */
536 hpriv->n_clks = rc;
537 } else {
538 /*
539 * No clock bulk found: fallback to manually getting
540 * the optional clock.
541 */
542 hpriv->clks = devm_kzalloc(dev, sizeof(*hpriv->clks), GFP_KERNEL);
543 if (!hpriv->clks) {
544 rc = -ENOMEM;
545 goto err_out;
546 }
547 hpriv->clks->clk = devm_clk_get_optional(dev, NULL);
548 if (IS_ERR(hpriv->clks->clk)) {
549 rc = PTR_ERR(hpriv->clks->clk);
550 goto err_out;
551 } else if (hpriv->clks->clk) {
552 hpriv->clks->id = "ahci";
553 hpriv->n_clks = 1;
554 }
555 }
556
557 hpriv->ahci_regulator = devm_regulator_get(dev, "ahci");
558 if (IS_ERR(hpriv->ahci_regulator)) {
559 rc = PTR_ERR(hpriv->ahci_regulator);
560 if (rc != 0)
561 goto err_out;
562 }
563
564 hpriv->phy_regulator = devm_regulator_get(dev, "phy");
565 if (IS_ERR(hpriv->phy_regulator)) {
566 rc = PTR_ERR(hpriv->phy_regulator);
567 goto err_out;
568 }
569
570 if (flags & AHCI_PLATFORM_GET_RESETS) {
571 hpriv->rsts = devm_reset_control_array_get_optional_shared(dev);
572 if (IS_ERR(hpriv->rsts)) {
573 rc = PTR_ERR(hpriv->rsts);
574 goto err_out;
575 }
576
577 hpriv->f_rsts = flags & AHCI_PLATFORM_RST_TRIGGER;
578 }
579
580 /*
581 * Too many sub-nodes most likely means having something wrong with
582 * the firmware.
583 */
584 child_nodes = of_get_child_count(dev->of_node);
585 if (child_nodes > AHCI_MAX_PORTS) {
586 rc = -EINVAL;
587 goto err_out;
588 }
589
590 /*
591 * We cannot use devm_ here, since ahci_platform_put_resources() uses
592 * target_pwrs after devm_ have freed memory
593 */
594 hpriv->target_pwrs = kzalloc_objs(*hpriv->target_pwrs, hpriv->nports);
595 if (!hpriv->target_pwrs) {
596 rc = -ENOMEM;
597 goto err_out;
598 }
599
600 if (child_nodes) {
601 for_each_child_of_node_scoped(dev->of_node, child) {
602 u32 port;
603 struct platform_device *port_dev __maybe_unused;
604
605 if (!of_device_is_available(child))
606 continue;
607
608 if (of_property_read_u32(child, "reg", &port)) {
609 rc = -EINVAL;
610 goto err_out;
611 }
612
613 if (port >= hpriv->nports) {
614 dev_warn(dev, "invalid port number %d\n", port);
615 continue;
616 }
617 mask_port_map |= BIT(port);
618
619#ifdef CONFIG_OF_ADDRESS
620 of_platform_device_create(child, NULL, NULL);
621
622 port_dev = of_find_device_by_node(child);
623 if (port_dev) {
624 rc = ahci_platform_get_regulator(hpriv, port,
625 &port_dev->dev);
626 put_device(&port_dev->dev);
627 if (rc == -EPROBE_DEFER)
628 goto err_out;
629 }
630#endif
631
632 rc = ahci_platform_get_phy(hpriv, port, dev, child);
633 if (rc)
634 goto err_out;
635
636 enabled_ports++;
637 }
638 if (!enabled_ports) {
639 dev_warn(dev, "No port enabled\n");
640 rc = -ENODEV;
641 goto err_out;
642 }
643
644 if (!hpriv->mask_port_map)
645 hpriv->mask_port_map = mask_port_map;
646 } else {
647 /*
648 * If no sub-node was found, keep this for device tree
649 * compatibility
650 */
651 rc = ahci_platform_get_phy(hpriv, 0, dev, dev->of_node);
652 if (rc)
653 goto err_out;
654
655 rc = ahci_platform_get_regulator(hpriv, 0, dev);
656 if (rc == -EPROBE_DEFER)
657 goto err_out;
658 }
659
660 /*
661 * Retrieve firmware-specific flags which then will be used to set
662 * the HW-init fields of HBA and its ports
663 */
664 rc = ahci_platform_get_firmware(hpriv, dev);
665 if (rc)
666 goto err_out;
667
668 pm_runtime_enable(dev);
669 pm_runtime_get_sync(dev);
670 hpriv->got_runtime_pm = true;
671
672 devres_remove_group(dev, NULL);
673 return hpriv;
674
675err_out:
676 devres_release_group(dev, NULL);
677 return ERR_PTR(rc);
678}
679EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
680
681/**
682 * ahci_platform_init_host - Bring up an ahci-platform host
683 * @pdev: platform device pointer for the host
684 * @hpriv: ahci-host private data for the host
685 * @pi_template: template for the ata_port_info to use
686 * @sht: scsi_host_template to use when registering
687 *
688 * This function does all the usual steps needed to bring up an
689 * ahci-platform host, note any necessary resources (ie clks, phys, etc.)
690 * must be initialized / enabled before calling this.
691 *
692 * RETURNS:
693 * 0 on success otherwise a negative error code
694 */
695int ahci_platform_init_host(struct platform_device *pdev,
696 struct ahci_host_priv *hpriv,
697 const struct ata_port_info *pi_template,
698 const struct scsi_host_template *sht)
699{
700 struct device *dev = &pdev->dev;
701 struct ata_port_info pi = *pi_template;
702 const struct ata_port_info *ppi[] = { &pi, NULL };
703 struct ata_host *host;
704 int i, irq, n_ports, rc;
705
706 irq = platform_get_irq(pdev, 0);
707 if (irq < 0)
708 return irq;
709 if (!irq)
710 return -EINVAL;
711
712 hpriv->irq = irq;
713
714 /* prepare host */
715 pi.private_data = (void *)(unsigned long)hpriv->flags;
716
717 ahci_save_initial_config(dev, hpriv);
718
719 if (hpriv->cap & HOST_CAP_NCQ)
720 pi.flags |= ATA_FLAG_NCQ;
721
722 if (hpriv->cap & HOST_CAP_PMP)
723 pi.flags |= ATA_FLAG_PMP;
724
725 ahci_set_em_messages(hpriv, &pi);
726
727 /* CAP.NP sometimes indicate the index of the last enabled
728 * port, at other times, that of the last possible port, so
729 * determining the maximum port number requires looking at
730 * both CAP.NP and port_map.
731 */
732 n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
733
734 host = ata_host_alloc_pinfo(dev, ppi, n_ports);
735 if (!host)
736 return -ENOMEM;
737
738 host->private_data = hpriv;
739
740 if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
741 host->flags |= ATA_HOST_PARALLEL_SCAN;
742 else
743 dev_info(dev, "SSS flag set, parallel bus scan disabled\n");
744
745 if (pi.flags & ATA_FLAG_EM)
746 ahci_reset_em(host);
747
748 for (i = 0; i < host->n_ports; i++) {
749 struct ata_port *ap = host->ports[i];
750
751 ata_port_desc(ap, "mmio %pR",
752 platform_get_resource(pdev, IORESOURCE_MEM, 0));
753 ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
754
755 /* set enclosure management message type */
756 if (ap->flags & ATA_FLAG_EM)
757 ap->em_message_type = hpriv->em_msg_type;
758
759 /* disabled/not-implemented port */
760 if (!(hpriv->port_map & (1 << i)))
761 ap->ops = &ata_dummy_port_ops;
762 }
763
764 if (hpriv->cap & HOST_CAP_64) {
765 rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
766 if (rc) {
767 dev_err(dev, "Failed to enable 64-bit DMA.\n");
768 return rc;
769 }
770 }
771
772 rc = ahci_reset_controller(host);
773 if (rc)
774 return rc;
775
776 ahci_init_controller(host);
777 ahci_print_info(host, "platform");
778
779 return ahci_host_activate(host, sht);
780}
781EXPORT_SYMBOL_GPL(ahci_platform_init_host);
782
783static void ahci_host_stop(struct ata_host *host)
784{
785 struct ahci_host_priv *hpriv = host->private_data;
786
787 ahci_platform_disable_resources(hpriv);
788}
789
790/**
791 * ahci_platform_shutdown - Disable interrupts and stop DMA for host ports
792 * @pdev: platform device pointer for the host
793 *
794 * This function is called during system shutdown and performs the minimal
795 * deconfiguration required to ensure that an ahci_platform host cannot
796 * corrupt or otherwise interfere with a new kernel being started with kexec.
797 */
798void ahci_platform_shutdown(struct platform_device *pdev)
799{
800 struct ata_host *host = platform_get_drvdata(pdev);
801 struct ahci_host_priv *hpriv = host->private_data;
802 void __iomem *mmio = hpriv->mmio;
803 int i;
804
805 for (i = 0; i < host->n_ports; i++) {
806 struct ata_port *ap = host->ports[i];
807
808 /* Disable port interrupts */
809 if (ap->ops->freeze)
810 ap->ops->freeze(ap);
811
812 /* Stop the port DMA engines */
813 if (ap->ops->port_stop)
814 ap->ops->port_stop(ap);
815 }
816
817 /* Disable and clear host interrupts */
818 writel(readl(mmio + HOST_CTL) & ~HOST_IRQ_EN, mmio + HOST_CTL);
819 readl(mmio + HOST_CTL); /* flush */
820 writel(GENMASK(host->n_ports, 0), mmio + HOST_IRQ_STAT);
821}
822EXPORT_SYMBOL_GPL(ahci_platform_shutdown);
823
824#ifdef CONFIG_PM_SLEEP
825/**
826 * ahci_platform_suspend_host - Suspend an ahci-platform host
827 * @dev: device pointer for the host
828 *
829 * This function does all the usual steps needed to suspend an
830 * ahci-platform host, note any necessary resources (ie clks, phys, etc.)
831 * must be disabled after calling this.
832 *
833 * RETURNS:
834 * 0 on success otherwise a negative error code
835 */
836int ahci_platform_suspend_host(struct device *dev)
837{
838 struct ata_host *host = dev_get_drvdata(dev);
839 struct ahci_host_priv *hpriv = host->private_data;
840 void __iomem *mmio = hpriv->mmio;
841 u32 ctl;
842
843 if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
844 dev_err(dev, "firmware update required for suspend/resume\n");
845 return -EIO;
846 }
847
848 /*
849 * AHCI spec rev1.1 section 8.3.3:
850 * Software must disable interrupts prior to requesting a
851 * transition of the HBA to D3 state.
852 */
853 ctl = readl(mmio + HOST_CTL);
854 ctl &= ~HOST_IRQ_EN;
855 writel(ctl, mmio + HOST_CTL);
856 readl(mmio + HOST_CTL); /* flush */
857
858 if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS)
859 ahci_platform_disable_phys(hpriv);
860
861 ata_host_suspend(host, PMSG_SUSPEND);
862 return 0;
863}
864EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);
865
866/**
867 * ahci_platform_resume_host - Resume an ahci-platform host
868 * @dev: device pointer for the host
869 *
870 * This function does all the usual steps needed to resume an ahci-platform
871 * host, note any necessary resources (ie clks, phys, etc.) must be
872 * initialized / enabled before calling this.
873 *
874 * RETURNS:
875 * 0 on success otherwise a negative error code
876 */
877int ahci_platform_resume_host(struct device *dev)
878{
879 struct ata_host *host = dev_get_drvdata(dev);
880 struct ahci_host_priv *hpriv = host->private_data;
881 int rc;
882
883 if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
884 rc = ahci_reset_controller(host);
885 if (rc)
886 return rc;
887
888 ahci_init_controller(host);
889 }
890
891 if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS)
892 ahci_platform_enable_phys(hpriv);
893
894 ata_host_resume(host);
895
896 return 0;
897}
898EXPORT_SYMBOL_GPL(ahci_platform_resume_host);
899
900/**
901 * ahci_platform_suspend - Suspend an ahci-platform device
902 * @dev: the platform device to suspend
903 *
904 * This function suspends the host associated with the device, followed by
905 * disabling all the resources of the device.
906 *
907 * RETURNS:
908 * 0 on success otherwise a negative error code
909 */
910int ahci_platform_suspend(struct device *dev)
911{
912 struct ata_host *host = dev_get_drvdata(dev);
913 struct ahci_host_priv *hpriv = host->private_data;
914 int rc;
915
916 rc = ahci_platform_suspend_host(dev);
917 if (rc)
918 return rc;
919
920 ahci_platform_disable_resources(hpriv);
921
922 return 0;
923}
924EXPORT_SYMBOL_GPL(ahci_platform_suspend);
925
926/**
927 * ahci_platform_resume - Resume an ahci-platform device
928 * @dev: the platform device to resume
929 *
930 * This function enables all the resources of the device followed by
931 * resuming the host associated with the device.
932 *
933 * RETURNS:
934 * 0 on success otherwise a negative error code
935 */
936int ahci_platform_resume(struct device *dev)
937{
938 struct ata_host *host = dev_get_drvdata(dev);
939 struct ahci_host_priv *hpriv = host->private_data;
940 int rc;
941
942 rc = ahci_platform_enable_resources(hpriv);
943 if (rc)
944 return rc;
945
946 rc = ahci_platform_resume_host(dev);
947 if (rc)
948 goto disable_resources;
949
950 /* We resumed so update PM runtime state */
951 pm_runtime_disable(dev);
952 pm_runtime_set_active(dev);
953 pm_runtime_enable(dev);
954
955 return 0;
956
957disable_resources:
958 ahci_platform_disable_resources(hpriv);
959
960 return rc;
961}
962EXPORT_SYMBOL_GPL(ahci_platform_resume);
963#endif
964
965MODULE_DESCRIPTION("AHCI SATA platform library");
966MODULE_AUTHOR("Anton Vorontsov <[email protected]>");
967MODULE_LICENSE("GPL");