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1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 *
4 * Bluetooth support for Intel devices
5 *
6 * Copyright (C) 2015 Intel Corporation
7 */
8
9/* List of tlv type */
10enum {
11 INTEL_TLV_CNVI_TOP = 0x10,
12 INTEL_TLV_CNVR_TOP,
13 INTEL_TLV_CNVI_BT,
14 INTEL_TLV_CNVR_BT,
15 INTEL_TLV_CNVI_OTP,
16 INTEL_TLV_CNVR_OTP,
17 INTEL_TLV_DEV_REV_ID,
18 INTEL_TLV_USB_VENDOR_ID,
19 INTEL_TLV_USB_PRODUCT_ID,
20 INTEL_TLV_PCIE_VENDOR_ID,
21 INTEL_TLV_PCIE_DEVICE_ID,
22 INTEL_TLV_PCIE_SUBSYSTEM_ID,
23 INTEL_TLV_IMAGE_TYPE,
24 INTEL_TLV_TIME_STAMP,
25 INTEL_TLV_BUILD_TYPE,
26 INTEL_TLV_BUILD_NUM,
27 INTEL_TLV_FW_BUILD_PRODUCT,
28 INTEL_TLV_FW_BUILD_HW,
29 INTEL_TLV_FW_STEP,
30 INTEL_TLV_BT_SPEC,
31 INTEL_TLV_MFG_NAME,
32 INTEL_TLV_HCI_REV,
33 INTEL_TLV_LMP_SUBVER,
34 INTEL_TLV_OTP_PATCH_VER,
35 INTEL_TLV_SECURE_BOOT,
36 INTEL_TLV_KEY_FROM_HDR,
37 INTEL_TLV_OTP_LOCK,
38 INTEL_TLV_API_LOCK,
39 INTEL_TLV_DEBUG_LOCK,
40 INTEL_TLV_MIN_FW,
41 INTEL_TLV_LIMITED_CCE,
42 INTEL_TLV_SBE_TYPE,
43 INTEL_TLV_OTP_BDADDR,
44 INTEL_TLV_UNLOCKED_STATE,
45 INTEL_TLV_GIT_SHA1,
46 INTEL_TLV_FW_ID = 0x50
47};
48
49struct intel_tlv {
50 u8 type;
51 u8 len;
52 u8 val[];
53} __packed;
54
55#define BTINTEL_HCI_OP_RESET 0xfc01
56#define BTINTEL_HCI_OP_DEBUG 0xfcd9
57
58#define BTINTEL_CNVI_BLAZARI 0x900 /* BlazarI - Lunar Lake */
59#define BTINTEL_CNVI_BLAZARIW 0x901 /* BlazarIW - Wildcat Lake */
60#define BTINTEL_CNVI_GAP 0x910 /* Gale Peak2 - Meteor Lake */
61#define BTINTEL_CNVI_BLAZARU 0x930 /* BlazarU - Meteor Lake */
62#define BTINTEL_CNVI_SCP 0xA00 /* Scorpius Peak - Panther Lake */
63#define BTINTEL_CNVI_SCP2 0xA10 /* Scorpius Peak2 - Nova Lake */
64#define BTINTEL_CNVI_SCP2F 0xA20 /* Scorpius Peak2F - Nova Lake */
65
66/* CNVR */
67#define BTINTEL_CNVR_FMP2 0x910
68#define BTINTEL_CNVR_WHP2 0xA10 /* Whale Peak2 - Panther Lake */
69
70#define BTINTEL_IMG_BOOTLOADER 0x01 /* Bootloader image */
71#define BTINTEL_IMG_IML 0x02 /* Intermediate image */
72#define BTINTEL_IMG_OP 0x03 /* Operational image */
73
74#define BTINTEL_FWID_MAXLEN 64
75
76/* CNVi Hardware variant */
77#define BTINTEL_HWID_GAP 0x1c /* Gale Peak2 - Meteor Lake */
78#define BTINTEL_HWID_BZRI 0x1e /* BlazarI - Lunar Lake */
79#define BTINTEL_HWID_BZRU 0x1d /* BlazarU - Meteor Lake */
80#define BTINTEL_HWID_SCP 0x1f /* Scorpius Peak - Panther Lake */
81#define BTINTEL_HWID_SCP2 0x20 /* Scorpius Peak2 - Nova Lake */
82#define BTINTEL_HWID_SCP2F 0x21 /* Scorpius Peak2-F - Nova Lake */
83#define BTINTEL_HWID_BZRIW 0x22 /* BlazarIW - Wildcat Lake */
84
85extern const guid_t btintel_guid_dsm;
86
87struct intel_version_tlv {
88 u32 cnvi_top;
89 u32 cnvr_top;
90 u32 cnvi_bt;
91 u32 cnvr_bt;
92 u16 dev_rev_id;
93 u8 img_type;
94 u16 timestamp;
95 u8 build_type;
96 u32 build_num;
97 u8 secure_boot;
98 u8 otp_lock;
99 u8 api_lock;
100 u8 debug_lock;
101 u8 min_fw_build_nn;
102 u8 min_fw_build_cw;
103 u8 min_fw_build_yy;
104 u8 limited_cce;
105 u8 sbe_type;
106 u32 git_sha1;
107 u8 fw_id[BTINTEL_FWID_MAXLEN];
108 bdaddr_t otp_bd_addr;
109};
110
111struct intel_version {
112 u8 status;
113 u8 hw_platform;
114 u8 hw_variant;
115 u8 hw_revision;
116 u8 fw_variant;
117 u8 fw_revision;
118 u8 fw_build_num;
119 u8 fw_build_ww;
120 u8 fw_build_yy;
121 u8 fw_patch_num;
122} __packed;
123
124struct intel_boot_params {
125 __u8 status;
126 __u8 otp_format;
127 __u8 otp_content;
128 __u8 otp_patch;
129 __le16 dev_revid;
130 __u8 secure_boot;
131 __u8 key_from_hdr;
132 __u8 key_type;
133 __u8 otp_lock;
134 __u8 api_lock;
135 __u8 debug_lock;
136 bdaddr_t otp_bdaddr;
137 __u8 min_fw_build_nn;
138 __u8 min_fw_build_cw;
139 __u8 min_fw_build_yy;
140 __u8 limited_cce;
141 __u8 unlocked_state;
142} __packed;
143
144struct intel_bootup {
145 __u8 zero;
146 __u8 num_cmds;
147 __u8 source;
148 __u8 reset_type;
149 __u8 reset_reason;
150 __u8 ddc_status;
151} __packed;
152
153struct intel_secure_send_result {
154 __u8 result;
155 __le16 opcode;
156 __u8 status;
157} __packed;
158
159struct intel_reset {
160 __u8 reset_type;
161 __u8 patch_enable;
162 __u8 ddc_reload;
163 __u8 boot_option;
164 __le32 boot_param;
165} __packed;
166
167struct intel_debug_features {
168 __u8 page1[16];
169} __packed;
170
171struct intel_offload_use_cases {
172 __u8 status;
173 __u8 preset[8];
174} __packed;
175
176#define INTEL_OP_PPAG_CMD 0xFE0B
177struct hci_ppag_enable_cmd {
178 __le32 ppag_enable_flags;
179} __packed;
180
181#define INTEL_TLV_TYPE_ID 0x01
182
183#define INTEL_TLV_SYSTEM_EXCEPTION 0x00
184#define INTEL_TLV_FATAL_EXCEPTION 0x01
185#define INTEL_TLV_DEBUG_EXCEPTION 0x02
186#define INTEL_TLV_TEST_EXCEPTION 0xDE
187
188struct btintel_cp_ddc_write {
189 u8 len;
190 __le16 id;
191 u8 data[];
192} __packed;
193
194/* Bluetooth SAR feature (BRDS), Revision 1 */
195struct btintel_sar_inc_pwr {
196 u8 revision;
197 u32 bt_sar_bios; /* Mode of SAR control to be used, 1:enabled in bios */
198 u32 inc_power_mode; /* Increased power mode */
199 u8 sar_2400_chain_a; /* Sar power restriction LB */
200 u8 br;
201 u8 edr2;
202 u8 edr3;
203 u8 le;
204 u8 le_2mhz;
205 u8 le_lr;
206};
207
208/* Bluetooth SAR feature (BRDS), Revision 2 - per-chain sub-band power limits */
209struct btintel_sar_band_limits {
210 u8 subband_2g4;
211 u8 subband_5g2;
212 u8 subband_5g8_5g9;
213 u8 subband_6g1;
214 u8 subband_6g3;
215};
216
217struct btintel_sar_rev2 {
218 u8 revision;
219 u32 bt_sar_bios; /* 1: BIOS-managed SAR enabled */
220 u32 inc_power_mode; /* 0: supported, 1: disabled */
221 struct btintel_sar_band_limits chain_a;
222 struct btintel_sar_band_limits chain_b;
223};
224
225#define INTEL_HW_PLATFORM(cnvx_bt) ((u8)(((cnvx_bt) & 0x0000ff00) >> 8))
226#define INTEL_HW_VARIANT(cnvx_bt) ((u8)(((cnvx_bt) & 0x003f0000) >> 16))
227#define INTEL_CNVX_TOP_TYPE(cnvx_top) ((cnvx_top) & 0x00000fff)
228#define INTEL_CNVX_TOP_STEP(cnvx_top) (((cnvx_top) & 0x0f000000) >> 24)
229#define INTEL_CNVX_TOP_PACK_SWAB(t, s) __swab16(((__u16)(((t) << 4) | (s))))
230
231enum {
232 INTEL_BOOTLOADER,
233 INTEL_DOWNLOADING,
234 INTEL_FIRMWARE_LOADED,
235 INTEL_FIRMWARE_FAILED,
236 INTEL_BOOTING,
237 INTEL_BROKEN_INITIAL_NCMD,
238 INTEL_BROKEN_SHUTDOWN_LED,
239 INTEL_ROM_LEGACY,
240 INTEL_ROM_LEGACY_NO_WBS_SUPPORT,
241 INTEL_ACPI_RESET_ACTIVE,
242 INTEL_WAIT_FOR_D0,
243
244 __INTEL_NUM_FLAGS,
245};
246
247struct btintel_data {
248 DECLARE_BITMAP(flags, __INTEL_NUM_FLAGS);
249 int (*acpi_reset_method)(struct hci_dev *hdev);
250};
251
252#define btintel_set_flag(hdev, nr) \
253 do { \
254 struct btintel_data *intel = hci_get_priv((hdev)); \
255 set_bit((nr), intel->flags); \
256 } while (0)
257
258#define btintel_clear_flag(hdev, nr) \
259 do { \
260 struct btintel_data *intel = hci_get_priv((hdev)); \
261 clear_bit((nr), intel->flags); \
262 } while (0)
263
264#define btintel_wake_up_flag(hdev, nr) \
265 do { \
266 struct btintel_data *intel = hci_get_priv((hdev)); \
267 wake_up_bit(intel->flags, (nr)); \
268 } while (0)
269
270#define btintel_get_flag(hdev) \
271 (((struct btintel_data *)hci_get_priv(hdev))->flags)
272
273#define btintel_test_flag(hdev, nr) test_bit((nr), btintel_get_flag(hdev))
274#define btintel_test_and_clear_flag(hdev, nr) test_and_clear_bit((nr), btintel_get_flag(hdev))
275#define btintel_wait_on_flag_timeout(hdev, nr, m, to) \
276 wait_on_bit_timeout(btintel_get_flag(hdev), (nr), m, to)
277
278#if IS_ENABLED(CONFIG_BT_INTEL) || IS_ENABLED(CONFIG_BT_INTEL_PCIE)
279
280int btintel_check_bdaddr(struct hci_dev *hdev);
281int btintel_enter_mfg(struct hci_dev *hdev);
282int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched);
283int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr);
284int btintel_set_diag(struct hci_dev *hdev, bool enable);
285
286int btintel_version_info(struct hci_dev *hdev, struct intel_version *ver);
287int btintel_load_ddc_config(struct hci_dev *hdev, const char *ddc_name);
288int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug);
289int btintel_read_version(struct hci_dev *hdev, struct intel_version *ver);
290struct regmap *btintel_regmap_init(struct hci_dev *hdev, u16 opcode_read,
291 u16 opcode_write);
292int btintel_send_intel_reset(struct hci_dev *hdev, u32 boot_param);
293int btintel_read_boot_params(struct hci_dev *hdev,
294 struct intel_boot_params *params);
295int btintel_download_firmware(struct hci_dev *dev, struct intel_version *ver,
296 const struct firmware *fw, u32 *boot_param);
297int btintel_configure_setup(struct hci_dev *hdev, const char *driver_name);
298int btintel_recv_event(struct hci_dev *hdev, struct sk_buff *skb);
299void btintel_bootup(struct hci_dev *hdev, const void *ptr, unsigned int len);
300void btintel_secure_send_result(struct hci_dev *hdev,
301 const void *ptr, unsigned int len);
302int btintel_set_quality_report(struct hci_dev *hdev, bool enable);
303int btintel_version_info_tlv(struct hci_dev *hdev,
304 struct intel_version_tlv *version);
305int btintel_parse_version_tlv(struct hci_dev *hdev,
306 struct intel_version_tlv *version,
307 struct sk_buff *skb);
308void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant);
309int btintel_bootloader_setup_tlv(struct hci_dev *hdev,
310 struct intel_version_tlv *ver);
311int btintel_shutdown_combined(struct hci_dev *hdev);
312void btintel_hw_error(struct hci_dev *hdev, u8 code);
313void btintel_print_fseq_info(struct hci_dev *hdev);
314int btintel_acpi_reset_method(struct hci_dev *hdev);
315#else
316
317static inline int btintel_check_bdaddr(struct hci_dev *hdev)
318{
319 return -EOPNOTSUPP;
320}
321
322static inline int btintel_enter_mfg(struct hci_dev *hdev)
323{
324 return -EOPNOTSUPP;
325}
326
327static inline int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched)
328{
329 return -EOPNOTSUPP;
330}
331
332static inline int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
333{
334 return -EOPNOTSUPP;
335}
336
337static inline int btintel_set_diag(struct hci_dev *hdev, bool enable)
338{
339 return -EOPNOTSUPP;
340}
341
342static inline int btintel_version_info(struct hci_dev *hdev,
343 struct intel_version *ver)
344{
345 return -EOPNOTSUPP;
346}
347
348static inline int btintel_load_ddc_config(struct hci_dev *hdev,
349 const char *ddc_name)
350{
351 return -EOPNOTSUPP;
352}
353
354static inline int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug)
355{
356 return -EOPNOTSUPP;
357}
358
359static inline int btintel_read_version(struct hci_dev *hdev,
360 struct intel_version *ver)
361{
362 return -EOPNOTSUPP;
363}
364
365static inline struct regmap *btintel_regmap_init(struct hci_dev *hdev,
366 u16 opcode_read,
367 u16 opcode_write)
368{
369 return ERR_PTR(-EINVAL);
370}
371
372static inline int btintel_send_intel_reset(struct hci_dev *hdev,
373 u32 reset_param)
374{
375 return -EOPNOTSUPP;
376}
377
378static inline int btintel_read_boot_params(struct hci_dev *hdev,
379 struct intel_boot_params *params)
380{
381 return -EOPNOTSUPP;
382}
383
384static inline int btintel_download_firmware(struct hci_dev *dev,
385 const struct firmware *fw,
386 u32 *boot_param)
387{
388 return -EOPNOTSUPP;
389}
390
391static inline int btintel_configure_setup(struct hci_dev *hdev,
392 const char *driver_name)
393{
394 return -ENODEV;
395}
396
397static inline void btintel_bootup(struct hci_dev *hdev,
398 const void *ptr, unsigned int len)
399{
400}
401
402static inline void btintel_secure_send_result(struct hci_dev *hdev,
403 const void *ptr, unsigned int len)
404{
405}
406
407static inline int btintel_set_quality_report(struct hci_dev *hdev, bool enable)
408{
409 return -ENODEV;
410}
411
412static inline int btintel_version_info_tlv(struct hci_dev *hdev,
413 struct intel_version_tlv *version)
414{
415 return -EOPNOTSUPP;
416}
417
418static inline int btintel_parse_version_tlv(struct hci_dev *hdev,
419 struct intel_version_tlv *version,
420 struct sk_buff *skb)
421{
422 return -EOPNOTSUPP;
423}
424
425static inline void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant)
426
427{
428}
429
430static inline int btintel_bootloader_setup_tlv(struct hci_dev *hdev,
431 struct intel_version_tlv *ver)
432{
433 return -ENODEV;
434}
435
436static inline int btintel_shutdown_combined(struct hci_dev *hdev)
437{
438 return -ENODEV;
439}
440
441static inline void btintel_hw_error(struct hci_dev *hdev, u8 code)
442{
443}
444
445static inline void btintel_print_fseq_info(struct hci_dev *hdev)
446{
447}
448static inline int btintel_acpi_reset_method(struct hci_dev *hdev)
449{
450 return -ENODEV;
451}
452#endif