| 1 | |
| 2 | |
| 3 | * Trusted Foundations support for ARM CPUs
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| 4 | *
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| 5 | * Copyright (c) 2013, NVIDIA Corporation.
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| 6 |
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| 7 |
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| 8 | #include <linux/kernel.h>
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| 9 | #include <linux/init.h>
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| 10 | #include <linux/of.h>
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| 11 |
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| 12 | #include <linux/firmware/trusted_foundations.h>
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| 13 |
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| 14 | #include <asm/firmware.h>
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| 15 | #include <asm/hardware/cache-l2x0.h>
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| 16 | #include <asm/outercache.h>
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| 17 |
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| 18 | #define TF_CACHE_MAINT 0xfffff100
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| 19 |
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| 20 | #define TF_CACHE_ENABLE 1
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| 21 | #define TF_CACHE_DISABLE 2
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| 22 | #define TF_CACHE_REENABLE 4
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| 23 |
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| 24 | #define TF_SET_CPU_BOOT_ADDR_SMC 0xfffff200
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| 25 |
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| 26 | #define TF_CPU_PM 0xfffffffc
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| 27 | #define TF_CPU_PM_S3 0xffffffe3
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| 28 | #define TF_CPU_PM_S2 0xffffffe6
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| 29 | #define TF_CPU_PM_S2_NO_MC_CLK 0xffffffe5
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| 30 | #define TF_CPU_PM_S1 0xffffffe4
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| 31 | #define TF_CPU_PM_S1_NOFLUSH_L2 0xffffffe7
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| 32 |
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| 33 | static unsigned long tf_idle_mode = TF_PM_MODE_NONE;
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| 34 | static unsigned long cpu_boot_addr;
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| 35 |
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| 36 | static void tf_generic_smc(u32 type, u32 arg1, u32 arg2)
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| 37 | {
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| 38 | register u32 r0 asm("r0") = type;
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| 39 | register u32 r1 asm("r1") = arg1;
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| 40 | register u32 r2 asm("r2") = arg2;
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| 41 |
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| 42 | asm volatile(
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| 43 | ".arch_extension sec\n\t"
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| 44 | "stmfd sp!, {r4 - r11}\n\t"
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| 45 | __asmeq("%0", "r0")
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| 46 | __asmeq("%1", "r1")
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| 47 | __asmeq("%2", "r2")
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| 48 | "mov r3, #0\n\t"
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| 49 | "mov r4, #0\n\t"
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| 50 | "smc #0\n\t"
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| 51 | "ldmfd sp!, {r4 - r11}\n\t"
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| 52 | :
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| 53 | : "r" (r0), "r" (r1), "r" (r2)
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| 54 | : "memory", "r3", "r12", "lr");
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| 55 | }
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| 56 |
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| 57 | static int tf_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
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| 58 | {
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| 59 | cpu_boot_addr = boot_addr;
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| 60 | tf_generic_smc(TF_SET_CPU_BOOT_ADDR_SMC, cpu_boot_addr, 0);
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| 61 |
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| 62 | return 0;
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| 63 | }
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| 64 |
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| 65 | static int tf_prepare_idle(unsigned long mode)
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| 66 | {
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| 67 | switch (mode) {
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| 68 | case TF_PM_MODE_LP0:
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| 69 | tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S3, cpu_boot_addr);
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| 70 | break;
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| 71 |
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| 72 | case TF_PM_MODE_LP1:
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| 73 | tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S2, cpu_boot_addr);
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| 74 | break;
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| 75 |
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| 76 | case TF_PM_MODE_LP1_NO_MC_CLK:
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| 77 | tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S2_NO_MC_CLK,
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| 78 | cpu_boot_addr);
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| 79 | break;
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| 80 |
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| 81 | case TF_PM_MODE_LP2:
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| 82 | tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S1, cpu_boot_addr);
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| 83 | break;
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| 84 |
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| 85 | case TF_PM_MODE_LP2_NOFLUSH_L2:
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| 86 | tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S1_NOFLUSH_L2,
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| 87 | cpu_boot_addr);
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| 88 | break;
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| 89 |
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| 90 | case TF_PM_MODE_NONE:
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| 91 | break;
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| 92 |
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| 93 | default:
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| 94 | return -EINVAL;
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| 95 | }
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| 96 |
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| 97 | tf_idle_mode = mode;
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| 98 |
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| 99 | return 0;
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| 100 | }
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| 101 |
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| 102 | #ifdef CONFIG_CACHE_L2X0
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| 103 | static void tf_cache_write_sec(unsigned long val, unsigned int reg)
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| 104 | {
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| 105 | u32 enable_op, l2x0_way_mask = 0xff;
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| 106 |
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| 107 | switch (reg) {
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| 108 | case L2X0_CTRL:
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| 109 | if (l2x0_saved_regs.aux_ctrl & L310_AUX_CTRL_ASSOCIATIVITY_16)
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| 110 | l2x0_way_mask = 0xffff;
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| 111 |
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| 112 | switch (tf_idle_mode) {
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| 113 | case TF_PM_MODE_LP2:
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| 114 | enable_op = TF_CACHE_REENABLE;
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| 115 | break;
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| 116 |
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| 117 | default:
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| 118 | enable_op = TF_CACHE_ENABLE;
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| 119 | break;
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| 120 | }
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| 121 |
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| 122 | if (val == L2X0_CTRL_EN)
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| 123 | tf_generic_smc(TF_CACHE_MAINT, enable_op,
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| 124 | l2x0_saved_regs.aux_ctrl);
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| 125 | else
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| 126 | tf_generic_smc(TF_CACHE_MAINT, TF_CACHE_DISABLE,
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| 127 | l2x0_way_mask);
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| 128 | break;
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| 129 |
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| 130 | default:
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| 131 | break;
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| 132 | }
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| 133 | }
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| 134 |
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| 135 | static int tf_init_cache(void)
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| 136 | {
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| 137 | outer_cache.write_sec = tf_cache_write_sec;
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| 138 |
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| 139 | return 0;
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| 140 | }
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| 141 | #endif
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| 142 |
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| 143 | static const struct firmware_ops trusted_foundations_ops = {
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| 144 | .set_cpu_boot_addr = tf_set_cpu_boot_addr,
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| 145 | .prepare_idle = tf_prepare_idle,
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| 146 | #ifdef CONFIG_CACHE_L2X0
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| 147 | .l2x0_init = tf_init_cache,
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| 148 | #endif
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| 149 | };
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| 150 |
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| 151 | void register_trusted_foundations(struct trusted_foundations_platform_data *pd)
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| 152 | {
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| 153 | |
| 154 | * we are not using version information for now since currently
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| 155 | * supported SMCs are compatible with all TF releases
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| 156 |
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| 157 | register_firmware_ops(&trusted_foundations_ops);
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| 158 | }
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| 159 |
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| 160 | void of_register_trusted_foundations(void)
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| 161 | {
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| 162 | struct device_node *node;
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| 163 | struct trusted_foundations_platform_data pdata;
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| 164 | int err;
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| 165 |
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| 166 | node = of_find_compatible_node(NULL, NULL, "tlm,trusted-foundations");
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| 167 | if (!node)
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| 168 | return;
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| 169 |
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| 170 | err = of_property_read_u32(node, "tlm,version-major",
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| 171 | &pdata.version_major);
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| 172 | if (err != 0)
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| 173 | panic("Trusted Foundation: missing version-major property\n");
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| 174 | err = of_property_read_u32(node, "tlm,version-minor",
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| 175 | &pdata.version_minor);
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| 176 | if (err != 0)
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| 177 | panic("Trusted Foundation: missing version-minor property\n");
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| 178 | register_trusted_foundations(&pdata);
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| 179 | }
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| 180 |
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| 181 | bool trusted_foundations_registered(void)
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| 182 | {
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| 183 | return firmware_ops == &trusted_foundations_ops;
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| 184 | }
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