| 1 | |
| 2 | * Copyright 2023 Advanced Micro Devices, Inc.
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| 3 | *
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a
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| 5 | * copy of this software and associated documentation files (the "Software"),
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| 6 | * to deal in the Software without restriction, including without limitation
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the
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| 9 | * Software is furnished to do so, subject to the following conditions:
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| 10 | *
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| 11 | * The above copyright notice and this permission notice shall be included in
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| 12 | * all copies or substantial portions of the Software.
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| 13 | *
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| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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| 20 | * OTHER DEALINGS IN THE SOFTWARE.
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| 21 | *
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| 22 |
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| 23 | #include "amdgpu.h"
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| 24 | #include "amdgpu_ras.h"
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| 25 | #include <uapi/linux/kfd_ioctl.h>
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| 26 |
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| 27 | int amdgpu_hdp_ras_sw_init(struct amdgpu_device *adev)
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| 28 | {
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| 29 | int err;
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| 30 | struct amdgpu_hdp_ras *ras;
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| 31 |
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| 32 | if (!adev->hdp.ras)
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| 33 | return 0;
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| 34 |
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| 35 | ras = adev->hdp.ras;
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| 36 | err = amdgpu_ras_register_ras_block(adev, &ras->ras_block);
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| 37 | if (err) {
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| 38 | dev_err(adev->dev, "Failed to register hdp ras block!\n");
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| 39 | return err;
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| 40 | }
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| 41 |
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| 42 | strcpy(ras->ras_block.ras_comm.name, "hdp");
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| 43 | ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__HDP;
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| 44 | ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
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| 45 | adev->hdp.ras_if = &ras->ras_block.ras_comm;
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| 46 |
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| 47 |
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| 48 | return 0;
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| 49 | }
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| 50 |
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| 51 | void amdgpu_hdp_generic_flush(struct amdgpu_device *adev,
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| 52 | struct amdgpu_ring *ring)
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| 53 | {
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| 54 | if (!ring || !ring->funcs->emit_wreg) {
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| 55 | WREG32((adev->rmmio_remap.reg_offset +
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| 56 | KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >>
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| 57 | 2,
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| 58 | 0);
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| 59 | if (adev->nbio.funcs->get_memsize)
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| 60 | adev->nbio.funcs->get_memsize(adev);
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| 61 | } else {
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| 62 | amdgpu_ring_emit_wreg(ring,
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| 63 | (adev->rmmio_remap.reg_offset +
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| 64 | KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >>
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| 65 | 2,
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| 66 | 0);
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| 67 | }
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| 68 | }
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| 69 |
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| 70 | void amdgpu_hdp_invalidate(struct amdgpu_device *adev, struct amdgpu_ring *ring)
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| 71 | {
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| 72 | if (adev->asic_funcs && adev->asic_funcs->invalidate_hdp)
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| 73 | adev->asic_funcs->invalidate_hdp(adev, ring);
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| 74 | else if (adev->hdp.funcs && adev->hdp.funcs->invalidate_hdp)
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| 75 | adev->hdp.funcs->invalidate_hdp(adev, ring);
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| 76 | }
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| 77 |
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| 78 | void amdgpu_hdp_flush(struct amdgpu_device *adev, struct amdgpu_ring *ring)
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| 79 | {
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| 80 | if (adev->asic_funcs && adev->asic_funcs->flush_hdp)
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| 81 | adev->asic_funcs->flush_hdp(adev, ring);
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| 82 | else if (adev->hdp.funcs && adev->hdp.funcs->flush_hdp)
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| 83 | adev->hdp.funcs->flush_hdp(adev, ring);
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| 84 | }
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