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| 2 | |
| 3 | * Copyright 2026 Advanced Micro Devices, Inc.
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| 4 | *
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| 5 | * Permission is hereby granted, free of charge, to any person obtaining a
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| 6 | * copy of this software and associated documentation files (the "Software"),
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| 7 | * to deal in the Software without restriction, including without limitation
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| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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| 9 | * and/or sell copies of the Software, and to permit persons to whom the
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| 10 | * Software is furnished to do so, subject to the following conditions:
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| 11 | *
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| 12 | * The above copyright notice and this permission notice shall be included in
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| 13 | * all copies or substantial portions of the Software.
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| 14 | *
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| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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| 18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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| 19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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| 20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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| 21 | * OTHER DEALINGS IN THE SOFTWARE.
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| 22 | *
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| 23 |
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| 24 |
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| 25 | #ifndef AMDGPU_SA_H_
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| 26 | #define AMDGPU_SA_H_
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| 27 |
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| 28 | #include <drm/drm_suballoc.h>
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| 29 |
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| 30 | struct amdgpu_device;
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| 31 | struct amdgpu_bo;
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| 32 |
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| 33 | struct amdgpu_sa_manager {
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| 34 | struct drm_suballoc_manager base;
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| 35 | struct amdgpu_bo *bo;
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| 36 | uint64_t gpu_addr;
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| 37 | void *cpu_ptr;
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| 38 | gfp_t gfp_flags;
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| 39 | };
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| 40 |
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| 41 | static inline struct amdgpu_sa_manager *
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| 42 | to_amdgpu_sa_manager(struct drm_suballoc_manager *manager)
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| 43 | {
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| 44 | return container_of(manager, struct amdgpu_sa_manager, base);
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| 45 | }
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| 46 |
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| 47 | static inline uint64_t amdgpu_sa_bo_gpu_addr(struct drm_suballoc *sa_bo)
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| 48 | {
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| 49 | return to_amdgpu_sa_manager(sa_bo->manager)->gpu_addr +
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| 50 | drm_suballoc_soffset(sa_bo);
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| 51 | }
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| 52 |
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| 53 | static inline void *amdgpu_sa_bo_cpu_addr(struct drm_suballoc *sa_bo)
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| 54 | {
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| 55 | return to_amdgpu_sa_manager(sa_bo->manager)->cpu_ptr +
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| 56 | drm_suballoc_soffset(sa_bo);
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| 57 | }
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| 58 |
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| 59 | int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev,
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| 60 | struct amdgpu_sa_manager *sa_manager,
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| 61 | unsigned size, gfp_t gfp_flags);
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| 62 | void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
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| 63 | struct amdgpu_sa_manager *sa_manager);
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| 64 | int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev,
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| 65 | struct amdgpu_sa_manager *sa_manager);
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| 66 | int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager,
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| 67 | struct drm_suballoc **sa_bo,
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| 68 | unsigned int size);
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| 69 | void amdgpu_sa_bo_free(struct drm_suballoc **sa_bo,
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| 70 | struct dma_fence *fence);
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| 71 | #if defined(CONFIG_DEBUG_FS)
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| 72 | void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
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| 73 | struct seq_file *m);
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| 74 | u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m);
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| 75 | #endif
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| 76 | void amdgpu_debugfs_sa_init(struct amdgpu_device *adev);
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| 77 |
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| 78 | #endif
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