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| 2 | * Copyright 2017 Advanced Micro Devices, Inc.
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| 3 | *
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a
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| 5 | * copy of this software and associated documentation files (the "Software"),
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| 6 | * to deal in the Software without restriction, including without limitation
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the
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| 9 | * Software is furnished to do so, subject to the following conditions:
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| 10 | *
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| 11 | * The above copyright notice and this permission notice shall be included in
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| 12 | * all copies or substantial portions of the Software.
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| 13 | *
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| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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| 20 | * OTHER DEALINGS IN THE SOFTWARE.
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| 21 |
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| 22 |
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| 23 | #ifndef __MXGPU_VI_H__
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| 24 | #define __MXGPU_VI_H__
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| 25 |
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| 26 | #define VI_MAILBOX_TIMEDOUT 12000
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| 27 | #define VI_MAILBOX_RESET_TIME 12
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| 28 |
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| 29 |
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| 30 | enum idh_request {
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| 31 | IDH_REQ_GPU_INIT_ACCESS = 1,
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| 32 | IDH_REL_GPU_INIT_ACCESS,
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| 33 | IDH_REQ_GPU_FINI_ACCESS,
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| 34 | IDH_REL_GPU_FINI_ACCESS,
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| 35 | IDH_REQ_GPU_RESET_ACCESS,
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| 36 |
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| 37 | IDH_LOG_VF_ERROR = 200,
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| 38 | };
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| 39 |
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| 40 |
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| 41 | enum idh_event {
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| 42 | IDH_CLR_MSG_BUF = 0,
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| 43 | IDH_READY_TO_ACCESS_GPU,
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| 44 | IDH_FLR_NOTIFICATION,
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| 45 | IDH_FLR_NOTIFICATION_CMPL,
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| 46 |
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| 47 | IDH_TEXT_MESSAGE = 255
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| 48 | };
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| 49 |
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| 50 | extern const struct amdgpu_virt_ops xgpu_vi_virt_ops;
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| 51 |
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| 52 | void xgpu_vi_init_golden_registers(struct amdgpu_device *adev);
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| 53 | void xgpu_vi_mailbox_set_irq_funcs(struct amdgpu_device *adev);
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| 54 | int xgpu_vi_mailbox_add_irq_id(struct amdgpu_device *adev);
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| 55 | int xgpu_vi_mailbox_get_irq(struct amdgpu_device *adev);
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| 56 | void xgpu_vi_mailbox_put_irq(struct amdgpu_device *adev);
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| 57 |
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| 58 | #endif
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