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1/*
2 * Copyright (C) 2015 Red Hat, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26#include <trace/events/dma_fence.h>
27
28#include "virtgpu_drv.h"
29
30#define to_virtio_gpu_fence(x) \
31 container_of(x, struct virtio_gpu_fence, f)
32
33static const char *virtio_gpu_get_driver_name(struct dma_fence *f)
34{
35 return "virtio_gpu";
36}
37
38static const char *virtio_gpu_get_timeline_name(struct dma_fence *f)
39{
40 return "controlq";
41}
42
43static bool virtio_gpu_fence_signaled(struct dma_fence *f)
44{
45 /* leaked fence outside driver before completing
46 * initialization with virtio_gpu_fence_emit.
47 */
48 WARN_ON_ONCE(f->seqno == 0);
49 return false;
50}
51
52static const struct dma_fence_ops virtio_gpu_fence_ops = {
53 .get_driver_name = virtio_gpu_get_driver_name,
54 .get_timeline_name = virtio_gpu_get_timeline_name,
55 .signaled = virtio_gpu_fence_signaled,
56};
57
58struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev,
59 uint64_t base_fence_ctx,
60 uint32_t ring_idx)
61{
62 uint64_t fence_context = base_fence_ctx + ring_idx;
63 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
64 struct virtio_gpu_fence *fence = kzalloc_obj(struct virtio_gpu_fence);
65
66 if (!fence)
67 return fence;
68
69 fence->drv = drv;
70 fence->ring_idx = ring_idx;
71 fence->emit_fence_info = !(base_fence_ctx == drv->context);
72
73 /* This only partially initializes the fence because the seqno is
74 * unknown yet. The fence must not be used outside of the driver
75 * until virtio_gpu_fence_emit is called.
76 */
77
78 dma_fence_init(&fence->f, &virtio_gpu_fence_ops, &drv->lock,
79 fence_context, 0);
80
81 return fence;
82}
83
84void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
85 struct virtio_gpu_ctrl_hdr *cmd_hdr,
86 struct virtio_gpu_fence *fence)
87{
88 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
89 unsigned long irq_flags;
90
91 spin_lock_irqsave(&drv->lock, irq_flags);
92 fence->fence_id = fence->f.seqno = ++drv->current_fence_id;
93 dma_fence_get(&fence->f);
94 list_add_tail(&fence->node, &drv->fences);
95 spin_unlock_irqrestore(&drv->lock, irq_flags);
96
97 trace_dma_fence_emit(&fence->f);
98
99 cmd_hdr->flags |= cpu_to_le32(VIRTIO_GPU_FLAG_FENCE);
100 cmd_hdr->fence_id = cpu_to_le64(fence->fence_id);
101
102 /* Only currently defined fence param. */
103 if (fence->emit_fence_info) {
104 cmd_hdr->flags |=
105 cpu_to_le32(VIRTIO_GPU_FLAG_INFO_RING_IDX);
106 cmd_hdr->ring_idx = (u8)fence->ring_idx;
107 }
108}
109
110void virtio_gpu_fence_event_process(struct virtio_gpu_device *vgdev,
111 u64 fence_id)
112{
113 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
114 struct virtio_gpu_fence *signaled, *curr, *tmp;
115 unsigned long irq_flags;
116
117 spin_lock_irqsave(&drv->lock, irq_flags);
118 atomic64_set(&vgdev->fence_drv.last_fence_id, fence_id);
119 list_for_each_entry_safe(curr, tmp, &drv->fences, node) {
120 if (fence_id != curr->fence_id)
121 continue;
122
123 signaled = curr;
124
125 /*
126 * Signal any fences with a strictly smaller sequence number
127 * than the current signaled fence.
128 */
129 list_for_each_entry_safe(curr, tmp, &drv->fences, node) {
130 /* dma-fence contexts must match */
131 if (signaled->f.context != curr->f.context)
132 continue;
133
134 if (!dma_fence_is_later(&signaled->f, &curr->f))
135 continue;
136
137 dma_fence_signal_locked(&curr->f);
138 if (curr->e) {
139 drm_send_event(vgdev->ddev, &curr->e->base);
140 curr->e = NULL;
141 }
142
143 list_del(&curr->node);
144 dma_fence_put(&curr->f);
145 }
146
147 dma_fence_signal_locked(&signaled->f);
148 if (signaled->e) {
149 drm_send_event(vgdev->ddev, &signaled->e->base);
150 signaled->e = NULL;
151 }
152
153 list_del(&signaled->node);
154 dma_fence_put(&signaled->f);
155 break;
156 }
157 spin_unlock_irqrestore(&drv->lock, irq_flags);
158}