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| 2 | |
| 3 | * Copyright © 2022 Intel Corporation
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| 4 |
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| 5 |
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| 6 | #ifndef _XE_PCODE_H_
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| 7 | #define _XE_PCODE_H_
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| 8 |
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| 9 | #include <linux/types.h>
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| 10 |
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| 11 | struct drm_device;
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| 12 | struct xe_device;
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| 13 | struct xe_tile;
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| 14 |
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| 15 | struct xe_pcode_version {
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| 16 | u16 minor;
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| 17 | u16 major;
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| 18 | u32 engg;
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| 19 | };
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| 20 |
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| 21 | int xe_pcode_init_early(struct xe_tile *tile);
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| 22 | int xe_pcode_probe_early(struct xe_device *xe);
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| 23 | int xe_pcode_ready(struct xe_device *xe, bool locked);
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| 24 | int xe_pcode_init_min_freq_table(struct xe_tile *tile, u32 min_gt_freq,
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| 25 | u32 max_gt_freq);
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| 26 | int xe_pcode_read(struct xe_tile *tile, u32 mbox, u32 *val, u32 *val1);
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| 27 | int xe_pcode_write_timeout(struct xe_tile *tile, u32 mbox, u32 val,
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| 28 | int timeout_ms);
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| 29 | int xe_pcode_write64_timeout(struct xe_tile *tile, u32 mbox, u32 data0,
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| 30 | u32 data1, int timeout);
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| 31 | int xe_get_pcode_version(struct xe_device *xe, struct xe_pcode_version *version);
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| 32 |
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| 33 | #define xe_pcode_write(tile, mbox, val) \
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| 34 | xe_pcode_write_timeout(tile, mbox, val, 1)
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| 35 |
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| 36 | int xe_pcode_request(struct xe_tile *tile, u32 mbox, u32 request,
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| 37 | u32 reply_mask, u32 reply, int timeout_ms);
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| 38 |
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| 39 | #define PCODE_MBOX(mbcmd, param1, param2)\
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| 40 | (FIELD_PREP(PCODE_MB_COMMAND, mbcmd)\
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| 41 | | FIELD_PREP(PCODE_MB_PARAM1, param1)\
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| 42 | | FIELD_PREP(PCODE_MB_PARAM2, param2))
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| 43 |
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| 44 | #endif
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