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1// SPDX-License-Identifier: MIT
2/*
3 * Copyright © 2022 Intel Corporation
4 */
5
6#include "xe_query.h"
7
8#include <linux/nospec.h>
9#include <linux/sched/clock.h>
10
11#include <drm/ttm/ttm_placement.h>
12#include <generated/xe_wa_oob.h>
13#include <uapi/drm/xe_drm.h>
14
15#include "regs/xe_engine_regs.h"
16#include "regs/xe_gt_regs.h"
17#include "xe_bo.h"
18#include "xe_device.h"
19#include "xe_eu_stall.h"
20#include "xe_exec_queue.h"
21#include "xe_force_wake.h"
22#include "xe_ggtt.h"
23#include "xe_gt.h"
24#include "xe_gt_topology.h"
25#include "xe_guc_hwconfig.h"
26#include "xe_macros.h"
27#include "xe_mmio.h"
28#include "xe_oa.h"
29#include "xe_pxp.h"
30#include "xe_ttm_vram_mgr.h"
31#include "xe_vram_types.h"
32#include "xe_wa.h"
33
34static const u16 xe_to_user_engine_class[] = {
35 [XE_ENGINE_CLASS_RENDER] = DRM_XE_ENGINE_CLASS_RENDER,
36 [XE_ENGINE_CLASS_COPY] = DRM_XE_ENGINE_CLASS_COPY,
37 [XE_ENGINE_CLASS_VIDEO_DECODE] = DRM_XE_ENGINE_CLASS_VIDEO_DECODE,
38 [XE_ENGINE_CLASS_VIDEO_ENHANCE] = DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE,
39 [XE_ENGINE_CLASS_COMPUTE] = DRM_XE_ENGINE_CLASS_COMPUTE,
40};
41
42static const enum xe_engine_class user_to_xe_engine_class[] = {
43 [DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER,
44 [DRM_XE_ENGINE_CLASS_COPY] = XE_ENGINE_CLASS_COPY,
45 [DRM_XE_ENGINE_CLASS_VIDEO_DECODE] = XE_ENGINE_CLASS_VIDEO_DECODE,
46 [DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_ENGINE_CLASS_VIDEO_ENHANCE,
47 [DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE,
48};
49
50static size_t calc_hw_engine_info_size(struct xe_device *xe)
51{
52 struct xe_hw_engine *hwe;
53 enum xe_hw_engine_id id;
54 struct xe_gt *gt;
55 u8 gt_id;
56 int i = 0;
57
58 for_each_gt(gt, xe, gt_id)
59 for_each_hw_engine(hwe, gt, id) {
60 if (xe_hw_engine_is_reserved(hwe))
61 continue;
62 i++;
63 }
64
65 return sizeof(struct drm_xe_query_engines) +
66 i * sizeof(struct drm_xe_engine);
67}
68
69typedef u64 (*__ktime_func_t)(void);
70static __ktime_func_t __clock_id_to_func(clockid_t clk_id)
71{
72 /*
73 * Use logic same as the perf subsystem to allow user to select the
74 * reference clock id to be used for timestamps.
75 */
76 switch (clk_id) {
77 case CLOCK_MONOTONIC:
78 return &ktime_get_ns;
79 case CLOCK_MONOTONIC_RAW:
80 return &ktime_get_raw_ns;
81 case CLOCK_REALTIME:
82 return &ktime_get_real_ns;
83 case CLOCK_BOOTTIME:
84 return &ktime_get_boottime_ns;
85 case CLOCK_TAI:
86 return &ktime_get_clocktai_ns;
87 default:
88 return NULL;
89 }
90}
91
92static void
93hwe_read_timestamp(struct xe_hw_engine *hwe, u64 *engine_ts, u64 *cpu_ts,
94 u64 *cpu_delta, __ktime_func_t cpu_clock)
95{
96 struct xe_mmio *mmio = &hwe->gt->mmio;
97 u32 upper, lower, old_upper, loop = 0;
98 struct xe_reg upper_reg = RING_TIMESTAMP_UDW(hwe->mmio_base),
99 lower_reg = RING_TIMESTAMP(hwe->mmio_base);
100
101 upper = xe_mmio_read32(mmio, upper_reg);
102 do {
103 *cpu_delta = local_clock();
104 *cpu_ts = cpu_clock();
105 lower = xe_mmio_read32(mmio, lower_reg);
106 *cpu_delta = local_clock() - *cpu_delta;
107 old_upper = upper;
108 upper = xe_mmio_read32(mmio, upper_reg);
109 } while (upper != old_upper && loop++ < 2);
110
111 *engine_ts = (u64)upper << 32 | lower;
112}
113
114static int
115query_engine_cycles(struct xe_device *xe,
116 struct drm_xe_device_query *query)
117{
118 struct drm_xe_query_engine_cycles __user *query_ptr;
119 struct drm_xe_engine_class_instance *eci;
120 struct drm_xe_query_engine_cycles resp;
121 size_t size = sizeof(resp);
122 enum xe_force_wake_domains fw_domain;
123 __ktime_func_t cpu_clock;
124 struct xe_hw_engine *hwe;
125 struct xe_gt *gt;
126
127 if (IS_SRIOV_VF(xe))
128 return -EOPNOTSUPP;
129
130 if (query->size == 0) {
131 query->size = size;
132 return 0;
133 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
134 return -EINVAL;
135 }
136
137 query_ptr = u64_to_user_ptr(query->data);
138 if (copy_from_user(&resp, query_ptr, size))
139 return -EFAULT;
140
141 cpu_clock = __clock_id_to_func(resp.clockid);
142 if (!cpu_clock)
143 return -EINVAL;
144
145 eci = &resp.eci;
146 gt = xe_device_get_gt(xe, eci->gt_id);
147 if (!gt)
148 return -EINVAL;
149
150 if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class))
151 return -EINVAL;
152
153 hwe = xe_gt_hw_engine(gt, user_to_xe_engine_class[eci->engine_class],
154 eci->engine_instance, true);
155 if (!hwe)
156 return -EINVAL;
157
158 fw_domain = xe_hw_engine_to_fw_domain(hwe);
159
160 xe_with_force_wake(fw_ref, gt_to_fw(gt), fw_domain) {
161 if (!xe_force_wake_ref_has_domain(fw_ref.domains, fw_domain))
162 return -EIO;
163
164 hwe_read_timestamp(hwe, &resp.engine_cycles, &resp.cpu_timestamp,
165 &resp.cpu_delta, cpu_clock);
166 }
167
168 if (GRAPHICS_VER(xe) >= 20)
169 resp.width = 64;
170 else
171 resp.width = 36;
172
173 /* Only write to the output fields of user query */
174 if (put_user(resp.cpu_timestamp, &query_ptr->cpu_timestamp) ||
175 put_user(resp.cpu_delta, &query_ptr->cpu_delta) ||
176 put_user(resp.engine_cycles, &query_ptr->engine_cycles) ||
177 put_user(resp.width, &query_ptr->width))
178 return -EFAULT;
179
180 return 0;
181}
182
183static int query_engines(struct xe_device *xe,
184 struct drm_xe_device_query *query)
185{
186 size_t size = calc_hw_engine_info_size(xe);
187 struct drm_xe_query_engines __user *query_ptr =
188 u64_to_user_ptr(query->data);
189 struct drm_xe_query_engines *engines;
190 struct xe_hw_engine *hwe;
191 enum xe_hw_engine_id id;
192 struct xe_gt *gt;
193 u8 gt_id;
194 int i = 0;
195
196 if (query->size == 0) {
197 query->size = size;
198 return 0;
199 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
200 return -EINVAL;
201 }
202
203 engines = kzalloc(size, GFP_KERNEL);
204 if (!engines)
205 return -ENOMEM;
206
207 for_each_gt(gt, xe, gt_id)
208 for_each_hw_engine(hwe, gt, id) {
209 if (xe_hw_engine_is_reserved(hwe))
210 continue;
211
212 engines->engines[i].instance.engine_class =
213 xe_to_user_engine_class[hwe->class];
214 engines->engines[i].instance.engine_instance =
215 hwe->logical_instance;
216 engines->engines[i].instance.gt_id = gt->info.id;
217
218 i++;
219 }
220
221 engines->num_engines = i;
222
223 if (copy_to_user(query_ptr, engines, size)) {
224 kfree(engines);
225 return -EFAULT;
226 }
227 kfree(engines);
228
229 return 0;
230}
231
232static size_t calc_mem_regions_size(struct xe_device *xe)
233{
234 u32 num_managers = 1;
235 int i;
236
237 if (xe_device_is_admin_only(xe))
238 return sizeof(struct drm_xe_query_mem_regions);
239
240 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i)
241 if (ttm_manager_type(&xe->ttm, i))
242 num_managers++;
243
244 return offsetof(struct drm_xe_query_mem_regions, mem_regions[num_managers]);
245}
246
247static int query_mem_regions(struct xe_device *xe,
248 struct drm_xe_device_query *query)
249{
250 size_t size = calc_mem_regions_size(xe);
251 struct drm_xe_query_mem_regions *mem_regions;
252 struct drm_xe_query_mem_regions __user *query_ptr =
253 u64_to_user_ptr(query->data);
254 struct ttm_resource_manager *man;
255 int ret, i;
256
257 if (query->size == 0) {
258 query->size = size;
259 return 0;
260 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
261 return -EINVAL;
262 }
263
264 mem_regions = kzalloc(size, GFP_KERNEL);
265 if (XE_IOCTL_DBG(xe, !mem_regions))
266 return -ENOMEM;
267
268 if (xe_device_is_admin_only(xe))
269 goto user_copy;
270
271 man = ttm_manager_type(&xe->ttm, XE_PL_TT);
272 mem_regions->mem_regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;
273 /*
274 * The instance needs to be a unique number that represents the index
275 * in the placement mask used at xe_gem_create_ioctl() for the
276 * xe_bo_create() placement.
277 */
278 mem_regions->mem_regions[0].instance = 0;
279 mem_regions->mem_regions[0].min_page_size = PAGE_SIZE;
280 mem_regions->mem_regions[0].total_size = man->size << PAGE_SHIFT;
281 mem_regions->mem_regions[0].used = ttm_resource_manager_usage(man);
282 mem_regions->num_mem_regions = 1;
283
284 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) {
285 man = ttm_manager_type(&xe->ttm, i);
286 if (man) {
287 mem_regions->mem_regions[mem_regions->num_mem_regions].mem_class =
288 DRM_XE_MEM_REGION_CLASS_VRAM;
289 mem_regions->mem_regions[mem_regions->num_mem_regions].instance =
290 mem_regions->num_mem_regions;
291 mem_regions->mem_regions[mem_regions->num_mem_regions].min_page_size =
292 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ?
293 SZ_64K : PAGE_SIZE;
294 mem_regions->mem_regions[mem_regions->num_mem_regions].total_size =
295 man->size;
296
297 xe_ttm_vram_get_used(man,
298 &mem_regions->mem_regions
299 [mem_regions->num_mem_regions].used,
300 &mem_regions->mem_regions
301 [mem_regions->num_mem_regions].cpu_visible_used);
302
303 mem_regions->mem_regions[mem_regions->num_mem_regions].cpu_visible_size =
304 xe_ttm_vram_get_cpu_visible_size(man);
305 mem_regions->num_mem_regions++;
306 }
307 }
308
309user_copy:
310 if (!copy_to_user(query_ptr, mem_regions, size))
311 ret = 0;
312 else
313 ret = -ENOSPC;
314
315 kfree(mem_regions);
316 return ret;
317}
318
319static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
320{
321 const u32 num_params = DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1;
322 size_t size =
323 sizeof(struct drm_xe_query_config) + num_params * sizeof(u64);
324 struct drm_xe_query_config __user *query_ptr =
325 u64_to_user_ptr(query->data);
326 struct drm_xe_query_config *config;
327
328 if (query->size == 0) {
329 query->size = size;
330 return 0;
331 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
332 return -EINVAL;
333 }
334
335 config = kzalloc(size, GFP_KERNEL);
336 if (!config)
337 return -ENOMEM;
338
339 config->num_params = num_params;
340 config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
341 xe->info.devid | (xe->info.revid << 16);
342 if (xe->mem.vram)
343 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
344 DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM;
345 if (xe->info.has_usm && IS_ENABLED(CONFIG_DRM_XE_GPUSVM))
346 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
347 DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR;
348 if (GRAPHICS_VER(xe) >= 20)
349 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
350 DRM_XE_QUERY_CONFIG_FLAG_HAS_NO_COMPRESSION_HINT;
351 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
352 DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY;
353 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
354 DRM_XE_QUERY_CONFIG_FLAG_HAS_DISABLE_STATE_CACHE_PERF_FIX;
355 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
356 DRM_XE_QUERY_CONFIG_FLAG_HAS_PURGING_SUPPORT;
357 config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
358 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
359 config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
360 config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
361 xe_exec_queue_device_get_max_priority(xe);
362
363 if (copy_to_user(query_ptr, config, size)) {
364 kfree(config);
365 return -EFAULT;
366 }
367 kfree(config);
368
369 return 0;
370}
371
372static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query)
373{
374 struct xe_gt *gt;
375 size_t size = sizeof(struct drm_xe_query_gt_list) +
376 xe->info.gt_count * sizeof(struct drm_xe_gt);
377 struct drm_xe_query_gt_list __user *query_ptr =
378 u64_to_user_ptr(query->data);
379 struct drm_xe_query_gt_list *gt_list;
380 int iter = 0;
381 u8 id;
382
383 if (query->size == 0) {
384 query->size = size;
385 return 0;
386 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
387 return -EINVAL;
388 }
389
390 gt_list = kzalloc(size, GFP_KERNEL);
391 if (!gt_list)
392 return -ENOMEM;
393
394 gt_list->num_gt = xe->info.gt_count;
395
396 for_each_gt(gt, xe, id) {
397 if (xe_gt_is_media_type(gt))
398 gt_list->gt_list[iter].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
399 else
400 gt_list->gt_list[iter].type = DRM_XE_QUERY_GT_TYPE_MAIN;
401 gt_list->gt_list[iter].tile_id = gt_to_tile(gt)->id;
402 gt_list->gt_list[iter].gt_id = gt->info.id;
403 gt_list->gt_list[iter].reference_clock = gt->info.reference_clock;
404 /*
405 * The mem_regions indexes in the mask below need to
406 * directly identify the struct
407 * drm_xe_query_mem_regions' instance constructed at
408 * query_mem_regions()
409 *
410 * For our current platforms:
411 * Bit 0 -> System Memory
412 * Bit 1 -> VRAM0 on Tile0
413 * Bit 2 -> VRAM1 on Tile1
414 * However the uAPI is generic and it's userspace's
415 * responsibility to check the mem_class, without any
416 * assumption.
417 */
418 if (!IS_DGFX(xe))
419 gt_list->gt_list[iter].near_mem_regions = 0x1;
420 else
421 gt_list->gt_list[iter].near_mem_regions =
422 BIT(gt_to_tile(gt)->mem.vram->id) << 1;
423 gt_list->gt_list[iter].far_mem_regions = xe->info.mem_region_mask ^
424 gt_list->gt_list[iter].near_mem_regions;
425
426 gt_list->gt_list[iter].ip_ver_major =
427 REG_FIELD_GET(GMD_ID_ARCH_MASK, gt->info.gmdid);
428 gt_list->gt_list[iter].ip_ver_minor =
429 REG_FIELD_GET(GMD_ID_RELEASE_MASK, gt->info.gmdid);
430 gt_list->gt_list[iter].ip_ver_rev =
431 REG_FIELD_GET(GMD_ID_REVID, gt->info.gmdid);
432
433 iter++;
434 }
435
436 if (copy_to_user(query_ptr, gt_list, size)) {
437 kfree(gt_list);
438 return -EFAULT;
439 }
440 kfree(gt_list);
441
442 return 0;
443}
444
445static int query_hwconfig(struct xe_device *xe,
446 struct drm_xe_device_query *query)
447{
448 struct xe_gt *gt = xe_root_mmio_gt(xe);
449 size_t size = gt ? xe_guc_hwconfig_size(&gt->uc.guc) : 0;
450 void __user *query_ptr = u64_to_user_ptr(query->data);
451 void *hwconfig;
452
453 if (query->size == 0) {
454 query->size = size;
455 return 0;
456 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
457 return -EINVAL;
458 }
459
460 hwconfig = kzalloc(size, GFP_KERNEL);
461 if (!hwconfig)
462 return -ENOMEM;
463
464 xe_guc_hwconfig_copy(&gt->uc.guc, hwconfig);
465
466 if (copy_to_user(query_ptr, hwconfig, size)) {
467 kfree(hwconfig);
468 return -EFAULT;
469 }
470 kfree(hwconfig);
471
472 return 0;
473}
474
475static size_t calc_topo_query_size(struct xe_device *xe)
476{
477 struct xe_gt *gt;
478 size_t query_size = 0;
479 int id;
480
481 for_each_gt(gt, xe, id) {
482 query_size += 3 * sizeof(struct drm_xe_query_topology_mask) +
483 sizeof_field(struct xe_gt, fuse_topo.g_dss_mask) +
484 sizeof_field(struct xe_gt, fuse_topo.c_dss_mask) +
485 sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss);
486
487 /* L3bank mask may not be available for some GTs */
488 if (xe_gt_topology_report_l3(gt))
489 query_size += sizeof(struct drm_xe_query_topology_mask) +
490 sizeof_field(struct xe_gt, fuse_topo.l3_bank_mask);
491 }
492
493 return query_size;
494}
495
496static int copy_mask(void __user **ptr,
497 struct drm_xe_query_topology_mask *topo,
498 void *mask, size_t mask_size)
499{
500 topo->num_bytes = mask_size;
501
502 if (copy_to_user(*ptr, topo, sizeof(*topo)))
503 return -EFAULT;
504 *ptr += sizeof(*topo);
505
506 if (copy_to_user(*ptr, mask, mask_size))
507 return -EFAULT;
508 *ptr += mask_size;
509
510 return 0;
511}
512
513static int query_gt_topology(struct xe_device *xe,
514 struct drm_xe_device_query *query)
515{
516 void __user *query_ptr = u64_to_user_ptr(query->data);
517 size_t size = calc_topo_query_size(xe);
518 struct drm_xe_query_topology_mask topo;
519 struct xe_gt *gt;
520 int id;
521
522 if (query->size == 0) {
523 query->size = size;
524 return 0;
525 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
526 return -EINVAL;
527 }
528
529 for_each_gt(gt, xe, id) {
530 int err;
531
532 topo.gt_id = id;
533
534 topo.type = DRM_XE_TOPO_DSS_GEOMETRY;
535 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.g_dss_mask,
536 sizeof(gt->fuse_topo.g_dss_mask));
537 if (err)
538 return err;
539
540 topo.type = DRM_XE_TOPO_DSS_COMPUTE;
541 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.c_dss_mask,
542 sizeof(gt->fuse_topo.c_dss_mask));
543 if (err)
544 return err;
545
546 /*
547 * If the kernel doesn't have a way to obtain a correct L3bank
548 * mask, then it's better to omit L3 from the query rather than
549 * reporting bogus or zeroed information to userspace.
550 */
551 if (xe_gt_topology_report_l3(gt)) {
552 topo.type = DRM_XE_TOPO_L3_BANK;
553 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.l3_bank_mask,
554 sizeof(gt->fuse_topo.l3_bank_mask));
555 if (err)
556 return err;
557 }
558
559 topo.type = gt->fuse_topo.eu_type == XE_GT_EU_TYPE_SIMD16 ?
560 DRM_XE_TOPO_SIMD16_EU_PER_DSS :
561 DRM_XE_TOPO_EU_PER_DSS;
562 err = copy_mask(&query_ptr, &topo,
563 gt->fuse_topo.eu_mask_per_dss,
564 sizeof(gt->fuse_topo.eu_mask_per_dss));
565 if (err)
566 return err;
567 }
568
569 return 0;
570}
571
572static int
573query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
574{
575 struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data);
576 size_t size = sizeof(struct drm_xe_query_uc_fw_version);
577 struct drm_xe_query_uc_fw_version resp;
578 struct xe_uc_fw_version *version = NULL;
579
580 if (query->size == 0) {
581 query->size = size;
582 return 0;
583 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
584 return -EINVAL;
585 }
586
587 if (copy_from_user(&resp, query_ptr, size))
588 return -EFAULT;
589
590 if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved))
591 return -EINVAL;
592
593 switch (resp.uc_type) {
594 case XE_QUERY_UC_TYPE_GUC_SUBMISSION: {
595 struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
596
597 version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY];
598 break;
599 }
600 case XE_QUERY_UC_TYPE_HUC: {
601 struct xe_gt *media_gt = NULL;
602 struct xe_huc *huc;
603
604 if (MEDIA_VER(xe) >= 13) {
605 struct xe_tile *tile;
606 u8 gt_id;
607
608 for_each_tile(tile, xe, gt_id) {
609 if (tile->media_gt) {
610 media_gt = tile->media_gt;
611 break;
612 }
613 }
614 } else {
615 media_gt = xe->tiles[0].primary_gt;
616 }
617
618 if (!media_gt)
619 break;
620
621 huc = &media_gt->uc.huc;
622 if (huc->fw.status == XE_UC_FIRMWARE_RUNNING)
623 version = &huc->fw.versions.found[XE_UC_FW_VER_RELEASE];
624 break;
625 }
626 default:
627 return -EINVAL;
628 }
629
630 if (version) {
631 resp.branch_ver = 0;
632 resp.major_ver = version->major;
633 resp.minor_ver = version->minor;
634 resp.patch_ver = version->patch;
635 } else {
636 return -ENODEV;
637 }
638
639 if (copy_to_user(query_ptr, &resp, size))
640 return -EFAULT;
641
642 return 0;
643}
644
645static size_t calc_oa_unit_query_size(struct xe_device *xe)
646{
647 size_t size = sizeof(struct drm_xe_query_oa_units);
648 struct xe_gt *gt;
649 int i, id;
650
651 for_each_gt(gt, xe, id) {
652 for (i = 0; i < gt->oa.num_oa_units; i++) {
653 size += sizeof(struct drm_xe_oa_unit);
654 size += gt->oa.oa_unit[i].num_engines *
655 sizeof(struct drm_xe_engine_class_instance);
656 }
657 }
658
659 return size;
660}
661
662static int query_oa_units(struct xe_device *xe,
663 struct drm_xe_device_query *query)
664{
665 void __user *query_ptr = u64_to_user_ptr(query->data);
666 size_t size = calc_oa_unit_query_size(xe);
667 struct drm_xe_query_oa_units *qoa;
668 enum xe_hw_engine_id hwe_id;
669 struct drm_xe_oa_unit *du;
670 struct xe_hw_engine *hwe;
671 struct xe_oa_unit *u;
672 int gt_id, i, j, ret;
673 struct xe_gt *gt;
674 u8 *pdu;
675
676 if (query->size == 0) {
677 query->size = size;
678 return 0;
679 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
680 return -EINVAL;
681 }
682
683 qoa = kzalloc(size, GFP_KERNEL);
684 if (!qoa)
685 return -ENOMEM;
686
687 pdu = (u8 *)&qoa->oa_units[0];
688 for_each_gt(gt, xe, gt_id) {
689 for (i = 0; i < gt->oa.num_oa_units; i++) {
690 u = &gt->oa.oa_unit[i];
691 du = (struct drm_xe_oa_unit *)pdu;
692
693 du->oa_unit_id = u->oa_unit_id;
694 du->oa_unit_type = u->type;
695 du->oa_timestamp_freq = xe_oa_timestamp_frequency(gt);
696 du->capabilities = DRM_XE_OA_CAPS_BASE | DRM_XE_OA_CAPS_SYNCS |
697 DRM_XE_OA_CAPS_OA_BUFFER_SIZE |
698 DRM_XE_OA_CAPS_WAIT_NUM_REPORTS |
699 DRM_XE_OA_CAPS_OAM |
700 DRM_XE_OA_CAPS_OA_UNIT_GT_ID;
701 du->gt_id = u->gt->info.id;
702 j = 0;
703 for_each_hw_engine(hwe, gt, hwe_id) {
704 if (!xe_hw_engine_is_reserved(hwe) &&
705 xe_oa_unit_id(hwe) == u->oa_unit_id) {
706 du->eci[j].engine_class =
707 xe_to_user_engine_class[hwe->class];
708 du->eci[j].engine_instance = hwe->logical_instance;
709 du->eci[j].gt_id = gt->info.id;
710 j++;
711 }
712 }
713 du->num_engines = j;
714 pdu += sizeof(*du) + j * sizeof(du->eci[0]);
715 qoa->num_oa_units++;
716 }
717 }
718
719 ret = copy_to_user(query_ptr, qoa, size);
720 kfree(qoa);
721
722 return ret ? -EFAULT : 0;
723}
724
725static int query_pxp_status(struct xe_device *xe, struct drm_xe_device_query *query)
726{
727 struct drm_xe_query_pxp_status __user *query_ptr = u64_to_user_ptr(query->data);
728 size_t size = sizeof(struct drm_xe_query_pxp_status);
729 struct drm_xe_query_pxp_status resp = { 0 };
730 int ret;
731
732 if (query->size == 0) {
733 query->size = size;
734 return 0;
735 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
736 return -EINVAL;
737 }
738
739 ret = xe_pxp_get_readiness_status(xe->pxp);
740 if (ret < 0)
741 return ret;
742
743 resp.status = ret;
744 resp.supported_session_types = BIT(DRM_XE_PXP_TYPE_HWDRM);
745
746 if (copy_to_user(query_ptr, &resp, size))
747 return -EFAULT;
748
749 return 0;
750}
751
752static int query_eu_stall(struct xe_device *xe,
753 struct drm_xe_device_query *query)
754{
755 void __user *query_ptr = u64_to_user_ptr(query->data);
756 struct drm_xe_query_eu_stall *info;
757 size_t size, array_size;
758 const u64 *rates;
759 u32 num_rates;
760 int ret;
761
762 if (!xe_eu_stall_supported_on_platform(xe))
763 return -ENODEV;
764
765 array_size = xe_eu_stall_get_sampling_rates(&num_rates, &rates);
766 size = sizeof(struct drm_xe_query_eu_stall) + array_size;
767
768 if (query->size == 0) {
769 query->size = size;
770 return 0;
771 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
772 return -EINVAL;
773 }
774
775 info = kzalloc(size, GFP_KERNEL);
776 if (!info)
777 return -ENOMEM;
778
779 info->num_sampling_rates = num_rates;
780 info->capabilities = DRM_XE_EU_STALL_CAPS_BASE;
781 info->record_size = xe_eu_stall_data_record_size(xe);
782 info->per_xecore_buf_size = xe_eu_stall_get_per_xecore_buf_size();
783 memcpy(info->sampling_rates, rates, array_size);
784
785 ret = copy_to_user(query_ptr, info, size);
786 kfree(info);
787
788 return ret ? -EFAULT : 0;
789}
790
791static int (* const xe_query_funcs[])(struct xe_device *xe,
792 struct drm_xe_device_query *query) = {
793 query_engines,
794 query_mem_regions,
795 query_config,
796 query_gt_list,
797 query_hwconfig,
798 query_gt_topology,
799 query_engine_cycles,
800 query_uc_fw_version,
801 query_oa_units,
802 query_pxp_status,
803 query_eu_stall,
804};
805
806int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
807{
808 struct xe_device *xe = to_xe_device(dev);
809 struct drm_xe_device_query *query = data;
810 u32 idx;
811
812 if (XE_IOCTL_DBG(xe, query->extensions) ||
813 XE_IOCTL_DBG(xe, query->reserved[0] || query->reserved[1]))
814 return -EINVAL;
815
816 if (XE_IOCTL_DBG(xe, query->query >= ARRAY_SIZE(xe_query_funcs)))
817 return -EINVAL;
818
819 idx = array_index_nospec(query->query, ARRAY_SIZE(xe_query_funcs));
820 if (XE_IOCTL_DBG(xe, !xe_query_funcs[idx]))
821 return -EINVAL;
822
823 return xe_query_funcs[idx](xe, query);
824}