| 1 |
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| 2 | |
| 3 | * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
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| 4 |
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| 5 |
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| 6 | #ifndef __IRIS_BUFFER_H__
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| 7 | #define __IRIS_BUFFER_H__
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| 8 |
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| 9 | #include <media/videobuf2-v4l2.h>
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| 10 |
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| 11 | struct iris_inst;
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| 12 |
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| 13 | #define to_iris_buffer(ptr) container_of(ptr, struct iris_buffer, vb2)
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| 14 |
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| 15 | |
| 16 | * enum iris_buffer_type
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| 17 | *
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| 18 | * @BUF_INPUT: input buffer to the iris hardware
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| 19 | * @BUF_OUTPUT: output buffer from the iris hardware
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| 20 | * @BUF_BIN: buffer to store intermediate bin data
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| 21 | * @BUF_ARP: buffer for auto register programming
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| 22 | * @BUF_COMV: buffer to store colocated motion vectors
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| 23 | * @BUF_NON_COMV: buffer to hold config data for HW
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| 24 | * @BUF_LINE: buffer to store decoding/encoding context data for HW
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| 25 | * @BUF_DPB: buffer to store display picture buffers for reference
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| 26 | * @BUF_PERSIST: buffer to store session context data
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| 27 | * @BUF_SCRATCH_1: buffer to store decoding/encoding context data for HW
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| 28 | * @BUF_SCRATCH_2: buffer to store encoding context data for HW
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| 29 | * @BUF_VPSS: buffer to store VPSS context data for HW
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| 30 | * @BUF_PARTIAL: buffer for AV1 IBC data
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| 31 | * @BUF_TYPE_MAX: max buffer types
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| 32 |
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| 33 | enum iris_buffer_type {
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| 34 | BUF_INPUT = 1,
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| 35 | BUF_OUTPUT,
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| 36 | BUF_BIN,
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| 37 | BUF_ARP,
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| 38 | BUF_COMV,
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| 39 | BUF_NON_COMV,
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| 40 | BUF_LINE,
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| 41 | BUF_DPB,
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| 42 | BUF_PERSIST,
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| 43 | BUF_SCRATCH_1,
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| 44 | BUF_SCRATCH_2,
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| 45 | BUF_VPSS,
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| 46 | BUF_PARTIAL,
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| 47 | BUF_TYPE_MAX,
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| 48 | };
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| 49 |
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| 50 | |
| 51 | * enum iris_buffer_attributes
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| 52 | *
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| 53 | * BUF_ATTR_DEFERRED: buffer queued by client but not submitted to firmware.
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| 54 | * BUF_ATTR_PENDING_RELEASE: buffers requested to be released from firmware.
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| 55 | * BUF_ATTR_QUEUED: buffers submitted to firmware.
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| 56 | * BUF_ATTR_DEQUEUED: buffers received from firmware.
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| 57 | * BUF_ATTR_BUFFER_DONE: buffers sent back to vb2.
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| 58 |
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| 59 | enum iris_buffer_attributes {
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| 60 | BUF_ATTR_DEFERRED = BIT(0),
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| 61 | BUF_ATTR_PENDING_RELEASE = BIT(1),
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| 62 | BUF_ATTR_QUEUED = BIT(2),
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| 63 | BUF_ATTR_DEQUEUED = BIT(3),
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| 64 | BUF_ATTR_BUFFER_DONE = BIT(4),
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| 65 | };
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| 66 |
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| 67 | |
| 68 | * struct iris_buffer
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| 69 | *
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| 70 | * @vb2: v4l2 vb2 buffer
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| 71 | * @list: list head for the iris_buffers structure
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| 72 | * @inst: iris instance structure
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| 73 | * @type: enum for type of iris buffer
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| 74 | * @index: identifier for the iris buffer
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| 75 | * @fd: file descriptor of the buffer
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| 76 | * @buffer_size: accessible buffer size in bytes starting from addr_offset
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| 77 | * @data_offset: accessible buffer offset from base address
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| 78 | * @data_size: data size in bytes
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| 79 | * @device_addr: device address of the buffer
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| 80 | * @kvaddr: kernel virtual address of the buffer
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| 81 | * @dma_attrs: dma attributes
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| 82 | * @flags: buffer flags. It is represented as bit masks.
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| 83 | * @timestamp: timestamp of the buffer in nano seconds (ns)
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| 84 | * @attr: enum for iris buffer attributes
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| 85 |
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| 86 | struct iris_buffer {
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| 87 | struct vb2_v4l2_buffer vb2;
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| 88 | struct list_head list;
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| 89 | struct iris_inst *inst;
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| 90 | enum iris_buffer_type type;
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| 91 | u32 index;
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| 92 | int fd;
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| 93 | size_t buffer_size;
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| 94 | u32 data_offset;
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| 95 | size_t data_size;
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| 96 | dma_addr_t device_addr;
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| 97 | void *kvaddr;
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| 98 | unsigned long dma_attrs;
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| 99 | u32 flags;
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| 100 | u64 timestamp;
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| 101 | enum iris_buffer_attributes attr;
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| 102 | };
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| 103 |
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| 104 | struct iris_buffers {
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| 105 | struct list_head list;
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| 106 | u32 min_count;
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| 107 | u32 size;
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| 108 | };
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| 109 |
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| 110 | int iris_get_buffer_size(struct iris_inst *inst, enum iris_buffer_type buffer_type);
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| 111 | void iris_get_internal_buffers(struct iris_inst *inst, u32 plane);
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| 112 | int iris_create_internal_buffers(struct iris_inst *inst, u32 plane);
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| 113 | int iris_queue_internal_buffers(struct iris_inst *inst, u32 plane);
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| 114 | int iris_queue_internal_deferred_buffers(struct iris_inst *inst, enum iris_buffer_type buffer_type);
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| 115 | void iris_destroy_internal_buffer(struct iris_inst *inst, struct iris_buffer *buffer);
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| 116 | int iris_destroy_all_internal_buffers(struct iris_inst *inst, u32 plane);
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| 117 | int iris_destroy_dequeued_internal_buffers(struct iris_inst *inst, u32 plane);
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| 118 | int iris_alloc_and_queue_persist_bufs(struct iris_inst *inst, enum iris_buffer_type buf_type);
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| 119 | int iris_alloc_and_queue_input_int_bufs(struct iris_inst *inst);
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| 120 | int iris_queue_buffer(struct iris_inst *inst, struct iris_buffer *buf);
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| 121 | int iris_queue_deferred_buffers(struct iris_inst *inst, enum iris_buffer_type buf_type);
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| 122 | int iris_vb2_buffer_done(struct iris_inst *inst, struct iris_buffer *buf);
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| 123 | void iris_vb2_queue_error(struct iris_inst *inst);
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| 124 |
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| 125 | #endif
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