| 1 | |
| 2 | |
| 3 | * drivers/net/phy/lxt.c
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| 4 | *
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| 5 | * Driver for Intel LXT PHYs
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| 6 | *
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| 7 | * Author: Andy Fleming
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| 8 | *
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| 9 | * Copyright (c) 2004 Freescale Semiconductor, Inc.
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| 10 |
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| 11 | #include <linux/kernel.h>
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| 12 | #include <linux/string.h>
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| 13 | #include <linux/errno.h>
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| 14 | #include <linux/unistd.h>
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| 15 | #include <linux/interrupt.h>
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| 16 | #include <linux/init.h>
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| 17 | #include <linux/delay.h>
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| 18 | #include <linux/netdevice.h>
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| 19 | #include <linux/etherdevice.h>
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| 20 | #include <linux/skbuff.h>
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| 21 | #include <linux/spinlock.h>
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| 22 | #include <linux/mm.h>
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| 23 | #include <linux/module.h>
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| 24 | #include <linux/mii.h>
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| 25 | #include <linux/ethtool.h>
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| 26 | #include <linux/phy.h>
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| 27 |
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| 28 | #include <asm/io.h>
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| 29 | #include <asm/irq.h>
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| 30 | #include <linux/uaccess.h>
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| 31 |
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| 32 |
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| 33 |
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| 34 | #define MII_LXT970_IER 17
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| 35 |
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| 36 | #define MII_LXT970_IER_IEN 0x0002
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| 37 |
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| 38 | #define MII_LXT970_ISR 18
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| 39 |
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| 40 | #define MII_LXT970_IRS_MINT BIT(15)
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| 41 |
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| 42 | #define MII_LXT970_CONFIG 19
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| 43 |
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| 44 |
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| 45 |
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| 46 |
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| 47 |
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| 48 | #define MII_LXT971_IER 18
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| 49 | #define MII_LXT971_IER_IEN 0x00f2
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| 50 |
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| 51 | #define MII_LXT971_ISR 19
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| 52 | #define MII_LXT971_ISR_MASK 0x00f0
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| 53 |
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| 54 |
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| 55 | #define MII_LXT973_PCR 16
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| 56 | #define PCR_FIBER_SELECT 1
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| 57 |
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| 58 | MODULE_DESCRIPTION("Intel LXT PHY driver");
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| 59 | MODULE_AUTHOR("Andy Fleming");
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| 60 | MODULE_LICENSE("GPL");
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| 61 |
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| 62 | static int lxt970_ack_interrupt(struct phy_device *phydev)
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| 63 | {
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| 64 | int err;
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| 65 |
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| 66 | err = phy_read(phydev, MII_BMSR);
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| 67 |
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| 68 | if (err < 0)
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| 69 | return err;
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| 70 |
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| 71 | err = phy_read(phydev, MII_LXT970_ISR);
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| 72 |
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| 73 | if (err < 0)
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| 74 | return err;
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| 75 |
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| 76 | return 0;
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| 77 | }
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| 78 |
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| 79 | static int lxt970_config_intr(struct phy_device *phydev)
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| 80 | {
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| 81 | int err;
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| 82 |
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| 83 | if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
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| 84 | err = lxt970_ack_interrupt(phydev);
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| 85 | if (err)
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| 86 | return err;
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| 87 |
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| 88 | err = phy_write(phydev, MII_LXT970_IER, MII_LXT970_IER_IEN);
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| 89 | } else {
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| 90 | err = phy_write(phydev, MII_LXT970_IER, 0);
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| 91 | if (err)
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| 92 | return err;
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| 93 |
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| 94 | err = lxt970_ack_interrupt(phydev);
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| 95 | }
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| 96 |
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| 97 | return err;
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| 98 | }
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| 99 |
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| 100 | static irqreturn_t lxt970_handle_interrupt(struct phy_device *phydev)
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| 101 | {
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| 102 | int irq_status;
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| 103 |
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| 104 | |
| 105 | * followed by MII_LXT970_ISR
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| 106 |
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| 107 | irq_status = phy_read(phydev, MII_BMSR);
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| 108 | if (irq_status < 0) {
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| 109 | phy_error(phydev);
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| 110 | return IRQ_NONE;
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| 111 | }
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| 112 |
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| 113 | irq_status = phy_read(phydev, MII_LXT970_ISR);
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| 114 | if (irq_status < 0) {
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| 115 | phy_error(phydev);
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| 116 | return IRQ_NONE;
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| 117 | }
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| 118 |
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| 119 | if (!(irq_status & MII_LXT970_IRS_MINT))
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| 120 | return IRQ_NONE;
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| 121 |
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| 122 | phy_trigger_machine(phydev);
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| 123 |
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| 124 | return IRQ_HANDLED;
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| 125 | }
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| 126 |
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| 127 | static int lxt970_config_init(struct phy_device *phydev)
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| 128 | {
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| 129 | return phy_write(phydev, MII_LXT970_CONFIG, 0);
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| 130 | }
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| 131 |
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| 132 |
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| 133 | static int lxt971_ack_interrupt(struct phy_device *phydev)
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| 134 | {
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| 135 | int err = phy_read(phydev, MII_LXT971_ISR);
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| 136 |
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| 137 | if (err < 0)
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| 138 | return err;
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| 139 |
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| 140 | return 0;
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| 141 | }
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| 142 |
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| 143 | static int lxt971_config_intr(struct phy_device *phydev)
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| 144 | {
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| 145 | int err;
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| 146 |
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| 147 | if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
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| 148 | err = lxt971_ack_interrupt(phydev);
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| 149 | if (err)
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| 150 | return err;
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| 151 |
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| 152 | err = phy_write(phydev, MII_LXT971_IER, MII_LXT971_IER_IEN);
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| 153 | } else {
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| 154 | err = phy_write(phydev, MII_LXT971_IER, 0);
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| 155 | if (err)
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| 156 | return err;
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| 157 |
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| 158 | err = lxt971_ack_interrupt(phydev);
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| 159 | }
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| 160 |
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| 161 | return err;
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| 162 | }
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| 163 |
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| 164 | static irqreturn_t lxt971_handle_interrupt(struct phy_device *phydev)
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| 165 | {
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| 166 | int irq_status;
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| 167 |
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| 168 | irq_status = phy_read(phydev, MII_LXT971_ISR);
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| 169 | if (irq_status < 0) {
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| 170 | phy_error(phydev);
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| 171 | return IRQ_NONE;
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| 172 | }
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| 173 |
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| 174 | if (!(irq_status & MII_LXT971_ISR_MASK))
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| 175 | return IRQ_NONE;
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| 176 |
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| 177 | phy_trigger_machine(phydev);
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| 178 |
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| 179 | return IRQ_HANDLED;
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| 180 | }
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| 181 |
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| 182 | |
| 183 | * A2 version of LXT973 chip has an ERRATA: it randomly return the contents
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| 184 | * of the previous even register when you read a odd register regularly
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| 185 |
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| 186 |
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| 187 | static int lxt973a2_update_link(struct phy_device *phydev)
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| 188 | {
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| 189 | int status;
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| 190 | int control;
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| 191 | int retry = 8;
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| 192 |
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| 193 |
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| 194 | status = phy_read(phydev, MII_BMSR);
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| 195 |
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| 196 | if (status < 0)
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| 197 | return status;
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| 198 |
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| 199 | control = phy_read(phydev, MII_BMCR);
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| 200 | if (control < 0)
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| 201 | return control;
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| 202 |
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| 203 | do {
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| 204 |
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| 205 | status = phy_read(phydev, MII_BMSR);
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| 206 | } while (status >= 0 && retry-- && status == control);
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| 207 |
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| 208 | if (status < 0)
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| 209 | return status;
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| 210 |
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| 211 | if ((status & BMSR_LSTATUS) == 0)
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| 212 | phydev->link = 0;
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| 213 | else
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| 214 | phydev->link = 1;
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| 215 |
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| 216 | return 0;
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| 217 | }
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| 218 |
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| 219 | static int lxt973a2_read_status(struct phy_device *phydev)
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| 220 | {
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| 221 | int adv;
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| 222 | int err;
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| 223 | int lpa;
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| 224 |
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| 225 |
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| 226 | err = lxt973a2_update_link(phydev);
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| 227 | if (err)
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| 228 | return err;
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| 229 |
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| 230 | if (AUTONEG_ENABLE == phydev->autoneg) {
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| 231 | int retry = 1;
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| 232 |
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| 233 | adv = phy_read(phydev, MII_ADVERTISE);
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| 234 |
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| 235 | if (adv < 0)
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| 236 | return adv;
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| 237 |
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| 238 | do {
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| 239 | lpa = phy_read(phydev, MII_LPA);
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| 240 |
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| 241 | if (lpa < 0)
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| 242 | return lpa;
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| 243 |
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| 244 | |
| 245 | * impossible, hence a new try
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| 246 |
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| 247 | } while (lpa == adv && retry--);
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| 248 |
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| 249 | mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa);
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| 250 |
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| 251 | lpa &= adv;
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| 252 |
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| 253 | phydev->speed = SPEED_10;
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| 254 | phydev->duplex = DUPLEX_HALF;
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| 255 | phydev->pause = phydev->asym_pause = 0;
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| 256 |
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| 257 | if (lpa & (LPA_100FULL | LPA_100HALF)) {
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| 258 | phydev->speed = SPEED_100;
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| 259 |
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| 260 | if (lpa & LPA_100FULL)
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| 261 | phydev->duplex = DUPLEX_FULL;
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| 262 | } else {
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| 263 | if (lpa & LPA_10FULL)
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| 264 | phydev->duplex = DUPLEX_FULL;
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| 265 | }
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| 266 |
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| 267 | phy_resolve_aneg_pause(phydev);
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| 268 | } else {
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| 269 | err = genphy_read_status_fixed(phydev);
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| 270 | if (err < 0)
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| 271 | return err;
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| 272 |
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| 273 | phydev->pause = phydev->asym_pause = 0;
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| 274 | linkmode_zero(phydev->lp_advertising);
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| 275 | }
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| 276 |
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| 277 | return 0;
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| 278 | }
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| 279 |
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| 280 | static int lxt973_probe(struct phy_device *phydev)
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| 281 | {
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| 282 | int val = phy_read(phydev, MII_LXT973_PCR);
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| 283 |
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| 284 | if (val & PCR_FIBER_SELECT) {
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| 285 | |
| 286 | * If fiber is selected, then the only correct setting
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| 287 | * is 100Mbps, full duplex, and auto negotiation off.
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| 288 |
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| 289 | val = phy_read(phydev, MII_BMCR);
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| 290 | val |= (BMCR_SPEED100 | BMCR_FULLDPLX);
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| 291 | val &= ~BMCR_ANENABLE;
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| 292 | phy_write(phydev, MII_BMCR, val);
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| 293 |
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| 294 | phydev->priv = lxt973_probe;
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| 295 | phydev->port = PORT_FIBRE;
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| 296 | } else {
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| 297 | phydev->priv = NULL;
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| 298 | }
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| 299 | return 0;
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| 300 | }
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| 301 |
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| 302 | static int lxt973_config_aneg(struct phy_device *phydev)
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| 303 | {
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| 304 |
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| 305 | return phydev->priv ? 0 : genphy_config_aneg(phydev);
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| 306 | }
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| 307 |
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| 308 | static struct phy_driver lxt97x_driver[] = {
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| 309 | {
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| 310 | .phy_id = 0x78100000,
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| 311 | .name = "LXT970",
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| 312 | .phy_id_mask = 0xfffffff0,
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| 313 |
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| 314 | .config_init = lxt970_config_init,
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| 315 | .config_intr = lxt970_config_intr,
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| 316 | .handle_interrupt = lxt970_handle_interrupt,
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| 317 | }, {
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| 318 | .phy_id = 0x001378e0,
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| 319 | .name = "LXT971",
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| 320 | .phy_id_mask = 0xfffffff0,
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| 321 |
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| 322 | .config_intr = lxt971_config_intr,
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| 323 | .handle_interrupt = lxt971_handle_interrupt,
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| 324 | .suspend = genphy_suspend,
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| 325 | .resume = genphy_resume,
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| 326 | }, {
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| 327 | .phy_id = 0x00137a10,
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| 328 | .name = "LXT973-A2",
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| 329 | .phy_id_mask = 0xffffffff,
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| 330 |
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| 331 | .flags = 0,
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| 332 | .probe = lxt973_probe,
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| 333 | .config_aneg = lxt973_config_aneg,
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| 334 | .read_status = lxt973a2_read_status,
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| 335 | .suspend = genphy_suspend,
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| 336 | .resume = genphy_resume,
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| 337 | }, {
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| 338 | .phy_id = 0x00137a10,
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| 339 | .name = "LXT973",
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| 340 | .phy_id_mask = 0xfffffff0,
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| 341 |
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| 342 | .flags = 0,
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| 343 | .probe = lxt973_probe,
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| 344 | .config_aneg = lxt973_config_aneg,
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| 345 | .suspend = genphy_suspend,
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| 346 | .resume = genphy_resume,
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| 347 | } };
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| 348 |
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| 349 | module_phy_driver(lxt97x_driver);
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| 350 |
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| 351 | static const struct mdio_device_id __maybe_unused lxt_tbl[] = {
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| 352 | { 0x78100000, 0xfffffff0 },
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| 353 | { 0x001378e0, 0xfffffff0 },
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| 354 | { 0x00137a10, 0xfffffff0 },
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| 355 | { }
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| 356 | };
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| 357 |
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| 358 | MODULE_DEVICE_TABLE(mdio, lxt_tbl);
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