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1// SPDX-License-Identifier: GPL-2.0+
2/* Copyright (C) 2021 Maxlinear Corporation
3 * Copyright (C) 2020 Intel Corporation
4 *
5 * Drivers for Maxlinear Ethernet GPY
6 *
7 */
8
9#include <linux/module.h>
10#include <linux/bitfield.h>
11#include <linux/hwmon.h>
12#include <linux/mutex.h>
13#include <linux/phy.h>
14#include <linux/polynomial.h>
15#include <linux/property.h>
16#include <linux/netdevice.h>
17
18/* PHY ID */
19#define PHY_ID_GPYx15B_MASK 0xFFFFFFFC
20#define PHY_ID_GPY21xB_MASK 0xFFFFFFF9
21#define PHY_ID_GPY2xx 0x67C9DC00
22#define PHY_ID_GPY115B 0x67C9DF00
23#define PHY_ID_GPY115C 0x67C9DF10
24#define PHY_ID_GPY211B 0x67C9DE08
25#define PHY_ID_GPY211C 0x67C9DE10
26#define PHY_ID_GPY212B 0x67C9DE09
27#define PHY_ID_GPY212C 0x67C9DE20
28#define PHY_ID_GPY215B 0x67C9DF04
29#define PHY_ID_GPY215C 0x67C9DF20
30#define PHY_ID_GPY241B 0x67C9DE40
31#define PHY_ID_GPY241BM 0x67C9DE80
32#define PHY_ID_GPY245B 0x67C9DEC0
33#define PHY_ID_MXL86211C 0xC1335400
34#define PHY_ID_MXL86252 0xC1335520
35#define PHY_ID_MXL86282 0xC1335500
36
37#define PHY_CTL1 0x13
38#define PHY_CTL1_MDICD BIT(3)
39#define PHY_CTL1_MDIAB BIT(2)
40#define PHY_CTL1_AMDIX BIT(0)
41#define PHY_ERRCNT 0x15 /* Error counter */
42#define PHY_MIISTAT 0x18 /* MII state */
43#define PHY_IMASK 0x19 /* interrupt mask */
44#define PHY_ISTAT 0x1A /* interrupt status */
45#define PHY_LED 0x1B /* LEDs */
46#define PHY_FWV 0x1E /* firmware version */
47
48#define PHY_ERRCNT_SEL GENMASK(11, 8)
49#define PHY_ERRCNT_COUNT GENMASK(7, 0)
50#define PHY_ERRCNT_SEL_RXERR 0
51
52#define PHY_MIISTAT_SPD_MASK GENMASK(2, 0)
53#define PHY_MIISTAT_DPX BIT(3)
54#define PHY_MIISTAT_LS BIT(10)
55
56#define PHY_MIISTAT_SPD_10 0
57#define PHY_MIISTAT_SPD_100 1
58#define PHY_MIISTAT_SPD_1000 2
59#define PHY_MIISTAT_SPD_2500 4
60
61#define PHY_IMASK_WOL BIT(15) /* Wake-on-LAN */
62#define PHY_IMASK_ANC BIT(10) /* Auto-Neg complete */
63#define PHY_IMASK_ADSC BIT(5) /* Link auto-downspeed detect */
64#define PHY_IMASK_DXMC BIT(2) /* Duplex mode change */
65#define PHY_IMASK_LSPC BIT(1) /* Link speed change */
66#define PHY_IMASK_LSTC BIT(0) /* Link state change */
67#define PHY_IMASK_MASK (PHY_IMASK_LSTC | \
68 PHY_IMASK_LSPC | \
69 PHY_IMASK_DXMC | \
70 PHY_IMASK_ADSC | \
71 PHY_IMASK_ANC)
72
73#define GPY_MAX_LEDS 4
74#define PHY_LED_POLARITY(idx) BIT(12 + (idx))
75#define PHY_LED_HWCONTROL(idx) BIT(8 + (idx))
76#define PHY_LED_ON(idx) BIT(idx)
77
78#define PHY_FWV_REL_MASK BIT(15)
79#define PHY_FWV_MAJOR_MASK GENMASK(11, 8)
80#define PHY_FWV_MINOR_MASK GENMASK(7, 0)
81
82#define PHY_PMA_MGBT_POLARITY 0x82
83#define PHY_MDI_MDI_X_MASK GENMASK(1, 0)
84#define PHY_MDI_MDI_X_NORMAL 0x3
85#define PHY_MDI_MDI_X_AB 0x2
86#define PHY_MDI_MDI_X_CD 0x1
87#define PHY_MDI_MDI_X_CROSS 0x0
88
89/* LED */
90#define VSPEC1_LED(idx) (1 + (idx))
91#define VSPEC1_LED_BLINKS GENMASK(15, 12)
92#define VSPEC1_LED_PULSE GENMASK(11, 8)
93#define VSPEC1_LED_CON GENMASK(7, 4)
94#define VSPEC1_LED_BLINKF GENMASK(3, 0)
95
96#define VSPEC1_LED_LINK10 BIT(0)
97#define VSPEC1_LED_LINK100 BIT(1)
98#define VSPEC1_LED_LINK1000 BIT(2)
99#define VSPEC1_LED_LINK2500 BIT(3)
100
101#define VSPEC1_LED_TXACT BIT(0)
102#define VSPEC1_LED_RXACT BIT(1)
103#define VSPEC1_LED_COL BIT(2)
104#define VSPEC1_LED_NO_CON BIT(3)
105
106/* SGMII */
107#define VSPEC1_SGMII_CTRL 0x08
108#define VSPEC1_SGMII_CTRL_ANEN BIT(12) /* Aneg enable */
109#define VSPEC1_SGMII_CTRL_ANRS BIT(9) /* Restart Aneg */
110#define VSPEC1_SGMII_ANEN_ANRS (VSPEC1_SGMII_CTRL_ANEN | \
111 VSPEC1_SGMII_CTRL_ANRS)
112
113/* Temperature sensor */
114#define VSPEC1_TEMP_STA 0x0E
115#define VSPEC1_TEMP_STA_DATA GENMASK(9, 0)
116
117/* Mailbox */
118#define VSPEC1_MBOX_DATA 0x5
119#define VSPEC1_MBOX_ADDRLO 0x6
120#define VSPEC1_MBOX_CMD 0x7
121#define VSPEC1_MBOX_CMD_ADDRHI GENMASK(7, 0)
122#define VSPEC1_MBOX_CMD_RD (0 << 8)
123#define VSPEC1_MBOX_CMD_READY BIT(15)
124
125/* WoL */
126#define VPSPEC2_WOL_CTL 0x0E06
127#define VPSPEC2_WOL_AD01 0x0E08
128#define VPSPEC2_WOL_AD23 0x0E09
129#define VPSPEC2_WOL_AD45 0x0E0A
130#define WOL_EN BIT(0)
131
132/* Internal registers, access via mbox */
133#define REG_GPIO0_OUT 0xd3ce00
134
135struct gpy_priv {
136 /* serialize mailbox acesses */
137 struct mutex mbox_lock;
138
139 u8 fw_major;
140 u8 fw_minor;
141 u32 wolopts;
142 u64 rx_errors;
143
144 /* It takes 3 seconds to fully switch out of loopback mode before
145 * it can safely re-enter loopback mode. Record the time when
146 * loopback is disabled. Check and wait if necessary before loopback
147 * is enabled.
148 */
149 u64 lb_dis_to;
150};
151
152static const struct {
153 int major;
154 int minor;
155} ver_need_sgmii_reaneg[] = {
156 {7, 0x6D},
157 {8, 0x6D},
158 {9, 0x73},
159};
160
161#if IS_ENABLED(CONFIG_HWMON)
162/* The original translation formulae of the temperature (in degrees of Celsius)
163 * are as follows:
164 *
165 * T = -2.5761e-11*(N^4) + 9.7332e-8*(N^3) + -1.9165e-4*(N^2) +
166 * 3.0762e-1*(N^1) + -5.2156e1
167 *
168 * where [-52.156, 137.961]C and N = [0, 1023].
169 *
170 * They must be accordingly altered to be suitable for the integer arithmetics.
171 * The technique is called 'factor redistribution', which just makes sure the
172 * multiplications and divisions are made so to have a result of the operations
173 * within the integer numbers limit. In addition we need to translate the
174 * formulae to accept millidegrees of Celsius. Here what it looks like after
175 * the alterations:
176 *
177 * T = -25761e-12*(N^4) + 97332e-9*(N^3) + -191650e-6*(N^2) +
178 * 307620e-3*(N^1) + -52156
179 *
180 * where T = [-52156, 137961]mC and N = [0, 1023].
181 */
182static const struct polynomial poly_N_to_temp = {
183 .terms = {
184 {4, -25761, 1000, 1},
185 {3, 97332, 1000, 1},
186 {2, -191650, 1000, 1},
187 {1, 307620, 1000, 1},
188 {0, -52156, 1, 1}
189 }
190};
191
192static int gpy_hwmon_read(struct device *dev,
193 enum hwmon_sensor_types type,
194 u32 attr, int channel, long *value)
195{
196 struct phy_device *phydev = dev_get_drvdata(dev);
197 int ret;
198
199 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_TEMP_STA);
200 if (ret < 0)
201 return ret;
202 if (!ret)
203 return -ENODATA;
204
205 *value = polynomial_calc(&poly_N_to_temp,
206 FIELD_GET(VSPEC1_TEMP_STA_DATA, ret));
207
208 return 0;
209}
210
211static int mxl862x2_hwmon_read(struct device *dev,
212 enum hwmon_sensor_types type,
213 u32 attr, int channel, long *value)
214{
215 struct phy_device *phydev = dev_get_drvdata(dev);
216 long tmp;
217 int ret;
218
219 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_TEMP_STA);
220 if (ret < 0)
221 return ret;
222 if (!ret)
223 return -ENODATA;
224
225 tmp = (s16)ret;
226 tmp *= 78125;
227 tmp /= 10000;
228
229 *value = tmp;
230
231 return 0;
232}
233
234static umode_t gpy_hwmon_is_visible(const void *data,
235 enum hwmon_sensor_types type,
236 u32 attr, int channel)
237{
238 return 0444;
239}
240
241static const struct hwmon_channel_info * const gpy_hwmon_info[] = {
242 HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
243 NULL
244};
245
246static const struct hwmon_ops gpy_hwmon_hwmon_ops = {
247 .is_visible = gpy_hwmon_is_visible,
248 .read = gpy_hwmon_read,
249};
250
251static const struct hwmon_ops mxl862x2_hwmon_hwmon_ops = {
252 .is_visible = gpy_hwmon_is_visible,
253 .read = mxl862x2_hwmon_read,
254};
255
256static const struct hwmon_chip_info gpy_hwmon_chip_info = {
257 .ops = &gpy_hwmon_hwmon_ops,
258 .info = gpy_hwmon_info,
259};
260
261static const struct hwmon_chip_info mxl862x2_hwmon_chip_info = {
262 .ops = &mxl862x2_hwmon_hwmon_ops,
263 .info = gpy_hwmon_info,
264};
265
266static int gpy_hwmon_register(struct phy_device *phydev)
267{
268 struct device *dev = &phydev->mdio.dev;
269 const struct hwmon_chip_info *info;
270 struct device *hwmon_dev;
271
272 if (phy_id_compare_model(phydev->phy_id, PHY_ID_MXL86252) ||
273 phy_id_compare_model(phydev->phy_id, PHY_ID_MXL86282))
274 info = &mxl862x2_hwmon_chip_info;
275 else
276 info = &gpy_hwmon_chip_info;
277
278 hwmon_dev = devm_hwmon_device_register_with_info(dev, NULL, phydev,
279 info, NULL);
280
281 return PTR_ERR_OR_ZERO(hwmon_dev);
282}
283#else
284static int gpy_hwmon_register(struct phy_device *phydev)
285{
286 return 0;
287}
288#endif
289
290static int gpy_ack_interrupt(struct phy_device *phydev)
291{
292 int ret;
293
294 /* Clear all pending interrupts */
295 ret = phy_read(phydev, PHY_ISTAT);
296 return ret < 0 ? ret : 0;
297}
298
299static int gpy_mbox_read(struct phy_device *phydev, u32 addr)
300{
301 struct gpy_priv *priv = phydev->priv;
302 int val, ret;
303 u16 cmd;
304
305 mutex_lock(&priv->mbox_lock);
306
307 ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_MBOX_ADDRLO,
308 addr);
309 if (ret)
310 goto out;
311
312 cmd = VSPEC1_MBOX_CMD_RD;
313 cmd |= FIELD_PREP(VSPEC1_MBOX_CMD_ADDRHI, addr >> 16);
314
315 ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_MBOX_CMD, cmd);
316 if (ret)
317 goto out;
318
319 /* The mbox read is used in the interrupt workaround. It was observed
320 * that a read might take up to 2.5ms. This is also the time for which
321 * the interrupt line is stuck low. To be on the safe side, poll the
322 * ready bit for 10ms.
323 */
324 ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
325 VSPEC1_MBOX_CMD, val,
326 (val & VSPEC1_MBOX_CMD_READY),
327 500, 10000, false);
328 if (ret)
329 goto out;
330
331 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_MBOX_DATA);
332
333out:
334 mutex_unlock(&priv->mbox_lock);
335 return ret;
336}
337
338static int gpy_config_init(struct phy_device *phydev)
339{
340 /* Count MDI RX errors (SymbolErrorDuringCarrier) */
341 return phy_write(phydev, PHY_ERRCNT,
342 FIELD_PREP(PHY_ERRCNT_SEL, PHY_ERRCNT_SEL_RXERR));
343}
344
345static int gpy21x_config_init(struct phy_device *phydev)
346{
347 __set_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces);
348 __set_bit(PHY_INTERFACE_MODE_SGMII, phydev->possible_interfaces);
349
350 return gpy_config_init(phydev);
351}
352
353static int gpy_probe(struct phy_device *phydev)
354{
355 struct device *dev = &phydev->mdio.dev;
356 struct gpy_priv *priv;
357 int fw_version;
358 int ret;
359
360 if (!phydev->is_c45) {
361 ret = phy_get_c45_ids(phydev);
362 if (ret < 0)
363 return ret;
364 }
365
366 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
367 if (!priv)
368 return -ENOMEM;
369 phydev->priv = priv;
370 mutex_init(&priv->mbox_lock);
371
372 if (!device_property_present(dev, "maxlinear,use-broken-interrupts"))
373 phydev->dev_flags |= PHY_F_NO_IRQ;
374
375 fw_version = phy_read(phydev, PHY_FWV);
376 if (fw_version < 0)
377 return fw_version;
378 priv->fw_major = FIELD_GET(PHY_FWV_MAJOR_MASK, fw_version);
379 priv->fw_minor = FIELD_GET(PHY_FWV_MINOR_MASK, fw_version);
380
381 ret = gpy_hwmon_register(phydev);
382 if (ret)
383 return ret;
384
385 /* Show GPY PHY FW version in dmesg */
386 phydev_info(phydev, "Firmware Version: %d.%d (0x%04X%s)\n",
387 priv->fw_major, priv->fw_minor, fw_version,
388 fw_version & PHY_FWV_REL_MASK ? "" : " test version");
389
390 return 0;
391}
392
393static bool gpy_sgmii_need_reaneg(struct phy_device *phydev)
394{
395 struct gpy_priv *priv = phydev->priv;
396 size_t i;
397
398 for (i = 0; i < ARRAY_SIZE(ver_need_sgmii_reaneg); i++) {
399 if (priv->fw_major != ver_need_sgmii_reaneg[i].major)
400 continue;
401 if (priv->fw_minor < ver_need_sgmii_reaneg[i].minor)
402 return true;
403 break;
404 }
405
406 return false;
407}
408
409static bool gpy_2500basex_chk(struct phy_device *phydev)
410{
411 int ret;
412
413 ret = phy_read(phydev, PHY_MIISTAT);
414 if (ret < 0) {
415 phydev_err(phydev, "Error: MDIO register access failed: %d\n",
416 ret);
417 return false;
418 }
419
420 if (!(ret & PHY_MIISTAT_LS) ||
421 FIELD_GET(PHY_MIISTAT_SPD_MASK, ret) != PHY_MIISTAT_SPD_2500)
422 return false;
423
424 phydev->speed = SPEED_2500;
425 phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
426 phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
427 VSPEC1_SGMII_CTRL_ANEN, 0);
428 return true;
429}
430
431static bool gpy_sgmii_aneg_en(struct phy_device *phydev)
432{
433 int ret;
434
435 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL);
436 if (ret < 0) {
437 phydev_err(phydev, "Error: MMD register access failed: %d\n",
438 ret);
439 return true;
440 }
441
442 return (ret & VSPEC1_SGMII_CTRL_ANEN) ? true : false;
443}
444
445static int gpy_config_mdix(struct phy_device *phydev, u8 ctrl)
446{
447 int ret;
448 u16 val;
449
450 switch (ctrl) {
451 case ETH_TP_MDI_AUTO:
452 val = PHY_CTL1_AMDIX;
453 break;
454 case ETH_TP_MDI_X:
455 val = (PHY_CTL1_MDIAB | PHY_CTL1_MDICD);
456 break;
457 case ETH_TP_MDI:
458 val = 0;
459 break;
460 default:
461 return 0;
462 }
463
464 ret = phy_modify(phydev, PHY_CTL1, PHY_CTL1_AMDIX | PHY_CTL1_MDIAB |
465 PHY_CTL1_MDICD, val);
466 if (ret < 0)
467 return ret;
468
469 return genphy_c45_restart_aneg(phydev);
470}
471
472static int gpy_config_aneg(struct phy_device *phydev)
473{
474 bool changed = false;
475 u32 adv;
476 int ret;
477
478 if (phydev->autoneg == AUTONEG_DISABLE) {
479 /* Configure half duplex with genphy_setup_forced,
480 * because genphy_c45_pma_setup_forced does not support.
481 */
482 return phydev->duplex != DUPLEX_FULL
483 ? genphy_setup_forced(phydev)
484 : genphy_c45_pma_setup_forced(phydev);
485 }
486
487 ret = gpy_config_mdix(phydev, phydev->mdix_ctrl);
488 if (ret < 0)
489 return ret;
490
491 ret = genphy_c45_an_config_aneg(phydev);
492 if (ret < 0)
493 return ret;
494 if (ret > 0)
495 changed = true;
496
497 adv = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
498 ret = phy_modify_changed(phydev, MII_CTRL1000,
499 ADVERTISE_1000FULL | ADVERTISE_1000HALF,
500 adv);
501 if (ret < 0)
502 return ret;
503 if (ret > 0)
504 changed = true;
505
506 ret = genphy_c45_check_and_restart_aneg(phydev, changed);
507 if (ret < 0)
508 return ret;
509
510 if (phydev->interface == PHY_INTERFACE_MODE_USXGMII ||
511 phydev->interface == PHY_INTERFACE_MODE_INTERNAL)
512 return 0;
513
514 /* No need to trigger re-ANEG if link speed is 2.5G or SGMII ANEG is
515 * disabled.
516 */
517 if (!gpy_sgmii_need_reaneg(phydev) || gpy_2500basex_chk(phydev) ||
518 !gpy_sgmii_aneg_en(phydev))
519 return 0;
520
521 /* There is a design constraint in GPY2xx device where SGMII AN is
522 * only triggered when there is change of speed. If, PHY link
523 * partner`s speed is still same even after PHY TPI is down and up
524 * again, SGMII AN is not triggered and hence no new in-band message
525 * from GPY to MAC side SGMII.
526 * This could cause an issue during power up, when PHY is up prior to
527 * MAC. At this condition, once MAC side SGMII is up, MAC side SGMII
528 * wouldn`t receive new in-band message from GPY with correct link
529 * status, speed and duplex info.
530 *
531 * 1) If PHY is already up and TPI link status is still down (such as
532 * hard reboot), TPI link status is polled for 4 seconds before
533 * retriggerring SGMII AN.
534 * 2) If PHY is already up and TPI link status is also up (such as soft
535 * reboot), polling of TPI link status is not needed and SGMII AN is
536 * immediately retriggered.
537 * 3) Other conditions such as PHY is down, speed change etc, skip
538 * retriggering SGMII AN. Note: in case of speed change, GPY FW will
539 * initiate SGMII AN.
540 */
541
542 if (phydev->state != PHY_UP)
543 return 0;
544
545 ret = phy_read_poll_timeout(phydev, MII_BMSR, ret, ret & BMSR_LSTATUS,
546 20000, 4000000, false);
547 if (ret == -ETIMEDOUT)
548 return 0;
549 else if (ret < 0)
550 return ret;
551
552 /* Trigger SGMII AN. */
553 return phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
554 VSPEC1_SGMII_CTRL_ANRS, VSPEC1_SGMII_CTRL_ANRS);
555}
556
557static int gpy_update_mdix(struct phy_device *phydev)
558{
559 int ret;
560
561 ret = phy_read(phydev, PHY_CTL1);
562 if (ret < 0)
563 return ret;
564
565 if (ret & PHY_CTL1_AMDIX)
566 phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
567 else
568 if (ret & PHY_CTL1_MDICD || ret & PHY_CTL1_MDIAB)
569 phydev->mdix_ctrl = ETH_TP_MDI_X;
570 else
571 phydev->mdix_ctrl = ETH_TP_MDI;
572
573 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PHY_PMA_MGBT_POLARITY);
574 if (ret < 0)
575 return ret;
576
577 if ((ret & PHY_MDI_MDI_X_MASK) < PHY_MDI_MDI_X_NORMAL)
578 phydev->mdix = ETH_TP_MDI_X;
579 else
580 phydev->mdix = ETH_TP_MDI;
581
582 return 0;
583}
584
585static int gpy_update_interface(struct phy_device *phydev)
586{
587 int ret;
588
589 /* Interface mode is fixed for USXGMII and integrated PHY */
590 if (phydev->interface == PHY_INTERFACE_MODE_USXGMII ||
591 phydev->interface == PHY_INTERFACE_MODE_INTERNAL)
592 return 0;
593
594 /* Automatically switch SERDES interface between SGMII and 2500-BaseX
595 * according to speed. Disable ANEG in 2500-BaseX mode.
596 */
597 switch (phydev->speed) {
598 case SPEED_2500:
599 phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
600 ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
601 VSPEC1_SGMII_CTRL_ANEN, 0);
602 if (ret < 0) {
603 phydev_err(phydev,
604 "Error: Disable of SGMII ANEG failed: %d\n",
605 ret);
606 return ret;
607 }
608 break;
609 case SPEED_1000:
610 case SPEED_100:
611 case SPEED_10:
612 phydev->interface = PHY_INTERFACE_MODE_SGMII;
613 break;
614 }
615
616 return 0;
617}
618
619static int gpy_read_status(struct phy_device *phydev)
620{
621 int ret;
622
623 ret = genphy_update_link(phydev);
624 if (ret)
625 return ret;
626
627 phydev->speed = SPEED_UNKNOWN;
628 phydev->duplex = DUPLEX_UNKNOWN;
629 phydev->pause = 0;
630 phydev->asym_pause = 0;
631
632 if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) {
633 ret = genphy_c45_read_lpa(phydev);
634 if (ret < 0)
635 return ret;
636
637 /* Read the link partner's 1G advertisement */
638 ret = phy_read(phydev, MII_STAT1000);
639 if (ret < 0)
640 return ret;
641 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, ret);
642 } else if (phydev->autoneg == AUTONEG_DISABLE) {
643 linkmode_zero(phydev->lp_advertising);
644 }
645
646 ret = phy_read(phydev, PHY_MIISTAT);
647 if (ret < 0)
648 return ret;
649
650 phydev->link = (ret & PHY_MIISTAT_LS) ? 1 : 0;
651 phydev->duplex = (ret & PHY_MIISTAT_DPX) ? DUPLEX_FULL : DUPLEX_HALF;
652 switch (FIELD_GET(PHY_MIISTAT_SPD_MASK, ret)) {
653 case PHY_MIISTAT_SPD_10:
654 phydev->speed = SPEED_10;
655 break;
656 case PHY_MIISTAT_SPD_100:
657 phydev->speed = SPEED_100;
658 break;
659 case PHY_MIISTAT_SPD_1000:
660 phydev->speed = SPEED_1000;
661 break;
662 case PHY_MIISTAT_SPD_2500:
663 phydev->speed = SPEED_2500;
664 break;
665 }
666
667 if (phydev->link) {
668 ret = gpy_update_interface(phydev);
669 if (ret < 0)
670 return ret;
671
672 if (phydev->speed == SPEED_2500 || phydev->speed == SPEED_1000) {
673 ret = genphy_read_master_slave(phydev);
674 if (ret < 0)
675 return ret;
676 }
677
678 ret = gpy_update_mdix(phydev);
679 if (ret < 0)
680 return ret;
681 }
682
683 return 0;
684}
685
686static int gpy_config_intr(struct phy_device *phydev)
687{
688 struct gpy_priv *priv = phydev->priv;
689 u16 mask = 0;
690 int ret;
691
692 ret = gpy_ack_interrupt(phydev);
693 if (ret)
694 return ret;
695
696 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
697 mask = PHY_IMASK_MASK;
698
699 if (priv->wolopts & WAKE_MAGIC)
700 mask |= PHY_IMASK_WOL;
701
702 if (priv->wolopts & WAKE_PHY)
703 mask |= PHY_IMASK_LSTC;
704
705 return phy_write(phydev, PHY_IMASK, mask);
706}
707
708static irqreturn_t gpy_handle_interrupt(struct phy_device *phydev)
709{
710 int reg;
711
712 reg = phy_read(phydev, PHY_ISTAT);
713 if (reg < 0) {
714 phy_error(phydev);
715 return IRQ_NONE;
716 }
717
718 if (!(reg & PHY_IMASK_MASK))
719 return IRQ_NONE;
720
721 /* The PHY might leave the interrupt line asserted even after PHY_ISTAT
722 * is read. To avoid interrupt storms, delay the interrupt handling as
723 * long as the PHY drives the interrupt line. An internal bus read will
724 * stall as long as the interrupt line is asserted, thus just read a
725 * random register here.
726 * Because we cannot access the internal bus at all while the interrupt
727 * is driven by the PHY, there is no way to make the interrupt line
728 * unstuck (e.g. by changing the pinmux to GPIO input) during that time
729 * frame. Therefore, polling is the best we can do and won't do any more
730 * harm.
731 * It was observed that this bug happens on link state and link speed
732 * changes independent of the firmware version.
733 */
734 if (reg & (PHY_IMASK_LSTC | PHY_IMASK_LSPC)) {
735 reg = gpy_mbox_read(phydev, REG_GPIO0_OUT);
736 if (reg < 0) {
737 phy_error(phydev);
738 return IRQ_NONE;
739 }
740 }
741
742 phy_trigger_machine(phydev);
743
744 return IRQ_HANDLED;
745}
746
747static int gpy_set_wol(struct phy_device *phydev,
748 struct ethtool_wolinfo *wol)
749{
750 struct net_device *attach_dev = phydev->attached_dev;
751 struct gpy_priv *priv = phydev->priv;
752 int ret;
753
754 if (wol->wolopts & WAKE_MAGIC) {
755 /* MAC address - Byte0:Byte1:Byte2:Byte3:Byte4:Byte5
756 * VPSPEC2_WOL_AD45 = Byte0:Byte1
757 * VPSPEC2_WOL_AD23 = Byte2:Byte3
758 * VPSPEC2_WOL_AD01 = Byte4:Byte5
759 */
760 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2,
761 VPSPEC2_WOL_AD45,
762 ((attach_dev->dev_addr[0] << 8) |
763 attach_dev->dev_addr[1]));
764 if (ret < 0)
765 return ret;
766
767 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2,
768 VPSPEC2_WOL_AD23,
769 ((attach_dev->dev_addr[2] << 8) |
770 attach_dev->dev_addr[3]));
771 if (ret < 0)
772 return ret;
773
774 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2,
775 VPSPEC2_WOL_AD01,
776 ((attach_dev->dev_addr[4] << 8) |
777 attach_dev->dev_addr[5]));
778 if (ret < 0)
779 return ret;
780
781 /* Enable the WOL interrupt */
782 ret = phy_write(phydev, PHY_IMASK, PHY_IMASK_WOL);
783 if (ret < 0)
784 return ret;
785
786 /* Enable magic packet matching */
787 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2,
788 VPSPEC2_WOL_CTL,
789 WOL_EN);
790 if (ret < 0)
791 return ret;
792
793 /* Clear the interrupt status register.
794 * Only WoL is enabled so clear all.
795 */
796 ret = phy_read(phydev, PHY_ISTAT);
797 if (ret < 0)
798 return ret;
799
800 priv->wolopts |= WAKE_MAGIC;
801 } else {
802 /* Disable magic packet matching */
803 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2,
804 VPSPEC2_WOL_CTL,
805 WOL_EN);
806 if (ret < 0)
807 return ret;
808
809 /* Disable the WOL interrupt */
810 ret = phy_clear_bits(phydev, PHY_IMASK, PHY_IMASK_WOL);
811 if (ret < 0)
812 return ret;
813
814 priv->wolopts &= ~WAKE_MAGIC;
815 }
816
817 if (wol->wolopts & WAKE_PHY) {
818 /* Enable the link state change interrupt */
819 ret = phy_set_bits(phydev, PHY_IMASK, PHY_IMASK_LSTC);
820 if (ret < 0)
821 return ret;
822
823 /* Clear the interrupt status register */
824 ret = phy_read(phydev, PHY_ISTAT);
825 if (ret < 0)
826 return ret;
827
828 if (ret & (PHY_IMASK_MASK & ~PHY_IMASK_LSTC))
829 phy_trigger_machine(phydev);
830
831 priv->wolopts |= WAKE_PHY;
832 return 0;
833 }
834
835 priv->wolopts &= ~WAKE_PHY;
836 /* Disable the link state change interrupt */
837 return phy_clear_bits(phydev, PHY_IMASK, PHY_IMASK_LSTC);
838}
839
840static void gpy_get_wol(struct phy_device *phydev,
841 struct ethtool_wolinfo *wol)
842{
843 struct gpy_priv *priv = phydev->priv;
844
845 wol->supported = WAKE_MAGIC | WAKE_PHY;
846 wol->wolopts = priv->wolopts;
847}
848
849static int gpy_loopback(struct phy_device *phydev, bool enable, int speed)
850{
851 struct gpy_priv *priv = phydev->priv;
852 u16 set = 0;
853 int ret;
854
855 if (enable) {
856 u64 now = get_jiffies_64();
857
858 if (speed)
859 return -EOPNOTSUPP;
860
861 /* wait until 3 seconds from last disable */
862 if (time_before64(now, priv->lb_dis_to))
863 msleep(jiffies64_to_msecs(priv->lb_dis_to - now));
864
865 set = BMCR_LOOPBACK;
866 }
867
868 ret = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, set);
869 if (ret <= 0)
870 return ret;
871
872 if (enable) {
873 /* It takes some time for PHY device to switch into
874 * loopback mode.
875 */
876 msleep(100);
877 } else {
878 priv->lb_dis_to = get_jiffies_64() + HZ * 3;
879 }
880
881 return 0;
882}
883
884static int gpy115_loopback(struct phy_device *phydev, bool enable, int speed)
885{
886 struct gpy_priv *priv = phydev->priv;
887
888 if (enable)
889 return gpy_loopback(phydev, enable, speed);
890
891 if (priv->fw_minor > 0x76)
892 return gpy_loopback(phydev, 0, 0);
893
894 return genphy_soft_reset(phydev);
895}
896
897static int gpy_led_brightness_set(struct phy_device *phydev,
898 u8 index, enum led_brightness value)
899{
900 int ret;
901
902 if (index >= GPY_MAX_LEDS)
903 return -EINVAL;
904
905 /* clear HWCONTROL and set manual LED state */
906 ret = phy_modify(phydev, PHY_LED,
907 ((value == LED_OFF) ? PHY_LED_HWCONTROL(index) : 0) |
908 PHY_LED_ON(index),
909 (value == LED_OFF) ? 0 : PHY_LED_ON(index));
910 if (ret)
911 return ret;
912
913 /* ToDo: set PWM brightness */
914
915 /* clear HW LED setup */
916 if (value == LED_OFF)
917 return phy_write_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_LED(index), 0);
918 else
919 return 0;
920}
921
922static const unsigned long supported_triggers = (BIT(TRIGGER_NETDEV_LINK) |
923 BIT(TRIGGER_NETDEV_LINK_10) |
924 BIT(TRIGGER_NETDEV_LINK_100) |
925 BIT(TRIGGER_NETDEV_LINK_1000) |
926 BIT(TRIGGER_NETDEV_LINK_2500) |
927 BIT(TRIGGER_NETDEV_RX) |
928 BIT(TRIGGER_NETDEV_TX));
929
930static int gpy_led_hw_is_supported(struct phy_device *phydev, u8 index,
931 unsigned long rules)
932{
933 if (index >= GPY_MAX_LEDS)
934 return -EINVAL;
935
936 /* All combinations of the supported triggers are allowed */
937 if (rules & ~supported_triggers)
938 return -EOPNOTSUPP;
939
940 return 0;
941}
942
943static int gpy_led_hw_control_get(struct phy_device *phydev, u8 index,
944 unsigned long *rules)
945{
946 int val;
947
948 if (index >= GPY_MAX_LEDS)
949 return -EINVAL;
950
951 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_LED(index));
952 if (val < 0)
953 return val;
954
955 if (FIELD_GET(VSPEC1_LED_CON, val) & VSPEC1_LED_LINK10)
956 *rules |= BIT(TRIGGER_NETDEV_LINK_10);
957
958 if (FIELD_GET(VSPEC1_LED_CON, val) & VSPEC1_LED_LINK100)
959 *rules |= BIT(TRIGGER_NETDEV_LINK_100);
960
961 if (FIELD_GET(VSPEC1_LED_CON, val) & VSPEC1_LED_LINK1000)
962 *rules |= BIT(TRIGGER_NETDEV_LINK_1000);
963
964 if (FIELD_GET(VSPEC1_LED_CON, val) & VSPEC1_LED_LINK2500)
965 *rules |= BIT(TRIGGER_NETDEV_LINK_2500);
966
967 if (FIELD_GET(VSPEC1_LED_CON, val) == (VSPEC1_LED_LINK10 |
968 VSPEC1_LED_LINK100 |
969 VSPEC1_LED_LINK1000 |
970 VSPEC1_LED_LINK2500))
971 *rules |= BIT(TRIGGER_NETDEV_LINK);
972
973 if (FIELD_GET(VSPEC1_LED_PULSE, val) & VSPEC1_LED_TXACT)
974 *rules |= BIT(TRIGGER_NETDEV_TX);
975
976 if (FIELD_GET(VSPEC1_LED_PULSE, val) & VSPEC1_LED_RXACT)
977 *rules |= BIT(TRIGGER_NETDEV_RX);
978
979 return 0;
980}
981
982static int gpy_led_hw_control_set(struct phy_device *phydev, u8 index,
983 unsigned long rules)
984{
985 u16 val = 0;
986 int ret;
987
988 if (index >= GPY_MAX_LEDS)
989 return -EINVAL;
990
991 if (rules & BIT(TRIGGER_NETDEV_LINK) ||
992 rules & BIT(TRIGGER_NETDEV_LINK_10))
993 val |= FIELD_PREP(VSPEC1_LED_CON, VSPEC1_LED_LINK10);
994
995 if (rules & BIT(TRIGGER_NETDEV_LINK) ||
996 rules & BIT(TRIGGER_NETDEV_LINK_100))
997 val |= FIELD_PREP(VSPEC1_LED_CON, VSPEC1_LED_LINK100);
998
999 if (rules & BIT(TRIGGER_NETDEV_LINK) ||
1000 rules & BIT(TRIGGER_NETDEV_LINK_1000))
1001 val |= FIELD_PREP(VSPEC1_LED_CON, VSPEC1_LED_LINK1000);
1002
1003 if (rules & BIT(TRIGGER_NETDEV_LINK) ||
1004 rules & BIT(TRIGGER_NETDEV_LINK_2500))
1005 val |= FIELD_PREP(VSPEC1_LED_CON, VSPEC1_LED_LINK2500);
1006
1007 if (rules & BIT(TRIGGER_NETDEV_TX))
1008 val |= FIELD_PREP(VSPEC1_LED_PULSE, VSPEC1_LED_TXACT);
1009
1010 if (rules & BIT(TRIGGER_NETDEV_RX))
1011 val |= FIELD_PREP(VSPEC1_LED_PULSE, VSPEC1_LED_RXACT);
1012
1013 /* allow RX/TX pulse without link indication */
1014 if ((rules & BIT(TRIGGER_NETDEV_TX) || rules & BIT(TRIGGER_NETDEV_RX)) &&
1015 !(val & VSPEC1_LED_CON))
1016 val |= FIELD_PREP(VSPEC1_LED_PULSE, VSPEC1_LED_NO_CON) | VSPEC1_LED_CON;
1017
1018 ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_LED(index), val);
1019 if (ret)
1020 return ret;
1021
1022 return phy_set_bits(phydev, PHY_LED, PHY_LED_HWCONTROL(index));
1023}
1024
1025static int gpy_led_polarity_set(struct phy_device *phydev, int index,
1026 unsigned long modes)
1027{
1028 bool force_active_low = false, force_active_high = false;
1029 u32 mode;
1030
1031 if (index >= GPY_MAX_LEDS)
1032 return -EINVAL;
1033
1034 for_each_set_bit(mode, &modes, __PHY_LED_MODES_NUM) {
1035 switch (mode) {
1036 case PHY_LED_ACTIVE_LOW:
1037 force_active_low = true;
1038 break;
1039 case PHY_LED_ACTIVE_HIGH:
1040 force_active_high = true;
1041 break;
1042 default:
1043 return -EINVAL;
1044 }
1045 }
1046
1047 if (force_active_low)
1048 return phy_set_bits(phydev, PHY_LED, PHY_LED_POLARITY(index));
1049
1050 if (force_active_high)
1051 return phy_clear_bits(phydev, PHY_LED, PHY_LED_POLARITY(index));
1052
1053 return -EINVAL;
1054}
1055
1056static unsigned int gpy_inband_caps(struct phy_device *phydev,
1057 phy_interface_t interface)
1058{
1059 switch (interface) {
1060 case PHY_INTERFACE_MODE_SGMII:
1061 return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
1062 case PHY_INTERFACE_MODE_2500BASEX:
1063 return LINK_INBAND_DISABLE;
1064 default:
1065 return 0;
1066 }
1067}
1068
1069static int gpy_config_inband(struct phy_device *phydev, unsigned int modes)
1070{
1071 return phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
1072 VSPEC1_SGMII_ANEN_ANRS,
1073 (modes == LINK_INBAND_DISABLE) ? 0 :
1074 VSPEC1_SGMII_ANEN_ANRS);
1075}
1076
1077static int gpy_update_stats(struct phy_device *phydev)
1078{
1079 struct gpy_priv *priv = phydev->priv;
1080 int ret;
1081
1082 /* PHY_ERRCNT: 8-bit read-clear counter, SEL set to RXERR */
1083 ret = phy_read(phydev, PHY_ERRCNT);
1084 if (ret < 0)
1085 return ret;
1086
1087 priv->rx_errors += FIELD_GET(PHY_ERRCNT_COUNT, ret);
1088
1089 return 0;
1090}
1091
1092static void gpy_get_phy_stats(struct phy_device *phydev,
1093 struct ethtool_eth_phy_stats *eth_stats,
1094 struct ethtool_phy_stats *stats)
1095{
1096 struct gpy_priv *priv = phydev->priv;
1097
1098 eth_stats->SymbolErrorDuringCarrier = priv->rx_errors;
1099 stats->rx_errors = priv->rx_errors;
1100}
1101
1102static struct phy_driver gpy_drivers[] = {
1103 {
1104 PHY_ID_MATCH_MODEL(PHY_ID_GPY2xx),
1105 .name = "Maxlinear Ethernet GPY2xx",
1106 .get_features = genphy_c45_pma_read_abilities,
1107 .config_init = gpy_config_init,
1108 .probe = gpy_probe,
1109 .inband_caps = gpy_inband_caps,
1110 .config_inband = gpy_config_inband,
1111 .suspend = genphy_suspend,
1112 .resume = genphy_resume,
1113 .config_aneg = gpy_config_aneg,
1114 .aneg_done = genphy_c45_aneg_done,
1115 .read_status = gpy_read_status,
1116 .config_intr = gpy_config_intr,
1117 .handle_interrupt = gpy_handle_interrupt,
1118 .set_wol = gpy_set_wol,
1119 .get_wol = gpy_get_wol,
1120 .set_loopback = gpy_loopback,
1121 .led_brightness_set = gpy_led_brightness_set,
1122 .led_hw_is_supported = gpy_led_hw_is_supported,
1123 .led_hw_control_get = gpy_led_hw_control_get,
1124 .led_hw_control_set = gpy_led_hw_control_set,
1125 .led_polarity_set = gpy_led_polarity_set,
1126 .update_stats = gpy_update_stats,
1127 .get_phy_stats = gpy_get_phy_stats,
1128 },
1129 {
1130 .phy_id = PHY_ID_GPY115B,
1131 .phy_id_mask = PHY_ID_GPYx15B_MASK,
1132 .name = "Maxlinear Ethernet GPY115B",
1133 .get_features = genphy_c45_pma_read_abilities,
1134 .config_init = gpy_config_init,
1135 .probe = gpy_probe,
1136 .inband_caps = gpy_inband_caps,
1137 .config_inband = gpy_config_inband,
1138 .suspend = genphy_suspend,
1139 .resume = genphy_resume,
1140 .config_aneg = gpy_config_aneg,
1141 .aneg_done = genphy_c45_aneg_done,
1142 .read_status = gpy_read_status,
1143 .config_intr = gpy_config_intr,
1144 .handle_interrupt = gpy_handle_interrupt,
1145 .set_wol = gpy_set_wol,
1146 .get_wol = gpy_get_wol,
1147 .set_loopback = gpy115_loopback,
1148 .led_brightness_set = gpy_led_brightness_set,
1149 .led_hw_is_supported = gpy_led_hw_is_supported,
1150 .led_hw_control_get = gpy_led_hw_control_get,
1151 .led_hw_control_set = gpy_led_hw_control_set,
1152 .led_polarity_set = gpy_led_polarity_set,
1153 .update_stats = gpy_update_stats,
1154 .get_phy_stats = gpy_get_phy_stats,
1155 },
1156 {
1157 PHY_ID_MATCH_MODEL(PHY_ID_GPY115C),
1158 .name = "Maxlinear Ethernet GPY115C",
1159 .get_features = genphy_c45_pma_read_abilities,
1160 .config_init = gpy_config_init,
1161 .probe = gpy_probe,
1162 .inband_caps = gpy_inband_caps,
1163 .config_inband = gpy_config_inband,
1164 .suspend = genphy_suspend,
1165 .resume = genphy_resume,
1166 .config_aneg = gpy_config_aneg,
1167 .aneg_done = genphy_c45_aneg_done,
1168 .read_status = gpy_read_status,
1169 .config_intr = gpy_config_intr,
1170 .handle_interrupt = gpy_handle_interrupt,
1171 .set_wol = gpy_set_wol,
1172 .get_wol = gpy_get_wol,
1173 .set_loopback = gpy115_loopback,
1174 .led_brightness_set = gpy_led_brightness_set,
1175 .led_hw_is_supported = gpy_led_hw_is_supported,
1176 .led_hw_control_get = gpy_led_hw_control_get,
1177 .led_hw_control_set = gpy_led_hw_control_set,
1178 .led_polarity_set = gpy_led_polarity_set,
1179 .update_stats = gpy_update_stats,
1180 .get_phy_stats = gpy_get_phy_stats,
1181 },
1182 {
1183 .phy_id = PHY_ID_GPY211B,
1184 .phy_id_mask = PHY_ID_GPY21xB_MASK,
1185 .name = "Maxlinear Ethernet GPY211B",
1186 .get_features = genphy_c45_pma_read_abilities,
1187 .config_init = gpy21x_config_init,
1188 .probe = gpy_probe,
1189 .inband_caps = gpy_inband_caps,
1190 .config_inband = gpy_config_inband,
1191 .suspend = genphy_suspend,
1192 .resume = genphy_resume,
1193 .config_aneg = gpy_config_aneg,
1194 .aneg_done = genphy_c45_aneg_done,
1195 .read_status = gpy_read_status,
1196 .config_intr = gpy_config_intr,
1197 .handle_interrupt = gpy_handle_interrupt,
1198 .set_wol = gpy_set_wol,
1199 .get_wol = gpy_get_wol,
1200 .set_loopback = gpy_loopback,
1201 .led_brightness_set = gpy_led_brightness_set,
1202 .led_hw_is_supported = gpy_led_hw_is_supported,
1203 .led_hw_control_get = gpy_led_hw_control_get,
1204 .led_hw_control_set = gpy_led_hw_control_set,
1205 .led_polarity_set = gpy_led_polarity_set,
1206 .update_stats = gpy_update_stats,
1207 .get_phy_stats = gpy_get_phy_stats,
1208 },
1209 {
1210 PHY_ID_MATCH_MODEL(PHY_ID_GPY211C),
1211 .name = "Maxlinear Ethernet GPY211C",
1212 .get_features = genphy_c45_pma_read_abilities,
1213 .config_init = gpy21x_config_init,
1214 .probe = gpy_probe,
1215 .inband_caps = gpy_inband_caps,
1216 .config_inband = gpy_config_inband,
1217 .suspend = genphy_suspend,
1218 .resume = genphy_resume,
1219 .config_aneg = gpy_config_aneg,
1220 .aneg_done = genphy_c45_aneg_done,
1221 .read_status = gpy_read_status,
1222 .config_intr = gpy_config_intr,
1223 .handle_interrupt = gpy_handle_interrupt,
1224 .set_wol = gpy_set_wol,
1225 .get_wol = gpy_get_wol,
1226 .set_loopback = gpy_loopback,
1227 .led_brightness_set = gpy_led_brightness_set,
1228 .led_hw_is_supported = gpy_led_hw_is_supported,
1229 .led_hw_control_get = gpy_led_hw_control_get,
1230 .led_hw_control_set = gpy_led_hw_control_set,
1231 .led_polarity_set = gpy_led_polarity_set,
1232 .update_stats = gpy_update_stats,
1233 .get_phy_stats = gpy_get_phy_stats,
1234 },
1235 {
1236 .phy_id = PHY_ID_GPY212B,
1237 .phy_id_mask = PHY_ID_GPY21xB_MASK,
1238 .name = "Maxlinear Ethernet GPY212B",
1239 .get_features = genphy_c45_pma_read_abilities,
1240 .config_init = gpy21x_config_init,
1241 .inband_caps = gpy_inband_caps,
1242 .config_inband = gpy_config_inband,
1243 .probe = gpy_probe,
1244 .suspend = genphy_suspend,
1245 .resume = genphy_resume,
1246 .config_aneg = gpy_config_aneg,
1247 .aneg_done = genphy_c45_aneg_done,
1248 .read_status = gpy_read_status,
1249 .config_intr = gpy_config_intr,
1250 .handle_interrupt = gpy_handle_interrupt,
1251 .set_wol = gpy_set_wol,
1252 .get_wol = gpy_get_wol,
1253 .set_loopback = gpy_loopback,
1254 .led_brightness_set = gpy_led_brightness_set,
1255 .led_hw_is_supported = gpy_led_hw_is_supported,
1256 .led_hw_control_get = gpy_led_hw_control_get,
1257 .led_hw_control_set = gpy_led_hw_control_set,
1258 .led_polarity_set = gpy_led_polarity_set,
1259 .update_stats = gpy_update_stats,
1260 .get_phy_stats = gpy_get_phy_stats,
1261 },
1262 {
1263 PHY_ID_MATCH_MODEL(PHY_ID_GPY212C),
1264 .name = "Maxlinear Ethernet GPY212C",
1265 .get_features = genphy_c45_pma_read_abilities,
1266 .config_init = gpy21x_config_init,
1267 .probe = gpy_probe,
1268 .inband_caps = gpy_inband_caps,
1269 .config_inband = gpy_config_inband,
1270 .suspend = genphy_suspend,
1271 .resume = genphy_resume,
1272 .config_aneg = gpy_config_aneg,
1273 .aneg_done = genphy_c45_aneg_done,
1274 .read_status = gpy_read_status,
1275 .config_intr = gpy_config_intr,
1276 .handle_interrupt = gpy_handle_interrupt,
1277 .set_wol = gpy_set_wol,
1278 .get_wol = gpy_get_wol,
1279 .set_loopback = gpy_loopback,
1280 .led_brightness_set = gpy_led_brightness_set,
1281 .led_hw_is_supported = gpy_led_hw_is_supported,
1282 .led_hw_control_get = gpy_led_hw_control_get,
1283 .led_hw_control_set = gpy_led_hw_control_set,
1284 .led_polarity_set = gpy_led_polarity_set,
1285 .update_stats = gpy_update_stats,
1286 .get_phy_stats = gpy_get_phy_stats,
1287 },
1288 {
1289 .phy_id = PHY_ID_GPY215B,
1290 .phy_id_mask = PHY_ID_GPYx15B_MASK,
1291 .name = "Maxlinear Ethernet GPY215B",
1292 .get_features = genphy_c45_pma_read_abilities,
1293 .config_init = gpy21x_config_init,
1294 .probe = gpy_probe,
1295 .inband_caps = gpy_inband_caps,
1296 .config_inband = gpy_config_inband,
1297 .suspend = genphy_suspend,
1298 .resume = genphy_resume,
1299 .config_aneg = gpy_config_aneg,
1300 .aneg_done = genphy_c45_aneg_done,
1301 .read_status = gpy_read_status,
1302 .config_intr = gpy_config_intr,
1303 .handle_interrupt = gpy_handle_interrupt,
1304 .set_wol = gpy_set_wol,
1305 .get_wol = gpy_get_wol,
1306 .set_loopback = gpy_loopback,
1307 .led_brightness_set = gpy_led_brightness_set,
1308 .led_hw_is_supported = gpy_led_hw_is_supported,
1309 .led_hw_control_get = gpy_led_hw_control_get,
1310 .led_hw_control_set = gpy_led_hw_control_set,
1311 .led_polarity_set = gpy_led_polarity_set,
1312 .update_stats = gpy_update_stats,
1313 .get_phy_stats = gpy_get_phy_stats,
1314 },
1315 {
1316 PHY_ID_MATCH_MODEL(PHY_ID_GPY215C),
1317 .name = "Maxlinear Ethernet GPY215C",
1318 .get_features = genphy_c45_pma_read_abilities,
1319 .config_init = gpy21x_config_init,
1320 .probe = gpy_probe,
1321 .inband_caps = gpy_inband_caps,
1322 .config_inband = gpy_config_inband,
1323 .suspend = genphy_suspend,
1324 .resume = genphy_resume,
1325 .config_aneg = gpy_config_aneg,
1326 .aneg_done = genphy_c45_aneg_done,
1327 .read_status = gpy_read_status,
1328 .config_intr = gpy_config_intr,
1329 .handle_interrupt = gpy_handle_interrupt,
1330 .set_wol = gpy_set_wol,
1331 .get_wol = gpy_get_wol,
1332 .set_loopback = gpy_loopback,
1333 .led_brightness_set = gpy_led_brightness_set,
1334 .led_hw_is_supported = gpy_led_hw_is_supported,
1335 .led_hw_control_get = gpy_led_hw_control_get,
1336 .led_hw_control_set = gpy_led_hw_control_set,
1337 .led_polarity_set = gpy_led_polarity_set,
1338 .update_stats = gpy_update_stats,
1339 .get_phy_stats = gpy_get_phy_stats,
1340 },
1341 {
1342 PHY_ID_MATCH_MODEL(PHY_ID_GPY241B),
1343 .name = "Maxlinear Ethernet GPY241B",
1344 .get_features = genphy_c45_pma_read_abilities,
1345 .config_init = gpy_config_init,
1346 .probe = gpy_probe,
1347 .inband_caps = gpy_inband_caps,
1348 .config_inband = gpy_config_inband,
1349 .suspend = genphy_suspend,
1350 .resume = genphy_resume,
1351 .config_aneg = gpy_config_aneg,
1352 .aneg_done = genphy_c45_aneg_done,
1353 .read_status = gpy_read_status,
1354 .config_intr = gpy_config_intr,
1355 .handle_interrupt = gpy_handle_interrupt,
1356 .set_wol = gpy_set_wol,
1357 .get_wol = gpy_get_wol,
1358 .set_loopback = gpy_loopback,
1359 .update_stats = gpy_update_stats,
1360 .get_phy_stats = gpy_get_phy_stats,
1361 },
1362 {
1363 PHY_ID_MATCH_MODEL(PHY_ID_GPY241BM),
1364 .name = "Maxlinear Ethernet GPY241BM",
1365 .get_features = genphy_c45_pma_read_abilities,
1366 .config_init = gpy_config_init,
1367 .probe = gpy_probe,
1368 .inband_caps = gpy_inband_caps,
1369 .config_inband = gpy_config_inband,
1370 .suspend = genphy_suspend,
1371 .resume = genphy_resume,
1372 .config_aneg = gpy_config_aneg,
1373 .aneg_done = genphy_c45_aneg_done,
1374 .read_status = gpy_read_status,
1375 .config_intr = gpy_config_intr,
1376 .handle_interrupt = gpy_handle_interrupt,
1377 .set_wol = gpy_set_wol,
1378 .get_wol = gpy_get_wol,
1379 .set_loopback = gpy_loopback,
1380 .update_stats = gpy_update_stats,
1381 .get_phy_stats = gpy_get_phy_stats,
1382 },
1383 {
1384 PHY_ID_MATCH_MODEL(PHY_ID_GPY245B),
1385 .name = "Maxlinear Ethernet GPY245B",
1386 .get_features = genphy_c45_pma_read_abilities,
1387 .config_init = gpy_config_init,
1388 .probe = gpy_probe,
1389 .inband_caps = gpy_inband_caps,
1390 .config_inband = gpy_config_inband,
1391 .suspend = genphy_suspend,
1392 .resume = genphy_resume,
1393 .config_aneg = gpy_config_aneg,
1394 .aneg_done = genphy_c45_aneg_done,
1395 .read_status = gpy_read_status,
1396 .config_intr = gpy_config_intr,
1397 .handle_interrupt = gpy_handle_interrupt,
1398 .set_wol = gpy_set_wol,
1399 .get_wol = gpy_get_wol,
1400 .set_loopback = gpy_loopback,
1401 .update_stats = gpy_update_stats,
1402 .get_phy_stats = gpy_get_phy_stats,
1403 },
1404 {
1405 PHY_ID_MATCH_MODEL(PHY_ID_MXL86211C),
1406 .name = "Maxlinear Ethernet MxL86211C",
1407 .get_features = genphy_c45_pma_read_abilities,
1408 .config_init = gpy_config_init,
1409 .probe = gpy_probe,
1410 .inband_caps = gpy_inband_caps,
1411 .config_inband = gpy_config_inband,
1412 .suspend = genphy_suspend,
1413 .resume = genphy_resume,
1414 .config_aneg = gpy_config_aneg,
1415 .aneg_done = genphy_c45_aneg_done,
1416 .read_status = gpy_read_status,
1417 .config_intr = gpy_config_intr,
1418 .handle_interrupt = gpy_handle_interrupt,
1419 .set_wol = gpy_set_wol,
1420 .get_wol = gpy_get_wol,
1421 .set_loopback = gpy_loopback,
1422 .led_brightness_set = gpy_led_brightness_set,
1423 .led_hw_is_supported = gpy_led_hw_is_supported,
1424 .led_hw_control_get = gpy_led_hw_control_get,
1425 .led_hw_control_set = gpy_led_hw_control_set,
1426 .led_polarity_set = gpy_led_polarity_set,
1427 .update_stats = gpy_update_stats,
1428 .get_phy_stats = gpy_get_phy_stats,
1429 },
1430 {
1431 PHY_ID_MATCH_MODEL(PHY_ID_MXL86252),
1432 .name = "MaxLinear Ethernet MxL86252",
1433 .get_features = genphy_c45_pma_read_abilities,
1434 .config_init = gpy_config_init,
1435 .probe = gpy_probe,
1436 .suspend = genphy_suspend,
1437 .resume = genphy_resume,
1438 .config_aneg = gpy_config_aneg,
1439 .aneg_done = genphy_c45_aneg_done,
1440 .read_status = gpy_read_status,
1441 .config_intr = gpy_config_intr,
1442 .handle_interrupt = gpy_handle_interrupt,
1443 .set_wol = gpy_set_wol,
1444 .get_wol = gpy_get_wol,
1445 .set_loopback = gpy_loopback,
1446 .update_stats = gpy_update_stats,
1447 .get_phy_stats = gpy_get_phy_stats,
1448 .led_brightness_set = gpy_led_brightness_set,
1449 .led_hw_is_supported = gpy_led_hw_is_supported,
1450 .led_hw_control_get = gpy_led_hw_control_get,
1451 .led_hw_control_set = gpy_led_hw_control_set,
1452 .led_polarity_set = gpy_led_polarity_set,
1453 },
1454 {
1455 PHY_ID_MATCH_MODEL(PHY_ID_MXL86282),
1456 .name = "MaxLinear Ethernet MxL86282",
1457 .get_features = genphy_c45_pma_read_abilities,
1458 .config_init = gpy_config_init,
1459 .probe = gpy_probe,
1460 .suspend = genphy_suspend,
1461 .resume = genphy_resume,
1462 .config_aneg = gpy_config_aneg,
1463 .aneg_done = genphy_c45_aneg_done,
1464 .read_status = gpy_read_status,
1465 .config_intr = gpy_config_intr,
1466 .handle_interrupt = gpy_handle_interrupt,
1467 .set_wol = gpy_set_wol,
1468 .get_wol = gpy_get_wol,
1469 .set_loopback = gpy_loopback,
1470 .update_stats = gpy_update_stats,
1471 .get_phy_stats = gpy_get_phy_stats,
1472 .led_brightness_set = gpy_led_brightness_set,
1473 .led_hw_is_supported = gpy_led_hw_is_supported,
1474 .led_hw_control_get = gpy_led_hw_control_get,
1475 .led_hw_control_set = gpy_led_hw_control_set,
1476 .led_polarity_set = gpy_led_polarity_set,
1477 },
1478};
1479module_phy_driver(gpy_drivers);
1480
1481static const struct mdio_device_id __maybe_unused gpy_tbl[] = {
1482 {PHY_ID_MATCH_MODEL(PHY_ID_GPY2xx)},
1483 {PHY_ID_GPY115B, PHY_ID_GPYx15B_MASK},
1484 {PHY_ID_MATCH_MODEL(PHY_ID_GPY115C)},
1485 {PHY_ID_GPY211B, PHY_ID_GPY21xB_MASK},
1486 {PHY_ID_MATCH_MODEL(PHY_ID_GPY211C)},
1487 {PHY_ID_GPY212B, PHY_ID_GPY21xB_MASK},
1488 {PHY_ID_MATCH_MODEL(PHY_ID_GPY212C)},
1489 {PHY_ID_GPY215B, PHY_ID_GPYx15B_MASK},
1490 {PHY_ID_MATCH_MODEL(PHY_ID_GPY215C)},
1491 {PHY_ID_MATCH_MODEL(PHY_ID_GPY241B)},
1492 {PHY_ID_MATCH_MODEL(PHY_ID_GPY241BM)},
1493 {PHY_ID_MATCH_MODEL(PHY_ID_GPY245B)},
1494 {PHY_ID_MATCH_MODEL(PHY_ID_MXL86211C)},
1495 {PHY_ID_MATCH_MODEL(PHY_ID_MXL86252)},
1496 {PHY_ID_MATCH_MODEL(PHY_ID_MXL86282)},
1497 { }
1498};
1499MODULE_DEVICE_TABLE(mdio, gpy_tbl);
1500
1501MODULE_DESCRIPTION("Maxlinear Ethernet GPY Driver");
1502MODULE_AUTHOR("Xu Liang");
1503MODULE_LICENSE("GPL");