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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * I2C client/driver for the ST M41T80 family of i2c rtc chips.
4 *
5 * Author: Alexander Bigga <[email protected]>
6 *
7 * Based on m41t00.c by Mark A. Greer <[email protected]>
8 *
9 * 2006 (c) mycable GmbH
10 */
11
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
14#include <linux/bcd.h>
15#include <linux/clk-provider.h>
16#include <linux/i2c.h>
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/of.h>
21#include <linux/rtc.h>
22#include <linux/slab.h>
23#include <linux/mutex.h>
24#include <linux/string.h>
25#include <linux/delay.h>
26#ifdef CONFIG_RTC_DRV_M41T80_WDT
27#include <linux/fs.h>
28#include <linux/ioctl.h>
29#include <linux/miscdevice.h>
30#include <linux/reboot.h>
31#include <linux/watchdog.h>
32#endif
33
34#define M41T80_REG_SSEC 0x00
35#define M41T80_REG_SEC 0x01
36#define M41T80_REG_MIN 0x02
37#define M41T80_REG_HOUR 0x03
38#define M41T80_REG_WDAY 0x04
39#define M41T80_REG_DAY 0x05
40#define M41T80_REG_MON 0x06
41#define M41T80_REG_YEAR 0x07
42#define M41T80_REG_ALARM_MON 0x0a
43#define M41T80_REG_ALARM_DAY 0x0b
44#define M41T80_REG_ALARM_HOUR 0x0c
45#define M41T80_REG_ALARM_MIN 0x0d
46#define M41T80_REG_ALARM_SEC 0x0e
47#define M41T80_REG_FLAGS 0x0f
48#define M41T80_REG_SQW 0x13
49
50#define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1)
51#define M41T80_ALARM_REG_SIZE \
52 (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON)
53
54#define M41T80_SQW_MAX_FREQ 32768
55
56#define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */
57#define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */
58#define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */
59#define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */
60#define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */
61#define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */
62#define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */
63#define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */
64#define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */
65#define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */
66
67#define M41T80_FEATURE_HT BIT(0) /* Halt feature */
68#define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */
69#define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */
70#define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */
71#define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */
72
73static const struct i2c_device_id m41t80_id[] = {
74 { .name = "m41t62", .driver_data = M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT },
75 { .name = "m41t65", .driver_data = M41T80_FEATURE_WD },
76 { .name = "m41t80", .driver_data = M41T80_FEATURE_SQ },
77 { .name = "m41t81", .driver_data = M41T80_FEATURE_HT | M41T80_FEATURE_SQ},
78 { .name = "m41t81s", .driver_data = M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
79 { .name = "m41t82", .driver_data = M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
80 { .name = "m41t83", .driver_data = M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
81 { .name = "m41st84", .driver_data = M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
82 { .name = "m41st85", .driver_data = M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
83 { .name = "m41st87", .driver_data = M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
84 { .name = "rv4162", .driver_data = M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT },
85 { }
86};
87MODULE_DEVICE_TABLE(i2c, m41t80_id);
88
89static const __maybe_unused struct of_device_id m41t80_of_match[] = {
90 {
91 .compatible = "st,m41t62",
92 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT)
93 },
94 {
95 .compatible = "st,m41t65",
96 .data = (void *)(M41T80_FEATURE_WD)
97 },
98 {
99 .compatible = "st,m41t80",
100 .data = (void *)(M41T80_FEATURE_SQ)
101 },
102 {
103 .compatible = "st,m41t81",
104 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ)
105 },
106 {
107 .compatible = "st,m41t81s",
108 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
109 },
110 {
111 .compatible = "st,m41t82",
112 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
113 },
114 {
115 .compatible = "st,m41t83",
116 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
117 },
118 {
119 .compatible = "st,m41t84",
120 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
121 },
122 {
123 .compatible = "st,m41t85",
124 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
125 },
126 {
127 .compatible = "st,m41t87",
128 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
129 },
130 {
131 .compatible = "microcrystal,rv4162",
132 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
133 },
134 /* DT compatibility only, do not use compatibles below: */
135 {
136 .compatible = "st,rv4162",
137 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
138 },
139 {
140 .compatible = "rv4162",
141 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
142 },
143 { }
144};
145MODULE_DEVICE_TABLE(of, m41t80_of_match);
146
147struct m41t80_data {
148 unsigned long features;
149 struct i2c_client *client;
150 struct rtc_device *rtc;
151#ifdef CONFIG_COMMON_CLK
152 struct clk_hw sqw;
153 unsigned long freq;
154 unsigned int sqwe;
155#endif
156};
157
158static irqreturn_t m41t80_handle_irq(int irq, void *dev_id)
159{
160 struct i2c_client *client = dev_id;
161 struct m41t80_data *m41t80 = i2c_get_clientdata(client);
162 unsigned long events = 0;
163 int flags, flags_afe;
164
165 rtc_lock(m41t80->rtc);
166
167 flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
168 if (flags_afe < 0) {
169 rtc_unlock(m41t80->rtc);
170 return IRQ_NONE;
171 }
172
173 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
174 if (flags <= 0) {
175 rtc_unlock(m41t80->rtc);
176 return IRQ_NONE;
177 }
178
179 if (flags & M41T80_FLAGS_AF) {
180 flags &= ~M41T80_FLAGS_AF;
181 flags_afe &= ~M41T80_ALMON_AFE;
182 events |= RTC_AF;
183 }
184
185 if (events) {
186 rtc_update_irq(m41t80->rtc, 1, events);
187 i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags);
188 i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
189 flags_afe);
190 }
191
192 rtc_unlock(m41t80->rtc);
193
194 return IRQ_HANDLED;
195}
196
197static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm)
198{
199 struct i2c_client *client = to_i2c_client(dev);
200 unsigned char buf[8];
201 int err, flags;
202
203 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
204 if (flags < 0)
205 return flags;
206
207 if (flags & M41T80_FLAGS_OF) {
208 dev_err(&client->dev, "Oscillator failure, time may not be accurate, write time to RTC to fix it.\n");
209 return -EINVAL;
210 }
211
212 err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC,
213 sizeof(buf), buf);
214 if (err < 0) {
215 dev_dbg(&client->dev, "Unable to read date\n");
216 return err;
217 }
218
219 tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f);
220 tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f);
221 tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f);
222 tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f);
223 tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07;
224 tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1;
225
226 /* assume 20YY not 19YY, and ignore the Century Bit */
227 tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100;
228 return 0;
229}
230
231static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *in_tm)
232{
233 struct i2c_client *client = to_i2c_client(dev);
234 struct m41t80_data *clientdata = i2c_get_clientdata(client);
235 struct rtc_time tm = *in_tm;
236 unsigned char buf[8];
237 int err, flags;
238 time64_t time = 0;
239
240 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
241 if (flags < 0)
242 return flags;
243 if (flags & M41T80_FLAGS_OF) {
244 /* add 4sec of oscillator stablize time otherwise we are behind 4sec */
245 time = rtc_tm_to_time64(&tm);
246 rtc_time64_to_tm(time + 4, &tm);
247 }
248 buf[M41T80_REG_SSEC] = 0;
249 buf[M41T80_REG_SEC] = bin2bcd(tm.tm_sec);
250 buf[M41T80_REG_MIN] = bin2bcd(tm.tm_min);
251 buf[M41T80_REG_HOUR] = bin2bcd(tm.tm_hour);
252 buf[M41T80_REG_DAY] = bin2bcd(tm.tm_mday);
253 buf[M41T80_REG_MON] = bin2bcd(tm.tm_mon + 1);
254 buf[M41T80_REG_YEAR] = bin2bcd(tm.tm_year - 100);
255 buf[M41T80_REG_WDAY] = tm.tm_wday;
256
257 /* If the square wave output is controlled in the weekday register */
258 if (clientdata->features & M41T80_FEATURE_SQ_ALT) {
259 int val;
260
261 val = i2c_smbus_read_byte_data(client, M41T80_REG_WDAY);
262 if (val < 0)
263 return val;
264
265 buf[M41T80_REG_WDAY] |= (val & 0xf0);
266 }
267
268 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC,
269 sizeof(buf), buf);
270 if (err < 0) {
271 dev_dbg(&client->dev, "Unable to write to date registers\n");
272 return err;
273 }
274 if (flags & M41T80_FLAGS_OF) {
275 /* OF cannot be immediately reset: oscillator has to be restarted. */
276 dev_warn(&client->dev, "OF bit is still set, kickstarting clock.\n");
277 err = i2c_smbus_write_byte_data(client, M41T80_REG_SEC, M41T80_SEC_ST);
278 if (err < 0) {
279 dev_dbg(&client->dev, "Can't set ST bit\n");
280 return err;
281 }
282 err = i2c_smbus_write_byte_data(client, M41T80_REG_SEC, flags & ~M41T80_SEC_ST);
283 if (err < 0) {
284 dev_dbg(&client->dev, "Can't clear ST bit\n");
285 return err;
286 }
287 /* oscillator must run for 4sec before we attempt to reset OF bit */
288 msleep(4000);
289 /* Clear the OF bit of Flags Register */
290 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags & ~M41T80_FLAGS_OF);
291 if (err < 0) {
292 dev_dbg(&client->dev, "Unable to write flags register\n");
293 return err;
294 }
295 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
296 if (flags < 0) {
297 return flags;
298 } else if (flags & M41T80_FLAGS_OF) {
299 dev_dbg(&client->dev, "Can't clear the OF bit check battery\n");
300 return err;
301 }
302 }
303
304 return err;
305}
306
307static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq)
308{
309 struct i2c_client *client = to_i2c_client(dev);
310 struct m41t80_data *clientdata = i2c_get_clientdata(client);
311 int reg;
312
313 if (clientdata->features & M41T80_FEATURE_BL) {
314 reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
315 if (reg < 0)
316 return reg;
317 seq_printf(seq, "battery\t\t: %s\n",
318 (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok");
319 }
320 return 0;
321}
322
323static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled)
324{
325 struct i2c_client *client = to_i2c_client(dev);
326 int flags, retval;
327
328 flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
329 if (flags < 0)
330 return flags;
331
332 if (enabled)
333 flags |= M41T80_ALMON_AFE;
334 else
335 flags &= ~M41T80_ALMON_AFE;
336
337 retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags);
338 if (retval < 0) {
339 dev_dbg(dev, "Unable to enable alarm IRQ %d\n", retval);
340 return retval;
341 }
342 return 0;
343}
344
345static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
346{
347 struct i2c_client *client = to_i2c_client(dev);
348 u8 alarmvals[5];
349 int ret, err;
350
351 alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1);
352 alarmvals[1] = bin2bcd(alrm->time.tm_mday);
353 alarmvals[2] = bin2bcd(alrm->time.tm_hour);
354 alarmvals[3] = bin2bcd(alrm->time.tm_min);
355 alarmvals[4] = bin2bcd(alrm->time.tm_sec);
356
357 /* Clear AF and AFE flags */
358 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
359 if (ret < 0)
360 return ret;
361 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
362 ret & ~(M41T80_ALMON_AFE));
363 if (err < 0) {
364 dev_dbg(dev, "Unable to clear AFE bit\n");
365 return err;
366 }
367
368 /* Keep SQWE bit value */
369 alarmvals[0] |= (ret & M41T80_ALMON_SQWE);
370
371 ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
372 if (ret < 0)
373 return ret;
374
375 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
376 ret & ~(M41T80_FLAGS_AF));
377 if (err < 0) {
378 dev_dbg(dev, "Unable to clear AF bit\n");
379 return err;
380 }
381
382 /* Write the alarm */
383 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON,
384 5, alarmvals);
385 if (err)
386 return err;
387
388 /* Enable the alarm interrupt */
389 if (alrm->enabled) {
390 alarmvals[0] |= M41T80_ALMON_AFE;
391 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
392 alarmvals[0]);
393 if (err)
394 return err;
395 }
396
397 return 0;
398}
399
400static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
401{
402 struct i2c_client *client = to_i2c_client(dev);
403 u8 alarmvals[5];
404 int flags, ret;
405
406 ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON,
407 5, alarmvals);
408 if (ret != 5)
409 return ret < 0 ? ret : -EIO;
410
411 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
412 if (flags < 0)
413 return flags;
414
415 alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f);
416 alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f);
417 alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f);
418 alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f);
419 alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f) - 1;
420
421 alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE);
422 alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled;
423
424 return 0;
425}
426
427static const struct rtc_class_ops m41t80_rtc_ops = {
428 .read_time = m41t80_rtc_read_time,
429 .set_time = m41t80_rtc_set_time,
430 .proc = m41t80_rtc_proc,
431 .read_alarm = m41t80_read_alarm,
432 .set_alarm = m41t80_set_alarm,
433 .alarm_irq_enable = m41t80_alarm_irq_enable,
434};
435
436#ifdef CONFIG_PM_SLEEP
437static int m41t80_suspend(struct device *dev)
438{
439 struct i2c_client *client = to_i2c_client(dev);
440
441 if (client->irq >= 0 && device_may_wakeup(dev))
442 enable_irq_wake(client->irq);
443
444 return 0;
445}
446
447static int m41t80_resume(struct device *dev)
448{
449 struct i2c_client *client = to_i2c_client(dev);
450
451 if (client->irq >= 0 && device_may_wakeup(dev))
452 disable_irq_wake(client->irq);
453
454 return 0;
455}
456#endif
457
458static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume);
459
460#ifdef CONFIG_COMMON_CLK
461#define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw)
462
463static unsigned long m41t80_decode_freq(int setting)
464{
465 return (setting == 0) ? 0 : (setting == 1) ? M41T80_SQW_MAX_FREQ :
466 M41T80_SQW_MAX_FREQ >> setting;
467}
468
469static unsigned long m41t80_get_freq(struct m41t80_data *m41t80)
470{
471 struct i2c_client *client = m41t80->client;
472 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
473 M41T80_REG_WDAY : M41T80_REG_SQW;
474 int ret = i2c_smbus_read_byte_data(client, reg_sqw);
475
476 if (ret < 0)
477 return 0;
478 return m41t80_decode_freq(ret >> 4);
479}
480
481static unsigned long m41t80_sqw_recalc_rate(struct clk_hw *hw,
482 unsigned long parent_rate)
483{
484 return sqw_to_m41t80_data(hw)->freq;
485}
486
487static int m41t80_sqw_determine_rate(struct clk_hw *hw,
488 struct clk_rate_request *req)
489{
490 if (req->rate >= M41T80_SQW_MAX_FREQ)
491 req->rate = M41T80_SQW_MAX_FREQ;
492 else if (req->rate >= M41T80_SQW_MAX_FREQ / 4)
493 req->rate = M41T80_SQW_MAX_FREQ / 4;
494 else if (req->rate)
495 req->rate = 1 << ilog2(req->rate);
496
497 return 0;
498}
499
500static int m41t80_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
501 unsigned long parent_rate)
502{
503 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
504 struct i2c_client *client = m41t80->client;
505 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
506 M41T80_REG_WDAY : M41T80_REG_SQW;
507 int reg, ret, val = 0;
508
509 if (rate >= M41T80_SQW_MAX_FREQ)
510 val = 1;
511 else if (rate >= M41T80_SQW_MAX_FREQ / 4)
512 val = 2;
513 else if (rate)
514 val = 15 - ilog2(rate);
515
516 reg = i2c_smbus_read_byte_data(client, reg_sqw);
517 if (reg < 0)
518 return reg;
519
520 reg = (reg & 0x0f) | (val << 4);
521
522 ret = i2c_smbus_write_byte_data(client, reg_sqw, reg);
523 if (!ret)
524 m41t80->freq = m41t80_decode_freq(val);
525 return ret;
526}
527
528static int m41t80_sqw_control(struct clk_hw *hw, bool enable)
529{
530 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
531 struct i2c_client *client = m41t80->client;
532 int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
533
534 if (ret < 0)
535 return ret;
536
537 if (enable)
538 ret |= M41T80_ALMON_SQWE;
539 else
540 ret &= ~M41T80_ALMON_SQWE;
541
542 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, ret);
543 if (!ret)
544 m41t80->sqwe = enable;
545 return ret;
546}
547
548static int m41t80_sqw_prepare(struct clk_hw *hw)
549{
550 return m41t80_sqw_control(hw, 1);
551}
552
553static void m41t80_sqw_unprepare(struct clk_hw *hw)
554{
555 m41t80_sqw_control(hw, 0);
556}
557
558static int m41t80_sqw_is_prepared(struct clk_hw *hw)
559{
560 return sqw_to_m41t80_data(hw)->sqwe;
561}
562
563static const struct clk_ops m41t80_sqw_ops = {
564 .prepare = m41t80_sqw_prepare,
565 .unprepare = m41t80_sqw_unprepare,
566 .is_prepared = m41t80_sqw_is_prepared,
567 .recalc_rate = m41t80_sqw_recalc_rate,
568 .determine_rate = m41t80_sqw_determine_rate,
569 .set_rate = m41t80_sqw_set_rate,
570};
571
572static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80)
573{
574 struct i2c_client *client = m41t80->client;
575 struct device_node *node = client->dev.of_node;
576 struct device_node *fixed_clock;
577 struct clk_init_data init = {};
578 struct clk *clk;
579 int ret;
580
581 fixed_clock = of_get_child_by_name(node, "clock");
582 if (fixed_clock) {
583 /*
584 * skip registering square wave clock when a fixed
585 * clock has been registered. The fixed clock is
586 * registered automatically when being referenced.
587 */
588 of_node_put(fixed_clock);
589 return NULL;
590 }
591
592 /* First disable the clock */
593 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
594 if (ret < 0)
595 return ERR_PTR(ret);
596 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
597 ret & ~(M41T80_ALMON_SQWE));
598 if (ret < 0)
599 return ERR_PTR(ret);
600
601 init.name = "m41t80-sqw";
602 init.ops = &m41t80_sqw_ops;
603 init.flags = 0;
604 init.parent_names = NULL;
605 init.num_parents = 0;
606 m41t80->sqw.init = &init;
607 m41t80->freq = m41t80_get_freq(m41t80);
608
609 /* optional override of the clockname */
610 of_property_read_string(node, "clock-output-names", &init.name);
611
612 /* register the clock */
613 clk = clk_register(&client->dev, &m41t80->sqw);
614 if (!IS_ERR(clk))
615 of_clk_add_provider(node, of_clk_src_simple_get, clk);
616
617 return clk;
618}
619#endif
620
621#ifdef CONFIG_RTC_DRV_M41T80_WDT
622/*
623 *****************************************************************************
624 *
625 * Watchdog Driver
626 *
627 *****************************************************************************
628 */
629static DEFINE_MUTEX(m41t80_rtc_mutex);
630static struct i2c_client *save_client;
631
632/* Default margin */
633#define WD_TIMO 60 /* 1..31 seconds */
634
635static int wdt_margin = WD_TIMO;
636module_param(wdt_margin, int, 0);
637MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)");
638
639static unsigned long wdt_is_open;
640static int boot_flag;
641
642/**
643 * wdt_ping - Reload counter one with the watchdog timeout.
644 * We don't bother reloading the cascade counter.
645 */
646static void wdt_ping(void)
647{
648 unsigned char i2c_data[2];
649 struct i2c_msg msgs1[1] = {
650 {
651 .addr = save_client->addr,
652 .flags = 0,
653 .len = 2,
654 .buf = i2c_data,
655 },
656 };
657 struct m41t80_data *clientdata = i2c_get_clientdata(save_client);
658
659 i2c_data[0] = 0x09; /* watchdog register */
660
661 if (wdt_margin > 31)
662 i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */
663 else
664 /*
665 * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02)
666 */
667 i2c_data[1] = wdt_margin << 2 | 0x82;
668
669 /*
670 * M41T65 has three bits for watchdog resolution. Don't set bit 7, as
671 * that would be an invalid resolution.
672 */
673 if (clientdata->features & M41T80_FEATURE_WD)
674 i2c_data[1] &= ~M41T80_WATCHDOG_RB2;
675
676 i2c_transfer(save_client->adapter, msgs1, 1);
677}
678
679/**
680 * wdt_disable - disables watchdog.
681 */
682static void wdt_disable(void)
683{
684 unsigned char i2c_data[2], i2c_buf[0x10];
685 struct i2c_msg msgs0[2] = {
686 {
687 .addr = save_client->addr,
688 .flags = 0,
689 .len = 1,
690 .buf = i2c_data,
691 },
692 {
693 .addr = save_client->addr,
694 .flags = I2C_M_RD,
695 .len = 1,
696 .buf = i2c_buf,
697 },
698 };
699 struct i2c_msg msgs1[1] = {
700 {
701 .addr = save_client->addr,
702 .flags = 0,
703 .len = 2,
704 .buf = i2c_data,
705 },
706 };
707
708 i2c_data[0] = 0x09;
709 i2c_transfer(save_client->adapter, msgs0, 2);
710
711 i2c_data[0] = 0x09;
712 i2c_data[1] = 0x00;
713 i2c_transfer(save_client->adapter, msgs1, 1);
714}
715
716/**
717 * wdt_write - write to watchdog.
718 * @file: file handle to the watchdog
719 * @buf: buffer to write (unused as data does not matter here
720 * @count: count of bytes
721 * @ppos: pointer to the position to write. No seeks allowed
722 *
723 * A write to a watchdog device is defined as a keepalive signal. Any
724 * write of data will do, as we don't define content meaning.
725 */
726static ssize_t wdt_write(struct file *file, const char __user *buf,
727 size_t count, loff_t *ppos)
728{
729 if (count) {
730 wdt_ping();
731 return 1;
732 }
733 return 0;
734}
735
736static ssize_t wdt_read(struct file *file, char __user *buf,
737 size_t count, loff_t *ppos)
738{
739 return 0;
740}
741
742/**
743 * wdt_ioctl - ioctl handler to set watchdog.
744 * @file: file handle to the device
745 * @cmd: watchdog command
746 * @arg: argument pointer
747 *
748 * The watchdog API defines a common set of functions for all watchdogs
749 * according to their available features. We only actually usefully support
750 * querying capabilities and current status.
751 */
752static int wdt_ioctl(struct file *file, unsigned int cmd,
753 unsigned long arg)
754{
755 int new_margin, rv;
756 static struct watchdog_info ident = {
757 .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING |
758 WDIOF_SETTIMEOUT,
759 .firmware_version = 1,
760 .identity = "M41T80 WTD"
761 };
762
763 switch (cmd) {
764 case WDIOC_GETSUPPORT:
765 return copy_to_user((struct watchdog_info __user *)arg, &ident,
766 sizeof(ident)) ? -EFAULT : 0;
767
768 case WDIOC_GETSTATUS:
769 case WDIOC_GETBOOTSTATUS:
770 return put_user(boot_flag, (int __user *)arg);
771 case WDIOC_KEEPALIVE:
772 wdt_ping();
773 return 0;
774 case WDIOC_SETTIMEOUT:
775 if (get_user(new_margin, (int __user *)arg))
776 return -EFAULT;
777 /* Arbitrary, can't find the card's limits */
778 if (new_margin < 1 || new_margin > 124)
779 return -EINVAL;
780 wdt_margin = new_margin;
781 wdt_ping();
782 fallthrough;
783 case WDIOC_GETTIMEOUT:
784 return put_user(wdt_margin, (int __user *)arg);
785
786 case WDIOC_SETOPTIONS:
787 if (copy_from_user(&rv, (int __user *)arg, sizeof(int)))
788 return -EFAULT;
789
790 if (rv & WDIOS_DISABLECARD) {
791 pr_info("disable watchdog\n");
792 wdt_disable();
793 }
794
795 if (rv & WDIOS_ENABLECARD) {
796 pr_info("enable watchdog\n");
797 wdt_ping();
798 }
799
800 return -EINVAL;
801 }
802 return -ENOTTY;
803}
804
805static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd,
806 unsigned long arg)
807{
808 int ret;
809
810 mutex_lock(&m41t80_rtc_mutex);
811 ret = wdt_ioctl(file, cmd, arg);
812 mutex_unlock(&m41t80_rtc_mutex);
813
814 return ret;
815}
816
817/**
818 * wdt_open - open a watchdog.
819 * @inode: inode of device
820 * @file: file handle to device
821 *
822 */
823static int wdt_open(struct inode *inode, struct file *file)
824{
825 if (iminor(inode) == WATCHDOG_MINOR) {
826 mutex_lock(&m41t80_rtc_mutex);
827 if (test_and_set_bit(0, &wdt_is_open)) {
828 mutex_unlock(&m41t80_rtc_mutex);
829 return -EBUSY;
830 }
831 /*
832 * Activate
833 */
834 wdt_is_open = 1;
835 mutex_unlock(&m41t80_rtc_mutex);
836 return stream_open(inode, file);
837 }
838 return -ENODEV;
839}
840
841/**
842 * wdt_release - release a watchdog.
843 * @inode: inode to board
844 * @file: file handle to board
845 *
846 */
847static int wdt_release(struct inode *inode, struct file *file)
848{
849 if (iminor(inode) == WATCHDOG_MINOR)
850 clear_bit(0, &wdt_is_open);
851 return 0;
852}
853
854/**
855 * wdt_notify_sys - notify to watchdog.
856 * @this: our notifier block
857 * @code: the event being reported
858 * @unused: unused
859 *
860 * Our notifier is called on system shutdowns. We want to turn the card
861 * off at reboot otherwise the machine will reboot again during memory
862 * test or worse yet during the following fsck. This would suck, in fact
863 * trust me - if it happens it does suck.
864 */
865static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
866 void *unused)
867{
868 if (code == SYS_DOWN || code == SYS_HALT)
869 /* Disable Watchdog */
870 wdt_disable();
871 return NOTIFY_DONE;
872}
873
874static const struct file_operations wdt_fops = {
875 .owner = THIS_MODULE,
876 .read = wdt_read,
877 .unlocked_ioctl = wdt_unlocked_ioctl,
878 .compat_ioctl = compat_ptr_ioctl,
879 .write = wdt_write,
880 .open = wdt_open,
881 .release = wdt_release,
882};
883
884static struct miscdevice wdt_dev = {
885 .minor = WATCHDOG_MINOR,
886 .name = "watchdog",
887 .fops = &wdt_fops,
888};
889
890/*
891 * The WDT card needs to learn about soft shutdowns in order to
892 * turn the timebomb registers off.
893 */
894static struct notifier_block wdt_notifier = {
895 .notifier_call = wdt_notify_sys,
896};
897#endif /* CONFIG_RTC_DRV_M41T80_WDT */
898
899/*
900 *****************************************************************************
901 *
902 * Driver Interface
903 *
904 *****************************************************************************
905 */
906
907static int m41t80_probe(struct i2c_client *client)
908{
909 struct i2c_adapter *adapter = client->adapter;
910 int rc = 0;
911 struct rtc_time tm;
912 struct m41t80_data *m41t80_data = NULL;
913 bool wakeup_source = false;
914
915 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK |
916 I2C_FUNC_SMBUS_BYTE_DATA)) {
917 dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n");
918 return -ENODEV;
919 }
920
921 m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data),
922 GFP_KERNEL);
923 if (!m41t80_data)
924 return -ENOMEM;
925
926 m41t80_data->client = client;
927 m41t80_data->features = (unsigned long)i2c_get_match_data(client);
928 i2c_set_clientdata(client, m41t80_data);
929
930 m41t80_data->rtc = devm_rtc_allocate_device(&client->dev);
931 if (IS_ERR(m41t80_data->rtc))
932 return PTR_ERR(m41t80_data->rtc);
933
934 wakeup_source = device_property_read_bool(&client->dev, "wakeup-source");
935 if (client->irq > 0) {
936 unsigned long irqflags = IRQF_TRIGGER_LOW;
937
938 if (dev_fwnode(&client->dev))
939 irqflags = 0;
940
941 rc = devm_request_threaded_irq(&client->dev, client->irq,
942 NULL, m41t80_handle_irq,
943 irqflags | IRQF_ONESHOT,
944 "m41t80", client);
945 if (rc) {
946 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
947 client->irq = 0;
948 wakeup_source = false;
949 }
950 }
951 if (client->irq > 0 || wakeup_source)
952 device_init_wakeup(&client->dev, true);
953 else
954 clear_bit(RTC_FEATURE_ALARM, m41t80_data->rtc->features);
955
956 m41t80_data->rtc->ops = &m41t80_rtc_ops;
957 m41t80_data->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
958 m41t80_data->rtc->range_max = RTC_TIMESTAMP_END_2099;
959
960 if (client->irq <= 0)
961 clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, m41t80_data->rtc->features);
962
963 /* Make sure HT (Halt Update) bit is cleared */
964 rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR);
965
966 if (rc >= 0 && rc & M41T80_ALHOUR_HT) {
967 if (m41t80_data->features & M41T80_FEATURE_HT) {
968 m41t80_rtc_read_time(&client->dev, &tm);
969 dev_info(&client->dev, "HT bit was set!\n");
970 dev_info(&client->dev, "Power Down at %ptR\n", &tm);
971 }
972 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR,
973 rc & ~M41T80_ALHOUR_HT);
974 }
975
976 if (rc < 0) {
977 dev_err(&client->dev, "Can't clear HT bit\n");
978 return rc;
979 }
980
981 /* Make sure ST (stop) bit is cleared */
982 rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC);
983
984 if (rc >= 0 && rc & M41T80_SEC_ST)
985 rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC,
986 rc & ~M41T80_SEC_ST);
987 if (rc < 0) {
988 dev_err(&client->dev, "Can't clear ST bit\n");
989 return rc;
990 }
991
992#ifdef CONFIG_RTC_DRV_M41T80_WDT
993 if (m41t80_data->features & M41T80_FEATURE_HT) {
994 save_client = client;
995 rc = misc_register(&wdt_dev);
996 if (rc)
997 return rc;
998 rc = register_reboot_notifier(&wdt_notifier);
999 if (rc) {
1000 misc_deregister(&wdt_dev);
1001 return rc;
1002 }
1003 }
1004#endif
1005#ifdef CONFIG_COMMON_CLK
1006 if (m41t80_data->features & M41T80_FEATURE_SQ)
1007 m41t80_sqw_register_clk(m41t80_data);
1008#endif
1009
1010 rc = devm_rtc_register_device(m41t80_data->rtc);
1011 if (rc)
1012 return rc;
1013
1014 return 0;
1015}
1016
1017static void m41t80_remove(struct i2c_client *client)
1018{
1019#ifdef CONFIG_RTC_DRV_M41T80_WDT
1020 struct m41t80_data *clientdata = i2c_get_clientdata(client);
1021
1022 if (clientdata->features & M41T80_FEATURE_HT) {
1023 misc_deregister(&wdt_dev);
1024 unregister_reboot_notifier(&wdt_notifier);
1025 }
1026#endif
1027}
1028
1029static struct i2c_driver m41t80_driver = {
1030 .driver = {
1031 .name = "rtc-m41t80",
1032 .of_match_table = of_match_ptr(m41t80_of_match),
1033 .pm = &m41t80_pm,
1034 },
1035 .probe = m41t80_probe,
1036 .remove = m41t80_remove,
1037 .id_table = m41t80_id,
1038};
1039
1040module_i2c_driver(m41t80_driver);
1041
1042MODULE_AUTHOR("Alexander Bigga <[email protected]>");
1043MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver");
1044MODULE_LICENSE("GPL");