| 1 | |
| 2 | |
| 3 | * Adaptec AAC series RAID controller driver
|
| 4 | * (c) Copyright 2001 Red Hat Inc.
|
| 5 | *
|
| 6 | * based on the old aacraid driver that is..
|
| 7 | * Adaptec aacraid device driver for Linux.
|
| 8 | *
|
| 9 | * Copyright (c) 2000-2010 Adaptec, Inc.
|
| 10 | * 2010-2015 PMC-Sierra, Inc. ([email protected])
|
| 11 | * 2016-2017 Microsemi Corp. ([email protected])
|
| 12 | *
|
| 13 | * Module Name:
|
| 14 | * comminit.c
|
| 15 | *
|
| 16 | * Abstract: This supports the initialization of the host adapter commuication interface.
|
| 17 | * This is a platform dependent module for the pci cyclone board.
|
| 18 |
|
| 19 |
|
| 20 | #include <linux/kernel.h>
|
| 21 | #include <linux/init.h>
|
| 22 | #include <linux/types.h>
|
| 23 | #include <linux/pci.h>
|
| 24 | #include <linux/spinlock.h>
|
| 25 | #include <linux/slab.h>
|
| 26 | #include <linux/blkdev.h>
|
| 27 | #include <linux/delay.h>
|
| 28 | #include <linux/completion.h>
|
| 29 | #include <linux/mm.h>
|
| 30 | #include <scsi/scsi_host.h>
|
| 31 | #include <scsi/scsi_device.h>
|
| 32 | #include <scsi/scsi_cmnd.h>
|
| 33 |
|
| 34 | #include "aacraid.h"
|
| 35 |
|
| 36 | struct aac_common aac_config = {
|
| 37 | .irq_mod = 1
|
| 38 | };
|
| 39 |
|
| 40 | static inline int aac_is_msix_mode(struct aac_dev *dev)
|
| 41 | {
|
| 42 | u32 status = 0;
|
| 43 |
|
| 44 | if (aac_is_src(dev))
|
| 45 | status = src_readl(dev, MUnit.OMR);
|
| 46 | return (status & AAC_INT_MODE_MSIX);
|
| 47 | }
|
| 48 |
|
| 49 | static inline void aac_change_to_intx(struct aac_dev *dev)
|
| 50 | {
|
| 51 | aac_src_access_devreg(dev, AAC_DISABLE_MSIX);
|
| 52 | aac_src_access_devreg(dev, AAC_ENABLE_INTX);
|
| 53 | }
|
| 54 |
|
| 55 | static int aac_alloc_comm(struct aac_dev *dev, void **commaddr, unsigned long commsize, unsigned long commalign)
|
| 56 | {
|
| 57 | unsigned char *base;
|
| 58 | unsigned long size, align;
|
| 59 | const unsigned long fibsize = dev->max_fib_size;
|
| 60 | const unsigned long printfbufsiz = 256;
|
| 61 | unsigned long host_rrq_size, aac_init_size;
|
| 62 | union aac_init *init;
|
| 63 | dma_addr_t phys;
|
| 64 | unsigned long aac_max_hostphysmempages;
|
| 65 |
|
| 66 | if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) ||
|
| 67 | (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) ||
|
| 68 | (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 &&
|
| 69 | !dev->sa_firmware)) {
|
| 70 | host_rrq_size =
|
| 71 | (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB)
|
| 72 | * sizeof(u32);
|
| 73 | aac_init_size = sizeof(union aac_init);
|
| 74 | } else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 &&
|
| 75 | dev->sa_firmware) {
|
| 76 | host_rrq_size = (dev->scsi_host_ptr->can_queue
|
| 77 | + AAC_NUM_MGT_FIB) * sizeof(u32) * AAC_MAX_MSIX;
|
| 78 | aac_init_size = sizeof(union aac_init) +
|
| 79 | (AAC_MAX_HRRQ - 1) * sizeof(struct _rrq);
|
| 80 | } else {
|
| 81 | host_rrq_size = 0;
|
| 82 | aac_init_size = sizeof(union aac_init);
|
| 83 | }
|
| 84 | size = fibsize + aac_init_size + commsize + commalign +
|
| 85 | printfbufsiz + host_rrq_size;
|
| 86 |
|
| 87 | base = dma_alloc_coherent(&dev->pdev->dev, size, &phys, GFP_KERNEL);
|
| 88 | if (base == NULL) {
|
| 89 | printk(KERN_ERR "aacraid: unable to create mapping.\n");
|
| 90 | return 0;
|
| 91 | }
|
| 92 |
|
| 93 | dev->comm_addr = (void *)base;
|
| 94 | dev->comm_phys = phys;
|
| 95 | dev->comm_size = size;
|
| 96 |
|
| 97 | if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) ||
|
| 98 | (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) ||
|
| 99 | (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3)) {
|
| 100 | dev->host_rrq = (u32 *)(base + fibsize);
|
| 101 | dev->host_rrq_pa = phys + fibsize;
|
| 102 | memset(dev->host_rrq, 0, host_rrq_size);
|
| 103 | }
|
| 104 |
|
| 105 | dev->init = (union aac_init *)(base + fibsize + host_rrq_size);
|
| 106 | dev->init_pa = phys + fibsize + host_rrq_size;
|
| 107 |
|
| 108 | init = dev->init;
|
| 109 |
|
| 110 | if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
|
| 111 | int i;
|
| 112 | u64 addr;
|
| 113 |
|
| 114 | init->r8.init_struct_revision =
|
| 115 | cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_8);
|
| 116 | init->r8.init_flags = cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED |
|
| 117 | INITFLAGS_DRIVER_USES_UTC_TIME |
|
| 118 | INITFLAGS_DRIVER_SUPPORTS_PM);
|
| 119 | init->r8.init_flags |=
|
| 120 | cpu_to_le32(INITFLAGS_DRIVER_SUPPORTS_HBA_MODE);
|
| 121 | init->r8.rr_queue_count = cpu_to_le32(dev->max_msix);
|
| 122 | init->r8.max_io_size =
|
| 123 | cpu_to_le32(dev->scsi_host_ptr->max_sectors << 9);
|
| 124 | init->r8.max_num_aif = init->r8.reserved1 =
|
| 125 | init->r8.reserved2 = 0;
|
| 126 |
|
| 127 | for (i = 0; i < dev->max_msix; i++) {
|
| 128 | addr = (u64)dev->host_rrq_pa + dev->vector_cap * i *
|
| 129 | sizeof(u32);
|
| 130 | init->r8.rrq[i].host_addr_high = cpu_to_le32(
|
| 131 | upper_32_bits(addr));
|
| 132 | init->r8.rrq[i].host_addr_low = cpu_to_le32(
|
| 133 | lower_32_bits(addr));
|
| 134 | init->r8.rrq[i].msix_id = i;
|
| 135 | init->r8.rrq[i].element_count = cpu_to_le16(
|
| 136 | (u16)dev->vector_cap);
|
| 137 | init->r8.rrq[i].comp_thresh =
|
| 138 | init->r8.rrq[i].unused = 0;
|
| 139 | }
|
| 140 |
|
| 141 | pr_warn("aacraid: Comm Interface type3 enabled\n");
|
| 142 | } else {
|
| 143 | init->r7.init_struct_revision =
|
| 144 | cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION);
|
| 145 | if (dev->max_fib_size != sizeof(struct hw_fib))
|
| 146 | init->r7.init_struct_revision =
|
| 147 | cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4);
|
| 148 | init->r7.no_of_msix_vectors = cpu_to_le32(SA_MINIPORT_REVISION);
|
| 149 | init->r7.fsrev = cpu_to_le32(dev->fsrev);
|
| 150 |
|
| 151 | |
| 152 | * Adapter Fibs are the first thing allocated so that they
|
| 153 | * start page aligned
|
| 154 |
|
| 155 | dev->aif_base_va = (struct hw_fib *)base;
|
| 156 |
|
| 157 | init->r7.adapter_fibs_virtual_address = 0;
|
| 158 | init->r7.adapter_fibs_physical_address = cpu_to_le32((u32)phys);
|
| 159 | init->r7.adapter_fibs_size = cpu_to_le32(fibsize);
|
| 160 | init->r7.adapter_fib_align = cpu_to_le32(sizeof(struct hw_fib));
|
| 161 |
|
| 162 | |
| 163 | * number of 4k pages of host physical memory. The aacraid fw
|
| 164 | * needs this number to be less than 4gb worth of pages. New
|
| 165 | * firmware doesn't have any issues with the mapping system, but
|
| 166 | * older Firmware did, and had *troubles* dealing with the math
|
| 167 | * overloading past 32 bits, thus we must limit this field.
|
| 168 |
|
| 169 | aac_max_hostphysmempages =
|
| 170 | dma_get_required_mask(&dev->pdev->dev) >> 12;
|
| 171 | if (aac_max_hostphysmempages < AAC_MAX_HOSTPHYSMEMPAGES)
|
| 172 | init->r7.host_phys_mem_pages =
|
| 173 | cpu_to_le32(aac_max_hostphysmempages);
|
| 174 | else
|
| 175 | init->r7.host_phys_mem_pages =
|
| 176 | cpu_to_le32(AAC_MAX_HOSTPHYSMEMPAGES);
|
| 177 |
|
| 178 | init->r7.init_flags =
|
| 179 | cpu_to_le32(INITFLAGS_DRIVER_USES_UTC_TIME |
|
| 180 | INITFLAGS_DRIVER_SUPPORTS_PM);
|
| 181 | init->r7.max_io_commands =
|
| 182 | cpu_to_le32(dev->scsi_host_ptr->can_queue +
|
| 183 | AAC_NUM_MGT_FIB);
|
| 184 | init->r7.max_io_size =
|
| 185 | cpu_to_le32(dev->scsi_host_ptr->max_sectors << 9);
|
| 186 | init->r7.max_fib_size = cpu_to_le32(dev->max_fib_size);
|
| 187 | init->r7.max_num_aif = cpu_to_le32(dev->max_num_aif);
|
| 188 |
|
| 189 | if (dev->comm_interface == AAC_COMM_MESSAGE) {
|
| 190 | init->r7.init_flags |=
|
| 191 | cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED);
|
| 192 | pr_warn("aacraid: Comm Interface enabled\n");
|
| 193 | } else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) {
|
| 194 | init->r7.init_struct_revision =
|
| 195 | cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_6);
|
| 196 | init->r7.init_flags |=
|
| 197 | cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED |
|
| 198 | INITFLAGS_NEW_COMM_TYPE1_SUPPORTED |
|
| 199 | INITFLAGS_FAST_JBOD_SUPPORTED);
|
| 200 | init->r7.host_rrq_addr_high =
|
| 201 | cpu_to_le32(upper_32_bits(dev->host_rrq_pa));
|
| 202 | init->r7.host_rrq_addr_low =
|
| 203 | cpu_to_le32(lower_32_bits(dev->host_rrq_pa));
|
| 204 | pr_warn("aacraid: Comm Interface type1 enabled\n");
|
| 205 | } else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) {
|
| 206 | init->r7.init_struct_revision =
|
| 207 | cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_7);
|
| 208 | init->r7.init_flags |=
|
| 209 | cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED |
|
| 210 | INITFLAGS_NEW_COMM_TYPE2_SUPPORTED |
|
| 211 | INITFLAGS_FAST_JBOD_SUPPORTED);
|
| 212 | init->r7.host_rrq_addr_high =
|
| 213 | cpu_to_le32(upper_32_bits(dev->host_rrq_pa));
|
| 214 | init->r7.host_rrq_addr_low =
|
| 215 | cpu_to_le32(lower_32_bits(dev->host_rrq_pa));
|
| 216 | init->r7.no_of_msix_vectors =
|
| 217 | cpu_to_le32(dev->max_msix);
|
| 218 |
|
| 219 | pr_warn("aacraid: Comm Interface type2 enabled\n");
|
| 220 | }
|
| 221 | }
|
| 222 |
|
| 223 | |
| 224 | * Increment the base address by the amount already used
|
| 225 |
|
| 226 | base = base + fibsize + host_rrq_size + aac_init_size;
|
| 227 | phys = (dma_addr_t)((ulong)phys + fibsize + host_rrq_size +
|
| 228 | aac_init_size);
|
| 229 |
|
| 230 | |
| 231 | * Align the beginning of Headers to commalign
|
| 232 |
|
| 233 | align = (commalign - ((uintptr_t)(base) & (commalign - 1)));
|
| 234 | base = base + align;
|
| 235 | phys = phys + align;
|
| 236 | |
| 237 | * Fill in addresses of the Comm Area Headers and Queues
|
| 238 |
|
| 239 | *commaddr = base;
|
| 240 | if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3)
|
| 241 | init->r7.comm_header_address = cpu_to_le32((u32)phys);
|
| 242 | |
| 243 | * Increment the base address by the size of the CommArea
|
| 244 |
|
| 245 | base = base + commsize;
|
| 246 | phys = phys + commsize;
|
| 247 | |
| 248 | * Place the Printf buffer area after the Fast I/O comm area.
|
| 249 |
|
| 250 | dev->printfbuf = (void *)base;
|
| 251 | if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3) {
|
| 252 | init->r7.printfbuf = cpu_to_le32(phys);
|
| 253 | init->r7.printfbufsiz = cpu_to_le32(printfbufsiz);
|
| 254 | }
|
| 255 | memset(base, 0, printfbufsiz);
|
| 256 | return 1;
|
| 257 | }
|
| 258 |
|
| 259 | static void aac_queue_init(struct aac_dev * dev, struct aac_queue * q, u32 *mem, int qsize)
|
| 260 | {
|
| 261 | atomic_set(&q->numpending, 0);
|
| 262 | q->dev = dev;
|
| 263 | init_waitqueue_head(&q->cmdready);
|
| 264 | INIT_LIST_HEAD(&q->cmdq);
|
| 265 | init_waitqueue_head(&q->qfull);
|
| 266 | spin_lock_init(&q->lockdata);
|
| 267 | q->lock = &q->lockdata;
|
| 268 | q->headers.producer = (__le32 *)mem;
|
| 269 | q->headers.consumer = (__le32 *)(mem+1);
|
| 270 | *(q->headers.producer) = cpu_to_le32(qsize);
|
| 271 | *(q->headers.consumer) = cpu_to_le32(qsize);
|
| 272 | q->entries = qsize;
|
| 273 | }
|
| 274 |
|
| 275 | static bool wait_for_io_iter(struct scsi_cmnd *cmd, void *data)
|
| 276 | {
|
| 277 | int *active = data;
|
| 278 |
|
| 279 | if (aac_priv(cmd)->owner == AAC_OWNER_FIRMWARE)
|
| 280 | *active = *active + 1;
|
| 281 | return true;
|
| 282 | }
|
| 283 | static void aac_wait_for_io_completion(struct aac_dev *aac)
|
| 284 | {
|
| 285 | int i = 0, active;
|
| 286 |
|
| 287 | for (i = 60; i; --i) {
|
| 288 |
|
| 289 | active = 0;
|
| 290 | scsi_host_busy_iter(aac->scsi_host_ptr,
|
| 291 | wait_for_io_iter, &active);
|
| 292 | |
| 293 | * We can exit If all the commands are complete
|
| 294 |
|
| 295 | if (active == 0)
|
| 296 | break;
|
| 297 | dev_info(&aac->pdev->dev,
|
| 298 | "Wait for %d commands to complete\n", active);
|
| 299 | ssleep(1);
|
| 300 | }
|
| 301 | if (active)
|
| 302 | dev_err(&aac->pdev->dev,
|
| 303 | "%d outstanding commands during shutdown\n", active);
|
| 304 | }
|
| 305 |
|
| 306 | |
| 307 | * aac_send_shutdown - shutdown an adapter
|
| 308 | * @dev: Adapter to shutdown
|
| 309 | *
|
| 310 | * This routine will send a VM_CloseAll (shutdown) request to the adapter.
|
| 311 |
|
| 312 |
|
| 313 | int aac_send_shutdown(struct aac_dev * dev)
|
| 314 | {
|
| 315 | struct fib * fibctx;
|
| 316 | struct aac_close *cmd;
|
| 317 | int status = 0;
|
| 318 |
|
| 319 | if (aac_adapter_check_health(dev))
|
| 320 | return status;
|
| 321 |
|
| 322 | if (!dev->adapter_shutdown) {
|
| 323 | mutex_lock(&dev->ioctl_mutex);
|
| 324 | dev->adapter_shutdown = 1;
|
| 325 | mutex_unlock(&dev->ioctl_mutex);
|
| 326 | }
|
| 327 |
|
| 328 | aac_wait_for_io_completion(dev);
|
| 329 |
|
| 330 | fibctx = aac_fib_alloc(dev);
|
| 331 | if (!fibctx)
|
| 332 | return -ENOMEM;
|
| 333 | aac_fib_init(fibctx);
|
| 334 |
|
| 335 | cmd = (struct aac_close *) fib_data(fibctx);
|
| 336 | cmd->command = cpu_to_le32(VM_CloseAll);
|
| 337 | cmd->cid = cpu_to_le32(0xfffffffe);
|
| 338 |
|
| 339 | status = aac_fib_send(ContainerCommand,
|
| 340 | fibctx,
|
| 341 | sizeof(struct aac_close),
|
| 342 | FsaNormal,
|
| 343 | -2 , 1,
|
| 344 | NULL, NULL);
|
| 345 |
|
| 346 | if (status >= 0)
|
| 347 | aac_fib_complete(fibctx);
|
| 348 |
|
| 349 | if (status != -ERESTARTSYS)
|
| 350 | aac_fib_free(fibctx);
|
| 351 | if (aac_is_src(dev) &&
|
| 352 | dev->msi_enabled)
|
| 353 | aac_set_intx_mode(dev);
|
| 354 | return status;
|
| 355 | }
|
| 356 |
|
| 357 | |
| 358 | * aac_comm_init - Initialise FSA data structures
|
| 359 | * @dev: Adapter to initialise
|
| 360 | *
|
| 361 | * Initializes the data structures that are required for the FSA commuication
|
| 362 | * interface to operate.
|
| 363 | * Returns
|
| 364 | * 1 - if we were able to init the commuication interface.
|
| 365 | * 0 - If there were errors initing. This is a fatal error.
|
| 366 |
|
| 367 |
|
| 368 | static int aac_comm_init(struct aac_dev * dev)
|
| 369 | {
|
| 370 | unsigned long hdrsize = (sizeof(u32) * NUMBER_OF_COMM_QUEUES) * 2;
|
| 371 | unsigned long queuesize = sizeof(struct aac_entry) * TOTAL_QUEUE_ENTRIES;
|
| 372 | u32 *headers;
|
| 373 | struct aac_entry * queues;
|
| 374 | unsigned long size;
|
| 375 | struct aac_queue_block * comm = dev->queues;
|
| 376 | |
| 377 | * Now allocate and initialize the zone structures used as our
|
| 378 | * pool of FIB context records. The size of the zone is based
|
| 379 | * on the system memory size. We also initialize the mutex used
|
| 380 | * to protect the zone.
|
| 381 |
|
| 382 | spin_lock_init(&dev->fib_lock);
|
| 383 |
|
| 384 | |
| 385 | * Allocate the physically contiguous space for the commuication
|
| 386 | * queue headers.
|
| 387 |
|
| 388 |
|
| 389 | size = hdrsize + queuesize;
|
| 390 |
|
| 391 | if (!aac_alloc_comm(dev, (void * *)&headers, size, QUEUE_ALIGNMENT))
|
| 392 | return -ENOMEM;
|
| 393 |
|
| 394 | queues = (struct aac_entry *)(((ulong)headers) + hdrsize);
|
| 395 |
|
| 396 |
|
| 397 | comm->queue[HostNormCmdQueue].base = queues;
|
| 398 | aac_queue_init(dev, &comm->queue[HostNormCmdQueue], headers, HOST_NORM_CMD_ENTRIES);
|
| 399 | queues += HOST_NORM_CMD_ENTRIES;
|
| 400 | headers += 2;
|
| 401 |
|
| 402 |
|
| 403 | comm->queue[HostHighCmdQueue].base = queues;
|
| 404 | aac_queue_init(dev, &comm->queue[HostHighCmdQueue], headers, HOST_HIGH_CMD_ENTRIES);
|
| 405 |
|
| 406 | queues += HOST_HIGH_CMD_ENTRIES;
|
| 407 | headers +=2;
|
| 408 |
|
| 409 |
|
| 410 | comm->queue[AdapNormCmdQueue].base = queues;
|
| 411 | aac_queue_init(dev, &comm->queue[AdapNormCmdQueue], headers, ADAP_NORM_CMD_ENTRIES);
|
| 412 |
|
| 413 | queues += ADAP_NORM_CMD_ENTRIES;
|
| 414 | headers += 2;
|
| 415 |
|
| 416 |
|
| 417 | comm->queue[AdapHighCmdQueue].base = queues;
|
| 418 | aac_queue_init(dev, &comm->queue[AdapHighCmdQueue], headers, ADAP_HIGH_CMD_ENTRIES);
|
| 419 |
|
| 420 | queues += ADAP_HIGH_CMD_ENTRIES;
|
| 421 | headers += 2;
|
| 422 |
|
| 423 |
|
| 424 | comm->queue[HostNormRespQueue].base = queues;
|
| 425 | aac_queue_init(dev, &comm->queue[HostNormRespQueue], headers, HOST_NORM_RESP_ENTRIES);
|
| 426 | queues += HOST_NORM_RESP_ENTRIES;
|
| 427 | headers += 2;
|
| 428 |
|
| 429 |
|
| 430 | comm->queue[HostHighRespQueue].base = queues;
|
| 431 | aac_queue_init(dev, &comm->queue[HostHighRespQueue], headers, HOST_HIGH_RESP_ENTRIES);
|
| 432 |
|
| 433 | queues += HOST_HIGH_RESP_ENTRIES;
|
| 434 | headers += 2;
|
| 435 |
|
| 436 |
|
| 437 | comm->queue[AdapNormRespQueue].base = queues;
|
| 438 | aac_queue_init(dev, &comm->queue[AdapNormRespQueue], headers, ADAP_NORM_RESP_ENTRIES);
|
| 439 |
|
| 440 | queues += ADAP_NORM_RESP_ENTRIES;
|
| 441 | headers += 2;
|
| 442 |
|
| 443 |
|
| 444 | comm->queue[AdapHighRespQueue].base = queues;
|
| 445 | aac_queue_init(dev, &comm->queue[AdapHighRespQueue], headers, ADAP_HIGH_RESP_ENTRIES);
|
| 446 |
|
| 447 | comm->queue[AdapNormCmdQueue].lock = comm->queue[HostNormRespQueue].lock;
|
| 448 | comm->queue[AdapHighCmdQueue].lock = comm->queue[HostHighRespQueue].lock;
|
| 449 | comm->queue[AdapNormRespQueue].lock = comm->queue[HostNormCmdQueue].lock;
|
| 450 | comm->queue[AdapHighRespQueue].lock = comm->queue[HostHighCmdQueue].lock;
|
| 451 |
|
| 452 | return 0;
|
| 453 | }
|
| 454 |
|
| 455 | void aac_define_int_mode(struct aac_dev *dev)
|
| 456 | {
|
| 457 | int i, msi_count, min_msix;
|
| 458 |
|
| 459 | msi_count = i = 0;
|
| 460 |
|
| 461 | if (dev->max_msix == 0 ||
|
| 462 | dev->pdev->device == PMC_DEVICE_S6 ||
|
| 463 | dev->sync_mode) {
|
| 464 | dev->max_msix = 1;
|
| 465 | dev->vector_cap =
|
| 466 | dev->scsi_host_ptr->can_queue +
|
| 467 | AAC_NUM_MGT_FIB;
|
| 468 | return;
|
| 469 | }
|
| 470 |
|
| 471 |
|
| 472 | msi_count = min(dev->max_msix,
|
| 473 | (unsigned int)num_online_cpus());
|
| 474 |
|
| 475 | dev->max_msix = msi_count;
|
| 476 |
|
| 477 | if (msi_count > AAC_MAX_MSIX)
|
| 478 | msi_count = AAC_MAX_MSIX;
|
| 479 |
|
| 480 | if (msi_count > 1 &&
|
| 481 | pci_find_capability(dev->pdev, PCI_CAP_ID_MSIX)) {
|
| 482 | min_msix = 2;
|
| 483 | i = pci_alloc_irq_vectors(dev->pdev,
|
| 484 | min_msix, msi_count, PCI_IRQ_MSIX);
|
| 485 | if (i > 0) {
|
| 486 | dev->msi_enabled = 1;
|
| 487 | msi_count = i;
|
| 488 | } else {
|
| 489 | dev->msi_enabled = 0;
|
| 490 | dev_err(&dev->pdev->dev,
|
| 491 | "MSIX not supported!! Will try INTX 0x%x.\n", i);
|
| 492 | }
|
| 493 | }
|
| 494 |
|
| 495 | if (!dev->msi_enabled)
|
| 496 | dev->max_msix = msi_count = 1;
|
| 497 | else {
|
| 498 | if (dev->max_msix > msi_count)
|
| 499 | dev->max_msix = msi_count;
|
| 500 | }
|
| 501 | if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 && dev->sa_firmware)
|
| 502 | dev->vector_cap = dev->scsi_host_ptr->can_queue +
|
| 503 | AAC_NUM_MGT_FIB;
|
| 504 | else
|
| 505 | dev->vector_cap = (dev->scsi_host_ptr->can_queue +
|
| 506 | AAC_NUM_MGT_FIB) / msi_count;
|
| 507 |
|
| 508 | }
|
| 509 | struct aac_dev *aac_init_adapter(struct aac_dev *dev)
|
| 510 | {
|
| 511 | u32 status[5];
|
| 512 | struct Scsi_Host * host = dev->scsi_host_ptr;
|
| 513 | extern int aac_sync_mode;
|
| 514 |
|
| 515 | |
| 516 | * Check the preferred comm settings, defaults from template.
|
| 517 |
|
| 518 | dev->management_fib_count = 0;
|
| 519 | spin_lock_init(&dev->manage_lock);
|
| 520 | spin_lock_init(&dev->sync_lock);
|
| 521 | spin_lock_init(&dev->iq_lock);
|
| 522 | dev->max_fib_size = sizeof(struct hw_fib);
|
| 523 | dev->sg_tablesize = host->sg_tablesize = (dev->max_fib_size
|
| 524 | - sizeof(struct aac_fibhdr) - sizeof(struct aac_write))
|
| 525 | / sizeof(struct sgentry);
|
| 526 | dev->comm_interface = AAC_COMM_PRODUCER;
|
| 527 | dev->raw_io_interface = dev->raw_io_64 = 0;
|
| 528 |
|
| 529 |
|
| 530 | |
| 531 | * Enable INTX mode, if not done already Enabled
|
| 532 |
|
| 533 | if (aac_is_msix_mode(dev)) {
|
| 534 | aac_change_to_intx(dev);
|
| 535 | dev_info(&dev->pdev->dev, "Changed firmware to INTX mode");
|
| 536 | }
|
| 537 |
|
| 538 | if ((!aac_adapter_sync_cmd(dev, GET_ADAPTER_PROPERTIES,
|
| 539 | 0, 0, 0, 0, 0, 0,
|
| 540 | status+0, status+1, status+2, status+3, status+4)) &&
|
| 541 | (status[0] == 0x00000001)) {
|
| 542 | dev->doorbell_mask = status[3];
|
| 543 | if (status[1] & AAC_OPT_NEW_COMM_64)
|
| 544 | dev->raw_io_64 = 1;
|
| 545 | dev->sync_mode = aac_sync_mode;
|
| 546 | if (dev->a_ops.adapter_comm &&
|
| 547 | (status[1] & AAC_OPT_NEW_COMM)) {
|
| 548 | dev->comm_interface = AAC_COMM_MESSAGE;
|
| 549 | dev->raw_io_interface = 1;
|
| 550 | if ((status[1] & AAC_OPT_NEW_COMM_TYPE1)) {
|
| 551 |
|
| 552 | dev->comm_interface = AAC_COMM_MESSAGE_TYPE1;
|
| 553 | } else if (status[1] & AAC_OPT_NEW_COMM_TYPE2) {
|
| 554 |
|
| 555 | dev->comm_interface = AAC_COMM_MESSAGE_TYPE2;
|
| 556 | } else if (status[1] & AAC_OPT_NEW_COMM_TYPE3) {
|
| 557 |
|
| 558 | dev->comm_interface = AAC_COMM_MESSAGE_TYPE3;
|
| 559 | } else if (status[1] & AAC_OPT_NEW_COMM_TYPE4) {
|
| 560 |
|
| 561 | dev->comm_interface = AAC_COMM_MESSAGE_TYPE2;
|
| 562 | dev->sync_mode = 1;
|
| 563 | }
|
| 564 | }
|
| 565 | if ((status[1] & le32_to_cpu(AAC_OPT_EXTENDED)) &&
|
| 566 | (status[4] & le32_to_cpu(AAC_EXTOPT_SA_FIRMWARE)))
|
| 567 | dev->sa_firmware = 1;
|
| 568 | else
|
| 569 | dev->sa_firmware = 0;
|
| 570 |
|
| 571 | if (status[4] & le32_to_cpu(AAC_EXTOPT_SOFT_RESET))
|
| 572 | dev->soft_reset_support = 1;
|
| 573 | else
|
| 574 | dev->soft_reset_support = 0;
|
| 575 |
|
| 576 | if ((dev->comm_interface == AAC_COMM_MESSAGE) &&
|
| 577 | (status[2] > dev->base_size)) {
|
| 578 | aac_adapter_ioremap(dev, 0);
|
| 579 | dev->base_size = status[2];
|
| 580 | if (aac_adapter_ioremap(dev, status[2])) {
|
| 581 |
|
| 582 | dev->comm_interface = AAC_COMM_PRODUCER;
|
| 583 | if (aac_adapter_ioremap(dev, AAC_MIN_FOOTPRINT_SIZE)) {
|
| 584 | printk(KERN_WARNING
|
| 585 | "aacraid: unable to map adapter.\n");
|
| 586 | return NULL;
|
| 587 | }
|
| 588 | }
|
| 589 | }
|
| 590 | }
|
| 591 | dev->max_msix = 0;
|
| 592 | dev->msi_enabled = 0;
|
| 593 | dev->adapter_shutdown = 0;
|
| 594 | if ((!aac_adapter_sync_cmd(dev, GET_COMM_PREFERRED_SETTINGS,
|
| 595 | 0, 0, 0, 0, 0, 0,
|
| 596 | status+0, status+1, status+2, status+3, status+4))
|
| 597 | && (status[0] == 0x00000001)) {
|
| 598 | |
| 599 | * status[1] >> 16 maximum command size in KB
|
| 600 | * status[1] & 0xFFFF maximum FIB size
|
| 601 | * status[2] >> 16 maximum SG elements to driver
|
| 602 | * status[2] & 0xFFFF maximum SG elements from driver
|
| 603 | * status[3] & 0xFFFF maximum number FIBs outstanding
|
| 604 |
|
| 605 | host->max_sectors = (status[1] >> 16) << 1;
|
| 606 |
|
| 607 | dev->max_fib_size = status[1] & 0xFFE0;
|
| 608 | host->sg_tablesize = status[2] >> 16;
|
| 609 | dev->sg_tablesize = status[2] & 0xFFFF;
|
| 610 | if (aac_is_src(dev)) {
|
| 611 | if (host->can_queue > (status[3] >> 16) -
|
| 612 | AAC_NUM_MGT_FIB)
|
| 613 | host->can_queue = (status[3] >> 16) -
|
| 614 | AAC_NUM_MGT_FIB;
|
| 615 | } else if (host->can_queue > (status[3] & 0xFFFF) -
|
| 616 | AAC_NUM_MGT_FIB)
|
| 617 | host->can_queue = (status[3] & 0xFFFF) -
|
| 618 | AAC_NUM_MGT_FIB;
|
| 619 |
|
| 620 | dev->max_num_aif = status[4] & 0xFFFF;
|
| 621 | }
|
| 622 | if (numacb > 0) {
|
| 623 | if (numacb < host->can_queue)
|
| 624 | host->can_queue = numacb;
|
| 625 | else
|
| 626 | pr_warn("numacb=%d ignored\n", numacb);
|
| 627 | }
|
| 628 |
|
| 629 | if (aac_is_src(dev))
|
| 630 | aac_define_int_mode(dev);
|
| 631 | |
| 632 | * Ok now init the communication subsystem
|
| 633 |
|
| 634 |
|
| 635 | dev->queues = kzalloc_obj(struct aac_queue_block);
|
| 636 | if (dev->queues == NULL) {
|
| 637 | printk(KERN_ERR "Error could not allocate comm region.\n");
|
| 638 | return NULL;
|
| 639 | }
|
| 640 |
|
| 641 | if (aac_comm_init(dev)<0){
|
| 642 | kfree(dev->queues);
|
| 643 | dev->queues = NULL;
|
| 644 | return NULL;
|
| 645 | }
|
| 646 | |
| 647 | * Initialize the list of fibs
|
| 648 |
|
| 649 | if (aac_fib_setup(dev) < 0) {
|
| 650 | kfree(dev->queues);
|
| 651 | dev->queues = NULL;
|
| 652 | return NULL;
|
| 653 | }
|
| 654 |
|
| 655 | INIT_LIST_HEAD(&dev->fib_list);
|
| 656 | INIT_LIST_HEAD(&dev->sync_fib_list);
|
| 657 |
|
| 658 | return dev;
|
| 659 | }
|
| 660 |
|