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1// SPDX-License-Identifier: GPL-2.0+
2/*****************************************************************************/
3/*
4 * moxa.c -- MOXA Intellio family multiport serial driver.
5 *
6 * Copyright (C) 1999-2000 Moxa Technologies ([email protected]).
7 * Copyright (c) 2007 Jiri Slaby <[email protected]>
8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
11 */
12
13/*
14 * MOXA Intellio Series Driver
15 * for : LINUX
16 * date : 1999/1/7
17 * version : 5.1
18 */
19
20#include <linux/module.h>
21#include <linux/types.h>
22#include <linux/mm.h>
23#include <linux/ioport.h>
24#include <linux/errno.h>
25#include <linux/firmware.h>
26#include <linux/signal.h>
27#include <linux/sched.h>
28#include <linux/timer.h>
29#include <linux/interrupt.h>
30#include <linux/tty.h>
31#include <linux/tty_flip.h>
32#include <linux/major.h>
33#include <linux/string.h>
34#include <linux/fcntl.h>
35#include <linux/ptrace.h>
36#include <linux/serial.h>
37#include <linux/tty_driver.h>
38#include <linux/delay.h>
39#include <linux/pci.h>
40#include <linux/init.h>
41#include <linux/bitops.h>
42#include <linux/slab.h>
43#include <linux/ratelimit.h>
44
45#include <asm/io.h>
46
47/*
48 * System Configuration
49 */
50
51#define Magic_code 0x404
52
53/*
54 * for C218 BIOS initialization
55 */
56#define C218_ConfBase 0x800
57#define C218_status (C218_ConfBase + 0) /* BIOS running status */
58#define C218_diag (C218_ConfBase + 2) /* diagnostic status */
59#define C218_key (C218_ConfBase + 4) /* WORD (0x218 for C218) */
60#define C218DLoad_len (C218_ConfBase + 6) /* WORD */
61#define C218check_sum (C218_ConfBase + 8) /* BYTE */
62#define C218chksum_ok (C218_ConfBase + 0x0a) /* BYTE (1:ok) */
63#define C218_TestRx (C218_ConfBase + 0x10) /* 8 bytes for 8 ports */
64#define C218_TestTx (C218_ConfBase + 0x18) /* 8 bytes for 8 ports */
65#define C218_RXerr (C218_ConfBase + 0x20) /* 8 bytes for 8 ports */
66#define C218_ErrFlag (C218_ConfBase + 0x28) /* 8 bytes for 8 ports */
67
68#define C218_LoadBuf 0x0F00
69#define C218_KeyCode 0x218
70#define CP204J_KeyCode 0x204
71
72/*
73 * for C320 BIOS initialization
74 */
75#define C320_ConfBase 0x800
76#define C320_LoadBuf 0x0f00
77#define STS_init 0x05 /* for C320_status */
78
79#define C320_status C320_ConfBase + 0 /* BIOS running status */
80#define C320_diag C320_ConfBase + 2 /* diagnostic status */
81#define C320_key C320_ConfBase + 4 /* WORD (0320H for C320) */
82#define C320DLoad_len C320_ConfBase + 6 /* WORD */
83#define C320check_sum C320_ConfBase + 8 /* WORD */
84#define C320chksum_ok C320_ConfBase + 0x0a /* WORD (1:ok) */
85#define C320bapi_len C320_ConfBase + 0x0c /* WORD */
86#define C320UART_no C320_ConfBase + 0x0e /* WORD */
87
88#define C320_KeyCode 0x320
89
90#define FixPage_addr 0x0000 /* starting addr of static page */
91#define DynPage_addr 0x2000 /* starting addr of dynamic page */
92#define C218_start 0x3000 /* starting addr of C218 BIOS prg */
93#define Control_reg 0x1ff0 /* select page and reset control */
94#define HW_reset 0x80
95
96/*
97 * Function Codes
98 */
99#define FC_CardReset 0x80
100#define FC_ChannelReset 1 /* C320 firmware not supported */
101#define FC_EnableCH 2
102#define FC_DisableCH 3
103#define FC_SetParam 4
104#define FC_SetMode 5
105#define FC_SetRate 6
106#define FC_LineControl 7
107#define FC_LineStatus 8
108#define FC_XmitControl 9
109#define FC_FlushQueue 10
110#define FC_SendBreak 11
111#define FC_StopBreak 12
112#define FC_LoopbackON 13
113#define FC_LoopbackOFF 14
114#define FC_ClrIrqTable 15
115#define FC_SendXon 16
116#define FC_SetTermIrq 17 /* C320 firmware not supported */
117#define FC_SetCntIrq 18 /* C320 firmware not supported */
118#define FC_SetBreakIrq 19
119#define FC_SetLineIrq 20
120#define FC_SetFlowCtl 21
121#define FC_GenIrq 22
122#define FC_InCD180 23
123#define FC_OutCD180 24
124#define FC_InUARTreg 23
125#define FC_OutUARTreg 24
126#define FC_SetXonXoff 25
127#define FC_OutCD180CCR 26
128#define FC_ExtIQueue 27
129#define FC_ExtOQueue 28
130#define FC_ClrLineIrq 29
131#define FC_HWFlowCtl 30
132#define FC_GetClockRate 35
133#define FC_SetBaud 36
134#define FC_SetDataMode 41
135#define FC_GetCCSR 43
136#define FC_GetDataError 45
137#define FC_RxControl 50
138#define FC_ImmSend 51
139#define FC_SetXonState 52
140#define FC_SetXoffState 53
141#define FC_SetRxFIFOTrig 54
142#define FC_SetTxFIFOCnt 55
143#define FC_UnixRate 56
144#define FC_UnixResetTimer 57
145
146#define RxFIFOTrig1 0
147#define RxFIFOTrig4 1
148#define RxFIFOTrig8 2
149#define RxFIFOTrig14 3
150
151/*
152 * Dual-Ported RAM
153 */
154#define DRAM_global 0
155#define INT_data (DRAM_global + 0)
156#define Config_base (DRAM_global + 0x108)
157
158#define IRQindex (INT_data + 0)
159#define IRQpending (INT_data + 4)
160#define IRQtable (INT_data + 8)
161
162/*
163 * Interrupt Status
164 */
165#define IntrRx 0x01 /* receiver data O.K. */
166#define IntrTx 0x02 /* transmit buffer empty */
167#define IntrFunc 0x04 /* function complete */
168#define IntrBreak 0x08 /* received break */
169#define IntrLine 0x10 /* line status change
170 for transmitter */
171#define IntrIntr 0x20 /* received INTR code */
172#define IntrQuit 0x40 /* received QUIT code */
173#define IntrEOF 0x80 /* received EOF code */
174
175#define IntrRxTrigger 0x100 /* rx data count reach trigger value */
176#define IntrTxTrigger 0x200 /* tx data count below trigger value */
177
178#define Magic_no (Config_base + 0)
179#define Card_model_no (Config_base + 2)
180#define Total_ports (Config_base + 4)
181#define Module_cnt (Config_base + 8)
182#define Module_no (Config_base + 10)
183#define Timer_10ms (Config_base + 14)
184#define Disable_IRQ (Config_base + 20)
185#define TMS320_PORT1 (Config_base + 22)
186#define TMS320_PORT2 (Config_base + 24)
187#define TMS320_CLOCK (Config_base + 26)
188
189/*
190 * DATA BUFFER in DRAM
191 */
192#define Extern_table 0x400 /* Base address of the external table
193 (24 words * 64) total 3K bytes
194 (24 words * 128) total 6K bytes */
195#define Extern_size 0x60 /* 96 bytes */
196#define RXrptr 0x00 /* read pointer for RX buffer */
197#define RXwptr 0x02 /* write pointer for RX buffer */
198#define TXrptr 0x04 /* read pointer for TX buffer */
199#define TXwptr 0x06 /* write pointer for TX buffer */
200#define HostStat 0x08 /* IRQ flag and general flag */
201#define FlagStat 0x0A
202#define FlowControl 0x0C /* B7 B6 B5 B4 B3 B2 B1 B0 */
203 /* x x x x | | | | */
204 /* | | | + CTS flow */
205 /* | | +--- RTS flow */
206 /* | +------ TX Xon/Xoff */
207 /* +--------- RX Xon/Xoff */
208#define Break_cnt 0x0E /* received break count */
209#define CD180TXirq 0x10 /* if non-0: enable TX irq */
210#define RX_mask 0x12
211#define TX_mask 0x14
212#define Ofs_rxb 0x16
213#define Ofs_txb 0x18
214#define Page_rxb 0x1A
215#define Page_txb 0x1C
216#define EndPage_rxb 0x1E
217#define EndPage_txb 0x20
218#define Data_error 0x22
219#define RxTrigger 0x28
220#define TxTrigger 0x2a
221
222#define rRXwptr 0x34
223#define Low_water 0x36
224
225#define FuncCode 0x40
226#define FuncArg 0x42
227#define FuncArg1 0x44
228
229#define C218rx_size 0x2000 /* 8K bytes */
230#define C218tx_size 0x8000 /* 32K bytes */
231
232#define C218rx_mask (C218rx_size - 1)
233#define C218tx_mask (C218tx_size - 1)
234
235#define C320p8rx_size 0x2000
236#define C320p8tx_size 0x8000
237#define C320p8rx_mask (C320p8rx_size - 1)
238#define C320p8tx_mask (C320p8tx_size - 1)
239
240#define C320p16rx_size 0x2000
241#define C320p16tx_size 0x4000
242#define C320p16rx_mask (C320p16rx_size - 1)
243#define C320p16tx_mask (C320p16tx_size - 1)
244
245#define C320p24rx_size 0x2000
246#define C320p24tx_size 0x2000
247#define C320p24rx_mask (C320p24rx_size - 1)
248#define C320p24tx_mask (C320p24tx_size - 1)
249
250#define C320p32rx_size 0x1000
251#define C320p32tx_size 0x1000
252#define C320p32rx_mask (C320p32rx_size - 1)
253#define C320p32tx_mask (C320p32tx_size - 1)
254
255#define Page_size 0x2000U
256#define Page_mask (Page_size - 1)
257#define C218rx_spage 3
258#define C218tx_spage 4
259#define C218rx_pageno 1
260#define C218tx_pageno 4
261#define C218buf_pageno 5
262
263#define C320p8rx_spage 3
264#define C320p8tx_spage 4
265#define C320p8rx_pgno 1
266#define C320p8tx_pgno 4
267#define C320p8buf_pgno 5
268
269#define C320p16rx_spage 3
270#define C320p16tx_spage 4
271#define C320p16rx_pgno 1
272#define C320p16tx_pgno 2
273#define C320p16buf_pgno 3
274
275#define C320p24rx_spage 3
276#define C320p24tx_spage 4
277#define C320p24rx_pgno 1
278#define C320p24tx_pgno 1
279#define C320p24buf_pgno 2
280
281#define C320p32rx_spage 3
282#define C320p32tx_ofs C320p32rx_size
283#define C320p32tx_spage 3
284#define C320p32buf_pgno 1
285
286/*
287 * Host Status
288 */
289#define WakeupRx 0x01
290#define WakeupTx 0x02
291#define WakeupBreak 0x08
292#define WakeupLine 0x10
293#define WakeupIntr 0x20
294#define WakeupQuit 0x40
295#define WakeupEOF 0x80 /* used in VTIME control */
296#define WakeupRxTrigger 0x100
297#define WakeupTxTrigger 0x200
298/*
299 * Flag status
300 */
301#define Rx_over 0x01
302#define Xoff_state 0x02
303#define Tx_flowOff 0x04
304#define Tx_enable 0x08
305#define CTS_state 0x10
306#define DSR_state 0x20
307#define DCD_state 0x80
308/*
309 * FlowControl
310 */
311#define CTS_FlowCtl 1
312#define RTS_FlowCtl 2
313#define Tx_FlowCtl 4
314#define Rx_FlowCtl 8
315#define IXM_IXANY 0x10
316
317#define LowWater 128
318
319#define DTR_ON 1
320#define RTS_ON 2
321#define CTS_ON 1
322#define DSR_ON 2
323#define DCD_ON 8
324
325/* mode definition */
326#define MX_CS8 0x03
327#define MX_CS7 0x02
328#define MX_CS6 0x01
329#define MX_CS5 0x00
330
331#define MX_STOP1 0x00
332#define MX_STOP15 0x04
333#define MX_STOP2 0x08
334
335#define MX_PARNONE 0x00
336#define MX_PAREVEN 0x40
337#define MX_PARODD 0xC0
338#define MX_PARMARK 0xA0
339#define MX_PARSPACE 0x20
340
341#define MOXA_FW_HDRLEN 32
342
343#define MOXAMAJOR 172
344
345#define MAX_BOARDS 4 /* Don't change this value */
346#define MAX_PORTS_PER_BOARD 32 /* Don't change this value */
347#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
348
349#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_PCI)
350
351enum {
352 MOXA_BOARD_C218_PCI = 1,
353 MOXA_BOARD_C320_PCI,
354 MOXA_BOARD_CP204J,
355};
356
357static char *moxa_brdname[] =
358{
359 "C218 Turbo PCI series",
360 "C320 Turbo PCI series",
361 "CP-204J series",
362};
363
364static const struct pci_device_id moxa_pcibrds[] = {
365 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
366 .driver_data = MOXA_BOARD_C218_PCI },
367 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
368 .driver_data = MOXA_BOARD_C320_PCI },
369 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
370 .driver_data = MOXA_BOARD_CP204J },
371 { 0 }
372};
373MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
374
375struct moxa_port;
376
377static struct moxa_board_conf {
378 int boardType;
379 int numPorts;
380
381 unsigned int ready;
382
383 struct moxa_port *ports;
384
385 void __iomem *basemem;
386 void __iomem *intNdx;
387 void __iomem *intPend;
388 void __iomem *intTable;
389} moxa_boards[MAX_BOARDS];
390
391struct moxa_port {
392 struct tty_port port;
393 struct moxa_board_conf *board;
394 void __iomem *tableAddr;
395
396 int type;
397 int cflag;
398 unsigned long statusflags;
399
400 u8 DCDState; /* Protected by the port lock */
401 u8 lineCtrl;
402 u8 lowChkFlag;
403};
404
405/* statusflags */
406#define TXSTOPPED 1
407#define LOWWAIT 2
408#define EMPTYWAIT 3
409
410
411#define WAKEUP_CHARS 256
412
413static int ttymajor = MOXAMAJOR;
414static unsigned int moxaFuncTout = HZ / 2;
415static unsigned int moxaLowWaterChk;
416static DEFINE_MUTEX(moxa_openlock);
417static DEFINE_SPINLOCK(moxa_lock);
418
419MODULE_AUTHOR("William Chen");
420MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
421MODULE_LICENSE("GPL");
422MODULE_FIRMWARE("c218tunx.cod");
423MODULE_FIRMWARE("cp204unx.cod");
424MODULE_FIRMWARE("c320tunx.cod");
425
426module_param(ttymajor, int, 0);
427
428/*
429 * static functions:
430 */
431static int moxa_open(struct tty_struct *, struct file *);
432static void moxa_close(struct tty_struct *, struct file *);
433static ssize_t moxa_write(struct tty_struct *, const u8 *, size_t);
434static unsigned int moxa_write_room(struct tty_struct *);
435static void moxa_flush_buffer(struct tty_struct *);
436static unsigned int moxa_chars_in_buffer(struct tty_struct *);
437static void moxa_set_termios(struct tty_struct *, const struct ktermios *);
438static void moxa_stop(struct tty_struct *);
439static void moxa_start(struct tty_struct *);
440static void moxa_hangup(struct tty_struct *);
441static int moxa_tiocmget(struct tty_struct *tty);
442static int moxa_tiocmset(struct tty_struct *tty,
443 unsigned int set, unsigned int clear);
444static void moxa_poll(struct timer_list *);
445static void moxa_set_tty_param(struct tty_struct *, const struct ktermios *);
446static void moxa_shutdown(struct tty_port *);
447static bool moxa_carrier_raised(struct tty_port *);
448static void moxa_dtr_rts(struct tty_port *, bool);
449/*
450 * moxa board interface functions:
451 */
452static void MoxaPortEnable(struct moxa_port *);
453static void MoxaPortDisable(struct moxa_port *);
454static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
455static int MoxaPortGetLineOut(struct moxa_port *, bool *, bool *);
456static void MoxaPortLineCtrl(struct moxa_port *, bool, bool);
457static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
458static int MoxaPortLineStatus(struct moxa_port *);
459static void MoxaPortFlushData(struct moxa_port *, int);
460static ssize_t MoxaPortWriteData(struct tty_struct *, const u8 *, size_t);
461static int MoxaPortReadData(struct moxa_port *);
462static unsigned int MoxaPortTxQueue(struct moxa_port *);
463static int MoxaPortRxQueue(struct moxa_port *);
464static unsigned int MoxaPortTxFree(struct moxa_port *);
465static void MoxaPortTxDisable(struct moxa_port *);
466static void MoxaPortTxEnable(struct moxa_port *);
467static int moxa_get_serial_info(struct tty_struct *, struct serial_struct *);
468static int moxa_set_serial_info(struct tty_struct *, struct serial_struct *);
469static void MoxaSetFifo(struct moxa_port *port, int enable);
470
471/*
472 * I/O functions
473 */
474
475static DEFINE_SPINLOCK(moxafunc_lock);
476
477static void moxa_wait_finish(void __iomem *ofsAddr)
478{
479 unsigned long end = jiffies + moxaFuncTout;
480
481 while (readw(ofsAddr + FuncCode) != 0)
482 if (time_after(jiffies, end))
483 return;
484 if (readw(ofsAddr + FuncCode) != 0)
485 printk_ratelimited(KERN_WARNING "moxa function expired\n");
486}
487
488static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
489{
490 guard(spinlock_irqsave)(&moxafunc_lock);
491 writew(arg, ofsAddr + FuncArg);
492 writew(cmd, ofsAddr + FuncCode);
493 moxa_wait_finish(ofsAddr);
494}
495
496static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
497{
498 guard(spinlock_irqsave)(&moxafunc_lock);
499 writew(arg, ofsAddr + FuncArg);
500 writew(cmd, ofsAddr + FuncCode);
501 moxa_wait_finish(ofsAddr);
502
503 return readw(ofsAddr + FuncArg);
504}
505
506static void moxa_low_water_check(void __iomem *ofsAddr)
507{
508 u16 rptr, wptr, mask, len;
509
510 if (readb(ofsAddr + FlagStat) & Xoff_state) {
511 rptr = readw(ofsAddr + RXrptr);
512 wptr = readw(ofsAddr + RXwptr);
513 mask = readw(ofsAddr + RX_mask);
514 len = (wptr - rptr) & mask;
515 if (len <= Low_water)
516 moxafunc(ofsAddr, FC_SendXon, 0);
517 }
518}
519
520/*
521 * TTY operations
522 */
523
524static int moxa_break_ctl(struct tty_struct *tty, int state)
525{
526 struct moxa_port *port = tty->driver_data;
527
528 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
529 Magic_code);
530 return 0;
531}
532
533static const struct tty_operations moxa_ops = {
534 .open = moxa_open,
535 .close = moxa_close,
536 .write = moxa_write,
537 .write_room = moxa_write_room,
538 .flush_buffer = moxa_flush_buffer,
539 .chars_in_buffer = moxa_chars_in_buffer,
540 .set_termios = moxa_set_termios,
541 .stop = moxa_stop,
542 .start = moxa_start,
543 .hangup = moxa_hangup,
544 .break_ctl = moxa_break_ctl,
545 .tiocmget = moxa_tiocmget,
546 .tiocmset = moxa_tiocmset,
547 .set_serial = moxa_set_serial_info,
548 .get_serial = moxa_get_serial_info,
549};
550
551static const struct tty_port_operations moxa_port_ops = {
552 .carrier_raised = moxa_carrier_raised,
553 .dtr_rts = moxa_dtr_rts,
554 .shutdown = moxa_shutdown,
555};
556
557static struct tty_driver *moxaDriver;
558static DEFINE_TIMER(moxaTimer, moxa_poll);
559
560/*
561 * HW init
562 */
563
564static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
565{
566 switch (brd->boardType) {
567 case MOXA_BOARD_C218_PCI:
568 if (model != 1)
569 goto err;
570 break;
571 case MOXA_BOARD_CP204J:
572 if (model != 3)
573 goto err;
574 break;
575 default:
576 if (model != 2)
577 goto err;
578 break;
579 }
580 return 0;
581err:
582 return -EINVAL;
583}
584
585static int moxa_check_fw(const void *ptr)
586{
587 const __le16 *lptr = ptr;
588
589 if (*lptr != cpu_to_le16(0x7980))
590 return -EINVAL;
591
592 return 0;
593}
594
595static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
596 size_t len)
597{
598 void __iomem *baseAddr = brd->basemem;
599 u16 tmp;
600
601 writeb(HW_reset, baseAddr + Control_reg); /* reset */
602 msleep(10);
603 memset_io(baseAddr, 0, 4096);
604 memcpy_toio(baseAddr, buf, len); /* download BIOS */
605 writeb(0, baseAddr + Control_reg); /* restart */
606
607 msleep(2000);
608
609 switch (brd->boardType) {
610 case MOXA_BOARD_C218_PCI:
611 tmp = readw(baseAddr + C218_key);
612 if (tmp != C218_KeyCode)
613 goto err;
614 break;
615 case MOXA_BOARD_CP204J:
616 tmp = readw(baseAddr + C218_key);
617 if (tmp != CP204J_KeyCode)
618 goto err;
619 break;
620 default:
621 tmp = readw(baseAddr + C320_key);
622 if (tmp != C320_KeyCode)
623 goto err;
624 tmp = readw(baseAddr + C320_status);
625 if (tmp != STS_init) {
626 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
627 "module not found\n");
628 return -EIO;
629 }
630 break;
631 }
632
633 return 0;
634err:
635 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
636 return -EIO;
637}
638
639static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
640 size_t len)
641{
642 void __iomem *baseAddr = brd->basemem;
643
644 if (len < 7168) {
645 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
646 return -EINVAL;
647 }
648
649 writew(len - 7168 - 2, baseAddr + C320bapi_len);
650 writeb(1, baseAddr + Control_reg); /* Select Page 1 */
651 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
652 writeb(2, baseAddr + Control_reg); /* Select Page 2 */
653 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
654
655 return 0;
656}
657
658static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
659 size_t len)
660{
661 void __iomem *baseAddr = brd->basemem;
662 const __le16 *uptr = ptr;
663 size_t wlen, len2, j;
664 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
665 unsigned int i, retry;
666 u16 usum, keycode;
667
668 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
669 C218_KeyCode;
670
671 switch (brd->boardType) {
672 case MOXA_BOARD_CP204J:
673 case MOXA_BOARD_C218_PCI:
674 key = C218_key;
675 loadbuf = C218_LoadBuf;
676 loadlen = C218DLoad_len;
677 checksum = C218check_sum;
678 checksum_ok = C218chksum_ok;
679 break;
680 default:
681 key = C320_key;
682 keycode = C320_KeyCode;
683 loadbuf = C320_LoadBuf;
684 loadlen = C320DLoad_len;
685 checksum = C320check_sum;
686 checksum_ok = C320chksum_ok;
687 break;
688 }
689
690 usum = 0;
691 wlen = len >> 1;
692 for (i = 0; i < wlen; i++)
693 usum += le16_to_cpu(uptr[i]);
694 retry = 0;
695 do {
696 wlen = len >> 1;
697 j = 0;
698 while (wlen) {
699 len2 = (wlen > 2048) ? 2048 : wlen;
700 wlen -= len2;
701 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
702 j += len2 << 1;
703
704 writew(len2, baseAddr + loadlen);
705 writew(0, baseAddr + key);
706 for (i = 0; i < 100; i++) {
707 if (readw(baseAddr + key) == keycode)
708 break;
709 msleep(10);
710 }
711 if (readw(baseAddr + key) != keycode)
712 return -EIO;
713 }
714 writew(0, baseAddr + loadlen);
715 writew(usum, baseAddr + checksum);
716 writew(0, baseAddr + key);
717 for (i = 0; i < 100; i++) {
718 if (readw(baseAddr + key) == keycode)
719 break;
720 msleep(10);
721 }
722 retry++;
723 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
724 if (readb(baseAddr + checksum_ok) != 1)
725 return -EIO;
726
727 writew(0, baseAddr + key);
728 for (i = 0; i < 600; i++) {
729 if (readw(baseAddr + Magic_no) == Magic_code)
730 break;
731 msleep(10);
732 }
733 if (readw(baseAddr + Magic_no) != Magic_code)
734 return -EIO;
735
736 if (MOXA_IS_320(brd)) {
737 writew(0x3800, baseAddr + TMS320_PORT1);
738 writew(0x3900, baseAddr + TMS320_PORT2);
739 writew(28499, baseAddr + TMS320_CLOCK);
740 }
741 writew(1, baseAddr + Disable_IRQ);
742 writew(0, baseAddr + Magic_no);
743 for (i = 0; i < 500; i++) {
744 if (readw(baseAddr + Magic_no) == Magic_code)
745 break;
746 msleep(10);
747 }
748 if (readw(baseAddr + Magic_no) != Magic_code)
749 return -EIO;
750
751 if (MOXA_IS_320(brd)) {
752 j = readw(baseAddr + Module_cnt);
753 if (j <= 0)
754 return -EIO;
755 brd->numPorts = j * 8;
756 writew(j, baseAddr + Module_no);
757 writew(0, baseAddr + Magic_no);
758 for (i = 0; i < 600; i++) {
759 if (readw(baseAddr + Magic_no) == Magic_code)
760 break;
761 msleep(10);
762 }
763 if (readw(baseAddr + Magic_no) != Magic_code)
764 return -EIO;
765 }
766 brd->intNdx = baseAddr + IRQindex;
767 brd->intPend = baseAddr + IRQpending;
768 brd->intTable = baseAddr + IRQtable;
769
770 return 0;
771}
772
773static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
774 size_t len)
775{
776 void __iomem *ofsAddr, *baseAddr = brd->basemem;
777 struct moxa_port *port;
778 int retval, i;
779
780 if (len % 2) {
781 printk(KERN_ERR "MOXA: bios length is not even\n");
782 return -EINVAL;
783 }
784
785 retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */
786 if (retval)
787 return retval;
788
789 switch (brd->boardType) {
790 case MOXA_BOARD_C218_PCI:
791 case MOXA_BOARD_CP204J:
792 port = brd->ports;
793 for (i = 0; i < brd->numPorts; i++, port++) {
794 port->board = brd;
795 port->DCDState = 0;
796 port->tableAddr = baseAddr + Extern_table +
797 Extern_size * i;
798 ofsAddr = port->tableAddr;
799 writew(C218rx_mask, ofsAddr + RX_mask);
800 writew(C218tx_mask, ofsAddr + TX_mask);
801 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
802 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
803
804 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
805 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
806
807 }
808 break;
809 default:
810 port = brd->ports;
811 for (i = 0; i < brd->numPorts; i++, port++) {
812 port->board = brd;
813 port->DCDState = 0;
814 port->tableAddr = baseAddr + Extern_table +
815 Extern_size * i;
816 ofsAddr = port->tableAddr;
817 switch (brd->numPorts) {
818 case 8:
819 writew(C320p8rx_mask, ofsAddr + RX_mask);
820 writew(C320p8tx_mask, ofsAddr + TX_mask);
821 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
822 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
823 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
824 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
825
826 break;
827 case 16:
828 writew(C320p16rx_mask, ofsAddr + RX_mask);
829 writew(C320p16tx_mask, ofsAddr + TX_mask);
830 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
831 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
832 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
833 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
834 break;
835
836 case 24:
837 writew(C320p24rx_mask, ofsAddr + RX_mask);
838 writew(C320p24tx_mask, ofsAddr + TX_mask);
839 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
840 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
841 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
842 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
843 break;
844 case 32:
845 writew(C320p32rx_mask, ofsAddr + RX_mask);
846 writew(C320p32tx_mask, ofsAddr + TX_mask);
847 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
848 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
849 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
850 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
851 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
852 break;
853 }
854 }
855 break;
856 }
857 return 0;
858}
859
860static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
861{
862 const void *ptr = fw->data;
863 char rsn[64];
864 u16 lens[5];
865 size_t len;
866 unsigned int a, lenp, lencnt;
867 int ret = -EINVAL;
868 struct {
869 __le32 magic; /* 0x34303430 */
870 u8 reserved1[2];
871 u8 type; /* UNIX = 3 */
872 u8 model; /* C218T=1, C320T=2, CP204=3 */
873 u8 reserved2[8];
874 __le16 len[5];
875 } const *hdr = ptr;
876
877 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
878
879 if (fw->size < MOXA_FW_HDRLEN) {
880 strcpy(rsn, "too short (even header won't fit)");
881 goto err;
882 }
883 if (hdr->magic != cpu_to_le32(0x30343034)) {
884 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
885 goto err;
886 }
887 if (hdr->type != 3) {
888 sprintf(rsn, "not for linux, type is %u", hdr->type);
889 goto err;
890 }
891 if (moxa_check_fw_model(brd, hdr->model)) {
892 sprintf(rsn, "not for this card, model is %u", hdr->model);
893 goto err;
894 }
895
896 len = MOXA_FW_HDRLEN;
897 lencnt = hdr->model == 2 ? 5 : 3;
898 for (a = 0; a < ARRAY_SIZE(lens); a++) {
899 lens[a] = le16_to_cpu(hdr->len[a]);
900 if (lens[a] && len + lens[a] <= fw->size &&
901 moxa_check_fw(&fw->data[len]))
902 printk(KERN_WARNING "MOXA firmware: unexpected input "
903 "at offset %u, but going on\n", (u32)len);
904 if (!lens[a] && a < lencnt) {
905 sprintf(rsn, "too few entries in fw file");
906 goto err;
907 }
908 len += lens[a];
909 }
910
911 if (len != fw->size) {
912 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
913 (u32)len);
914 goto err;
915 }
916
917 ptr += MOXA_FW_HDRLEN;
918 lenp = 0; /* bios */
919
920 strcpy(rsn, "read above");
921
922 ret = moxa_load_bios(brd, ptr, lens[lenp]);
923 if (ret)
924 goto err;
925
926 /* we skip the tty section (lens[1]), since we don't need it */
927 ptr += lens[lenp] + lens[lenp + 1];
928 lenp += 2; /* comm */
929
930 if (hdr->model == 2) {
931 ret = moxa_load_320b(brd, ptr, lens[lenp]);
932 if (ret)
933 goto err;
934 /* skip another tty */
935 ptr += lens[lenp] + lens[lenp + 1];
936 lenp += 2;
937 }
938
939 ret = moxa_load_code(brd, ptr, lens[lenp]);
940 if (ret)
941 goto err;
942
943 return 0;
944err:
945 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
946 return ret;
947}
948
949static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
950{
951 const struct firmware *fw;
952 const char *file;
953 struct moxa_port *p;
954 unsigned int i, first_idx;
955 int ret;
956
957 brd->ports = kzalloc_objs(*brd->ports, MAX_PORTS_PER_BOARD);
958 if (brd->ports == NULL) {
959 printk(KERN_ERR "cannot allocate memory for ports\n");
960 ret = -ENOMEM;
961 goto err;
962 }
963
964 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
965 tty_port_init(&p->port);
966 p->port.ops = &moxa_port_ops;
967 p->type = PORT_16550A;
968 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
969 }
970
971 switch (brd->boardType) {
972 case MOXA_BOARD_C218_PCI:
973 file = "c218tunx.cod";
974 break;
975 case MOXA_BOARD_CP204J:
976 file = "cp204unx.cod";
977 break;
978 default:
979 file = "c320tunx.cod";
980 break;
981 }
982
983 ret = request_firmware(&fw, file, dev);
984 if (ret) {
985 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
986 "you've placed '%s' file into your firmware "
987 "loader directory (e.g. /lib/firmware)\n",
988 file);
989 goto err_free;
990 }
991
992 ret = moxa_load_fw(brd, fw);
993
994 release_firmware(fw);
995
996 if (ret)
997 goto err_free;
998
999 scoped_guard(spinlock_bh, &moxa_lock) {
1000 brd->ready = 1;
1001 if (!timer_pending(&moxaTimer))
1002 mod_timer(&moxaTimer, jiffies + HZ / 50);
1003 }
1004
1005 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
1006 for (i = 0; i < brd->numPorts; i++)
1007 tty_port_register_device(&brd->ports[i].port, moxaDriver,
1008 first_idx + i, dev);
1009
1010 return 0;
1011err_free:
1012 for (i = 0; i < MAX_PORTS_PER_BOARD; i++)
1013 tty_port_destroy(&brd->ports[i].port);
1014 kfree(brd->ports);
1015err:
1016 return ret;
1017}
1018
1019static void moxa_board_deinit(struct moxa_board_conf *brd)
1020{
1021 unsigned int a, opened, first_idx;
1022
1023 scoped_guard(mutex, &moxa_openlock) {
1024 scoped_guard(spinlock_bh, &moxa_lock)
1025 brd->ready = 0;
1026
1027 /* pci hot-un-plug support */
1028 for (a = 0; a < brd->numPorts; a++)
1029 if (tty_port_initialized(&brd->ports[a].port))
1030 tty_port_tty_hangup(&brd->ports[a].port, false);
1031
1032 for (a = 0; a < MAX_PORTS_PER_BOARD; a++)
1033 tty_port_destroy(&brd->ports[a].port);
1034
1035 while (1) {
1036 opened = 0;
1037 for (a = 0; a < brd->numPorts; a++)
1038 if (tty_port_initialized(&brd->ports[a].port))
1039 opened++;
1040 if (!opened)
1041 break;
1042 mutex_unlock(&moxa_openlock);
1043 msleep(50);
1044 mutex_lock(&moxa_openlock);
1045 }
1046 }
1047
1048 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
1049 for (a = 0; a < brd->numPorts; a++)
1050 tty_unregister_device(moxaDriver, first_idx + a);
1051
1052 iounmap(brd->basemem);
1053 brd->basemem = NULL;
1054 kfree(brd->ports);
1055}
1056
1057static int moxa_pci_probe(struct pci_dev *pdev,
1058 const struct pci_device_id *ent)
1059{
1060 struct moxa_board_conf *board;
1061 unsigned int i;
1062 int board_type = ent->driver_data;
1063 int retval;
1064
1065 retval = pci_enable_device(pdev);
1066 if (retval) {
1067 dev_err(&pdev->dev, "can't enable pci device\n");
1068 goto err;
1069 }
1070
1071 for (i = 0; i < MAX_BOARDS; i++)
1072 if (moxa_boards[i].basemem == NULL)
1073 break;
1074
1075 retval = -ENODEV;
1076 if (i >= MAX_BOARDS) {
1077 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
1078 "found. Board is ignored.\n", MAX_BOARDS);
1079 goto err;
1080 }
1081
1082 board = &moxa_boards[i];
1083
1084 retval = pci_request_region(pdev, 2, "moxa-base");
1085 if (retval) {
1086 dev_err(&pdev->dev, "can't request pci region 2\n");
1087 goto err;
1088 }
1089
1090 board->basemem = ioremap(pci_resource_start(pdev, 2), 0x4000);
1091 if (board->basemem == NULL) {
1092 dev_err(&pdev->dev, "can't remap io space 2\n");
1093 retval = -ENOMEM;
1094 goto err_reg;
1095 }
1096
1097 board->boardType = board_type;
1098 switch (board_type) {
1099 case MOXA_BOARD_C218_PCI:
1100 board->numPorts = 8;
1101 break;
1102
1103 case MOXA_BOARD_CP204J:
1104 board->numPorts = 4;
1105 break;
1106 default:
1107 board->numPorts = 0;
1108 break;
1109 }
1110
1111 retval = moxa_init_board(board, &pdev->dev);
1112 if (retval)
1113 goto err_base;
1114
1115 pci_set_drvdata(pdev, board);
1116
1117 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
1118 moxa_brdname[board_type - 1], board->numPorts);
1119
1120 return 0;
1121err_base:
1122 iounmap(board->basemem);
1123 board->basemem = NULL;
1124err_reg:
1125 pci_release_region(pdev, 2);
1126err:
1127 return retval;
1128}
1129
1130static void moxa_pci_remove(struct pci_dev *pdev)
1131{
1132 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1133
1134 moxa_board_deinit(brd);
1135
1136 pci_release_region(pdev, 2);
1137}
1138
1139static struct pci_driver moxa_pci_driver = {
1140 .name = "moxa",
1141 .id_table = moxa_pcibrds,
1142 .probe = moxa_pci_probe,
1143 .remove = moxa_pci_remove
1144};
1145
1146static int __init moxa_init(void)
1147{
1148 int retval = 0;
1149
1150 moxaDriver = tty_alloc_driver(MAX_PORTS,
1151 TTY_DRIVER_REAL_RAW |
1152 TTY_DRIVER_DYNAMIC_DEV);
1153 if (IS_ERR(moxaDriver))
1154 return PTR_ERR(moxaDriver);
1155
1156 moxaDriver->name = "ttyMX";
1157 moxaDriver->major = ttymajor;
1158 moxaDriver->minor_start = 0;
1159 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1160 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1161 moxaDriver->init_termios = tty_std_termios;
1162 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
1163 moxaDriver->init_termios.c_ispeed = 9600;
1164 moxaDriver->init_termios.c_ospeed = 9600;
1165 tty_set_operations(moxaDriver, &moxa_ops);
1166
1167 if (tty_register_driver(moxaDriver)) {
1168 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1169 tty_driver_kref_put(moxaDriver);
1170 return -1;
1171 }
1172
1173 retval = pci_register_driver(&moxa_pci_driver);
1174 if (retval)
1175 printk(KERN_ERR "Can't register MOXA pci driver!\n");
1176
1177 return retval;
1178}
1179
1180static void __exit moxa_exit(void)
1181{
1182 pci_unregister_driver(&moxa_pci_driver);
1183
1184 timer_delete_sync(&moxaTimer);
1185
1186 tty_unregister_driver(moxaDriver);
1187 tty_driver_kref_put(moxaDriver);
1188}
1189
1190module_init(moxa_init);
1191module_exit(moxa_exit);
1192
1193static void moxa_shutdown(struct tty_port *port)
1194{
1195 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1196 MoxaPortDisable(ch);
1197 MoxaPortFlushData(ch, 2);
1198}
1199
1200static bool moxa_carrier_raised(struct tty_port *port)
1201{
1202 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1203
1204 guard(spinlock_irq)(&port->lock);
1205 return ch->DCDState;
1206}
1207
1208static void moxa_dtr_rts(struct tty_port *port, bool active)
1209{
1210 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1211 MoxaPortLineCtrl(ch, active, active);
1212}
1213
1214
1215static int moxa_open(struct tty_struct *tty, struct file *filp)
1216{
1217 struct moxa_board_conf *brd;
1218 struct moxa_port *ch;
1219 int port = tty->index;
1220
1221 scoped_cond_guard(mutex_intr, return -ERESTARTSYS, &moxa_openlock) {
1222 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
1223 if (!brd->ready)
1224 return -ENODEV;
1225
1226 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts)
1227 return -ENODEV;
1228
1229 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
1230 ch->port.count++;
1231 tty->driver_data = ch;
1232 tty_port_tty_set(&ch->port, tty);
1233
1234 guard(mutex)(&ch->port.mutex);
1235 if (!tty_port_initialized(&ch->port)) {
1236 ch->statusflags = 0;
1237 moxa_set_tty_param(tty, &tty->termios);
1238 MoxaPortLineCtrl(ch, true, true);
1239 MoxaPortEnable(ch);
1240 MoxaSetFifo(ch, ch->type == PORT_16550A);
1241 tty_port_set_initialized(&ch->port, true);
1242 }
1243 }
1244
1245 return tty_port_block_til_ready(&ch->port, tty, filp);
1246}
1247
1248static void moxa_close(struct tty_struct *tty, struct file *filp)
1249{
1250 struct moxa_port *ch = tty->driver_data;
1251 ch->cflag = tty->termios.c_cflag;
1252 tty_port_close(&ch->port, tty, filp);
1253}
1254
1255static ssize_t moxa_write(struct tty_struct *tty, const u8 *buf, size_t count)
1256{
1257 struct moxa_port *ch = tty->driver_data;
1258 int len;
1259
1260 if (ch == NULL)
1261 return 0;
1262
1263 scoped_guard(spinlock_irqsave, &moxa_lock)
1264 len = MoxaPortWriteData(tty, buf, count);
1265
1266 set_bit(LOWWAIT, &ch->statusflags);
1267 return len;
1268}
1269
1270static unsigned int moxa_write_room(struct tty_struct *tty)
1271{
1272 struct moxa_port *ch;
1273
1274 if (tty->flow.stopped)
1275 return 0;
1276 ch = tty->driver_data;
1277 if (ch == NULL)
1278 return 0;
1279 return MoxaPortTxFree(ch);
1280}
1281
1282static void moxa_flush_buffer(struct tty_struct *tty)
1283{
1284 struct moxa_port *ch = tty->driver_data;
1285
1286 if (ch == NULL)
1287 return;
1288 MoxaPortFlushData(ch, 1);
1289 tty_wakeup(tty);
1290}
1291
1292static unsigned int moxa_chars_in_buffer(struct tty_struct *tty)
1293{
1294 struct moxa_port *ch = tty->driver_data;
1295 unsigned int chars;
1296
1297 chars = MoxaPortTxQueue(ch);
1298 if (chars)
1299 /*
1300 * Make it possible to wakeup anything waiting for output
1301 * in tty_ioctl.c, etc.
1302 */
1303 set_bit(EMPTYWAIT, &ch->statusflags);
1304 return chars;
1305}
1306
1307static int moxa_tiocmget(struct tty_struct *tty)
1308{
1309 struct moxa_port *ch = tty->driver_data;
1310 bool dtr_active, rts_active;
1311 int flag = 0;
1312 int status;
1313
1314 MoxaPortGetLineOut(ch, &dtr_active, &rts_active);
1315 if (dtr_active)
1316 flag |= TIOCM_DTR;
1317 if (rts_active)
1318 flag |= TIOCM_RTS;
1319 status = MoxaPortLineStatus(ch);
1320 if (status & 1)
1321 flag |= TIOCM_CTS;
1322 if (status & 2)
1323 flag |= TIOCM_DSR;
1324 if (status & 4)
1325 flag |= TIOCM_CD;
1326 return flag;
1327}
1328
1329static int moxa_tiocmset(struct tty_struct *tty,
1330 unsigned int set, unsigned int clear)
1331{
1332 bool dtr_active, rts_active;
1333 struct moxa_port *ch;
1334
1335 guard(mutex)(&moxa_openlock);
1336 ch = tty->driver_data;
1337 if (!ch)
1338 return -EINVAL;
1339
1340 MoxaPortGetLineOut(ch, &dtr_active, &rts_active);
1341 if (set & TIOCM_RTS)
1342 rts_active = true;
1343 if (set & TIOCM_DTR)
1344 dtr_active = true;
1345 if (clear & TIOCM_RTS)
1346 rts_active = false;
1347 if (clear & TIOCM_DTR)
1348 dtr_active = false;
1349 MoxaPortLineCtrl(ch, dtr_active, rts_active);
1350
1351 return 0;
1352}
1353
1354static void moxa_set_termios(struct tty_struct *tty,
1355 const struct ktermios *old_termios)
1356{
1357 struct moxa_port *ch = tty->driver_data;
1358
1359 if (ch == NULL)
1360 return;
1361 moxa_set_tty_param(tty, old_termios);
1362 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
1363 wake_up_interruptible(&ch->port.open_wait);
1364}
1365
1366static void moxa_stop(struct tty_struct *tty)
1367{
1368 struct moxa_port *ch = tty->driver_data;
1369
1370 if (ch == NULL)
1371 return;
1372 MoxaPortTxDisable(ch);
1373 set_bit(TXSTOPPED, &ch->statusflags);
1374}
1375
1376
1377static void moxa_start(struct tty_struct *tty)
1378{
1379 struct moxa_port *ch = tty->driver_data;
1380
1381 if (ch == NULL)
1382 return;
1383
1384 if (!test_bit(TXSTOPPED, &ch->statusflags))
1385 return;
1386
1387 MoxaPortTxEnable(ch);
1388 clear_bit(TXSTOPPED, &ch->statusflags);
1389}
1390
1391static void moxa_hangup(struct tty_struct *tty)
1392{
1393 struct moxa_port *ch = tty->driver_data;
1394 tty_port_hangup(&ch->port);
1395}
1396
1397static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1398{
1399 dcd = !!dcd;
1400
1401 scoped_guard(spinlock_irqsave, &p->port.lock) {
1402 if (dcd == p->DCDState)
1403 return;
1404
1405 p->DCDState = dcd;
1406 }
1407
1408 if (!dcd)
1409 tty_port_tty_hangup(&p->port, true);
1410}
1411
1412static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1413 u16 __iomem *ip)
1414{
1415 struct tty_struct *tty = tty_port_tty_get(&p->port);
1416 bool inited = tty_port_initialized(&p->port);
1417 void __iomem *ofsAddr;
1418 u16 intr;
1419
1420 if (tty) {
1421 if (test_bit(EMPTYWAIT, &p->statusflags) &&
1422 MoxaPortTxQueue(p) == 0) {
1423 clear_bit(EMPTYWAIT, &p->statusflags);
1424 tty_wakeup(tty);
1425 }
1426 if (test_bit(LOWWAIT, &p->statusflags) && !tty->flow.stopped &&
1427 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
1428 clear_bit(LOWWAIT, &p->statusflags);
1429 tty_wakeup(tty);
1430 }
1431
1432 if (inited && !tty_throttled(tty) &&
1433 MoxaPortRxQueue(p) > 0) { /* RX */
1434 MoxaPortReadData(p);
1435 tty_flip_buffer_push(&p->port);
1436 }
1437 } else {
1438 clear_bit(EMPTYWAIT, &p->statusflags);
1439 MoxaPortFlushData(p, 0); /* flush RX */
1440 }
1441
1442 if (!handle) /* nothing else to do */
1443 goto put;
1444
1445 intr = readw(ip); /* port irq status */
1446 if (intr == 0)
1447 goto put;
1448
1449 writew(0, ip); /* ACK port */
1450 ofsAddr = p->tableAddr;
1451 if (intr & IntrTx) /* disable tx intr */
1452 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1453 ofsAddr + HostStat);
1454
1455 if (!inited)
1456 goto put;
1457
1458 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */
1459 tty_insert_flip_char(&p->port, 0, TTY_BREAK);
1460 tty_flip_buffer_push(&p->port);
1461 }
1462
1463 if (intr & IntrLine)
1464 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
1465put:
1466 tty_kref_put(tty);
1467
1468 return 0;
1469}
1470
1471static void moxa_poll(struct timer_list *unused)
1472{
1473 struct moxa_board_conf *brd;
1474 u16 __iomem *ip;
1475 unsigned int card, port, served = 0;
1476
1477 guard(spinlock)(&moxa_lock);
1478 for (card = 0; card < MAX_BOARDS; card++) {
1479 brd = &moxa_boards[card];
1480 if (!brd->ready)
1481 continue;
1482
1483 served++;
1484
1485 ip = NULL;
1486 if (readb(brd->intPend) == 0xff)
1487 ip = brd->intTable + readb(brd->intNdx);
1488
1489 for (port = 0; port < brd->numPorts; port++)
1490 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1491
1492 if (ip)
1493 writeb(0, brd->intPend); /* ACK */
1494
1495 if (moxaLowWaterChk) {
1496 struct moxa_port *p = brd->ports;
1497 for (port = 0; port < brd->numPorts; port++, p++)
1498 if (p->lowChkFlag) {
1499 p->lowChkFlag = 0;
1500 moxa_low_water_check(p->tableAddr);
1501 }
1502 }
1503 }
1504 moxaLowWaterChk = 0;
1505
1506 if (served)
1507 mod_timer(&moxaTimer, jiffies + HZ / 50);
1508}
1509
1510/******************************************************************************/
1511
1512static void moxa_set_tty_param(struct tty_struct *tty,
1513 const struct ktermios *old_termios)
1514{
1515 register struct ktermios *ts = &tty->termios;
1516 struct moxa_port *ch = tty->driver_data;
1517 int rts, cts, txflow, rxflow, xany, baud;
1518
1519 rts = cts = txflow = rxflow = xany = 0;
1520 if (ts->c_cflag & CRTSCTS)
1521 rts = cts = 1;
1522 if (ts->c_iflag & IXON)
1523 txflow = 1;
1524 if (ts->c_iflag & IXOFF)
1525 rxflow = 1;
1526 if (ts->c_iflag & IXANY)
1527 xany = 1;
1528
1529 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1530 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
1531 if (baud == -1)
1532 baud = tty_termios_baud_rate(old_termios);
1533 /* Not put the baud rate into the termios data */
1534 tty_encode_baud_rate(tty, baud, baud);
1535}
1536
1537/*****************************************************************************
1538 * Driver level functions: *
1539 *****************************************************************************/
1540
1541static void MoxaPortFlushData(struct moxa_port *port, int mode)
1542{
1543 void __iomem *ofsAddr;
1544 if (mode < 0 || mode > 2)
1545 return;
1546 ofsAddr = port->tableAddr;
1547 moxafunc(ofsAddr, FC_FlushQueue, mode);
1548 if (mode != 1) {
1549 port->lowChkFlag = 0;
1550 moxa_low_water_check(ofsAddr);
1551 }
1552}
1553
1554/*
1555 * Moxa Port Number Description:
1556 *
1557 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1558 * the port number using in MOXA driver functions will be 0 to 31 for
1559 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1560 * to 127 for fourth. For example, if you setup three MOXA boards,
1561 * first board is C218, second board is C320-16 and third board is
1562 * C320-32. The port number of first board (C218 - 8 ports) is from
1563 * 0 to 7. The port number of second board (C320 - 16 ports) is form
1564 * 32 to 47. The port number of third board (C320 - 32 ports) is from
1565 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1566 * 127 will be invalid.
1567 *
1568 *
1569 * Moxa Functions Description:
1570 *
1571 * Function 1: Driver initialization routine, this routine must be
1572 * called when initialized driver.
1573 * Syntax:
1574 * void MoxaDriverInit();
1575 *
1576 *
1577 * Function 2: Moxa driver private IOCTL command processing.
1578 * Syntax:
1579 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1580 *
1581 * unsigned int cmd : IOCTL command
1582 * unsigned long arg : IOCTL argument
1583 * int port : port number (0 - 127)
1584 *
1585 * return: 0 (OK)
1586 * -EINVAL
1587 * -ENOIOCTLCMD
1588 *
1589 *
1590 * Function 6: Enable this port to start Tx/Rx data.
1591 * Syntax:
1592 * void MoxaPortEnable(int port);
1593 * int port : port number (0 - 127)
1594 *
1595 *
1596 * Function 7: Disable this port
1597 * Syntax:
1598 * void MoxaPortDisable(int port);
1599 * int port : port number (0 - 127)
1600 *
1601 *
1602 * Function 10: Setting baud rate of this port.
1603 * Syntax:
1604 * speed_t MoxaPortSetBaud(int port, speed_t baud);
1605 * int port : port number (0 - 127)
1606 * long baud : baud rate (50 - 115200)
1607 *
1608 * return: 0 : this port is invalid or baud < 50
1609 * 50 - 115200 : the real baud rate set to the port, if
1610 * the argument baud is large than maximun
1611 * available baud rate, the real setting
1612 * baud rate will be the maximun baud rate.
1613 *
1614 *
1615 * Function 12: Configure the port.
1616 * Syntax:
1617 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1618 * int port : port number (0 - 127)
1619 * struct ktermios * termio : termio structure pointer
1620 * speed_t baud : baud rate
1621 *
1622 * return: -1 : this port is invalid or termio == NULL
1623 * 0 : setting O.K.
1624 *
1625 *
1626 * Function 13: Get the DTR/RTS state of this port.
1627 * Syntax:
1628 * int MoxaPortGetLineOut(int port, bool *dtrState, bool *rtsState);
1629 * int port : port number (0 - 127)
1630 * bool * dtr_active : pointer to bool to receive the current DTR
1631 * state. (if NULL, this function will not
1632 * write to this address)
1633 * bool * rts_active : pointer to bool to receive the current RTS
1634 * state. (if NULL, this function will not
1635 * write to this address)
1636 *
1637 * return: -1 : this port is invalid
1638 * 0 : O.K.
1639 *
1640 *
1641 * Function 14: Setting the DTR/RTS output state of this port.
1642 * Syntax:
1643 * void MoxaPortLineCtrl(int port, bool dtrState, bool rtsState);
1644 * int port : port number (0 - 127)
1645 * bool dtr_active : DTR output state
1646 * bool rts_active : RTS output state
1647 *
1648 *
1649 * Function 15: Setting the flow control of this port.
1650 * Syntax:
1651 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1652 * int txFlow,int xany);
1653 * int port : port number (0 - 127)
1654 * int rtsFlow : H/W RTS flow control (0: no, 1: yes)
1655 * int ctsFlow : H/W CTS flow control (0: no, 1: yes)
1656 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1657 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1658 * int xany : S/W XANY flow control (0: no, 1: yes)
1659 *
1660 *
1661 * Function 16: Get ths line status of this port
1662 * Syntax:
1663 * int MoxaPortLineStatus(int port);
1664 * int port : port number (0 - 127)
1665 *
1666 * return: Bit 0 - CTS state (0: off, 1: on)
1667 * Bit 1 - DSR state (0: off, 1: on)
1668 * Bit 2 - DCD state (0: off, 1: on)
1669 *
1670 *
1671 * Function 19: Flush the Rx/Tx buffer data of this port.
1672 * Syntax:
1673 * void MoxaPortFlushData(int port, int mode);
1674 * int port : port number (0 - 127)
1675 * int mode
1676 * 0 : flush the Rx buffer
1677 * 1 : flush the Tx buffer
1678 * 2 : flush the Rx and Tx buffer
1679 *
1680 *
1681 * Function 20: Write data.
1682 * Syntax:
1683 * ssize_t MoxaPortWriteData(int port, u8 *buffer, size_t length);
1684 * int port : port number (0 - 127)
1685 * u8 *buffer : pointer to write data buffer.
1686 * size_t length : write data length
1687 *
1688 * return: 0 - length : real write data length
1689 *
1690 *
1691 * Function 21: Read data.
1692 * Syntax:
1693 * int MoxaPortReadData(int port, struct tty_struct *tty);
1694 * int port : port number (0 - 127)
1695 * struct tty_struct *tty : tty for data
1696 *
1697 * return: 0 - length : real read data length
1698 *
1699 *
1700 * Function 24: Get the Tx buffer current queued data bytes
1701 * Syntax:
1702 * int MoxaPortTxQueue(int port);
1703 * int port : port number (0 - 127)
1704 *
1705 * return: .. : Tx buffer current queued data bytes
1706 *
1707 *
1708 * Function 25: Get the Tx buffer current free space
1709 * Syntax:
1710 * int MoxaPortTxFree(int port);
1711 * int port : port number (0 - 127)
1712 *
1713 * return: .. : Tx buffer current free space
1714 *
1715 *
1716 * Function 26: Get the Rx buffer current queued data bytes
1717 * Syntax:
1718 * int MoxaPortRxQueue(int port);
1719 * int port : port number (0 - 127)
1720 *
1721 * return: .. : Rx buffer current queued data bytes
1722 *
1723 *
1724 * Function 28: Disable port data transmission.
1725 * Syntax:
1726 * void MoxaPortTxDisable(int port);
1727 * int port : port number (0 - 127)
1728 *
1729 *
1730 * Function 29: Enable port data transmission.
1731 * Syntax:
1732 * void MoxaPortTxEnable(int port);
1733 * int port : port number (0 - 127)
1734 *
1735 *
1736 * Function 31: Get the received BREAK signal count and reset it.
1737 * Syntax:
1738 * int MoxaPortResetBrkCnt(int port);
1739 * int port : port number (0 - 127)
1740 *
1741 * return: 0 - .. : BREAK signal count
1742 *
1743 *
1744 */
1745
1746static void MoxaPortEnable(struct moxa_port *port)
1747{
1748 void __iomem *ofsAddr;
1749 u16 lowwater = 512;
1750
1751 ofsAddr = port->tableAddr;
1752 writew(lowwater, ofsAddr + Low_water);
1753 if (MOXA_IS_320(port->board))
1754 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
1755 else
1756 writew(readw(ofsAddr + HostStat) | WakeupBreak,
1757 ofsAddr + HostStat);
1758
1759 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1760 moxafunc(ofsAddr, FC_FlushQueue, 2);
1761
1762 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1763 MoxaPortLineStatus(port);
1764}
1765
1766static void MoxaPortDisable(struct moxa_port *port)
1767{
1768 void __iomem *ofsAddr = port->tableAddr;
1769
1770 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */
1771 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1772 writew(0, ofsAddr + HostStat);
1773 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1774}
1775
1776static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1777{
1778 void __iomem *ofsAddr = port->tableAddr;
1779 unsigned int clock, val;
1780 speed_t max;
1781
1782 max = MOXA_IS_320(port->board) ? 460800 : 921600;
1783 if (baud < 50)
1784 return 0;
1785 if (baud > max)
1786 baud = max;
1787 clock = 921600;
1788 val = clock / baud;
1789 moxafunc(ofsAddr, FC_SetBaud, val);
1790 baud = clock / val;
1791 return baud;
1792}
1793
1794static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1795 speed_t baud)
1796{
1797 void __iomem *ofsAddr;
1798 tcflag_t mode = 0;
1799
1800 ofsAddr = port->tableAddr;
1801
1802 mode = termio->c_cflag & CSIZE;
1803 if (mode == CS5)
1804 mode = MX_CS5;
1805 else if (mode == CS6)
1806 mode = MX_CS6;
1807 else if (mode == CS7)
1808 mode = MX_CS7;
1809 else if (mode == CS8)
1810 mode = MX_CS8;
1811
1812 if (termio->c_cflag & CSTOPB) {
1813 if (mode == MX_CS5)
1814 mode |= MX_STOP15;
1815 else
1816 mode |= MX_STOP2;
1817 } else
1818 mode |= MX_STOP1;
1819
1820 if (termio->c_cflag & PARENB) {
1821 if (termio->c_cflag & PARODD) {
1822 if (termio->c_cflag & CMSPAR)
1823 mode |= MX_PARMARK;
1824 else
1825 mode |= MX_PARODD;
1826 } else {
1827 if (termio->c_cflag & CMSPAR)
1828 mode |= MX_PARSPACE;
1829 else
1830 mode |= MX_PAREVEN;
1831 }
1832 } else
1833 mode |= MX_PARNONE;
1834
1835 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1836
1837 if (MOXA_IS_320(port->board) && baud >= 921600)
1838 return -1;
1839
1840 baud = MoxaPortSetBaud(port, baud);
1841
1842 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
1843 guard(spinlock_irq)(&moxafunc_lock);
1844 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1845 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1846 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
1847 moxa_wait_finish(ofsAddr);
1848 }
1849 return baud;
1850}
1851
1852static int MoxaPortGetLineOut(struct moxa_port *port, bool *dtr_active,
1853 bool *rts_active)
1854{
1855 if (dtr_active)
1856 *dtr_active = port->lineCtrl & DTR_ON;
1857 if (rts_active)
1858 *rts_active = port->lineCtrl & RTS_ON;
1859
1860 return 0;
1861}
1862
1863static void MoxaPortLineCtrl(struct moxa_port *port, bool dtr_active, bool rts_active)
1864{
1865 u8 mode = 0;
1866
1867 if (dtr_active)
1868 mode |= DTR_ON;
1869 if (rts_active)
1870 mode |= RTS_ON;
1871 port->lineCtrl = mode;
1872 moxafunc(port->tableAddr, FC_LineControl, mode);
1873}
1874
1875static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1876 int txflow, int rxflow, int txany)
1877{
1878 int mode = 0;
1879
1880 if (rts)
1881 mode |= RTS_FlowCtl;
1882 if (cts)
1883 mode |= CTS_FlowCtl;
1884 if (txflow)
1885 mode |= Tx_FlowCtl;
1886 if (rxflow)
1887 mode |= Rx_FlowCtl;
1888 if (txany)
1889 mode |= IXM_IXANY;
1890 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1891}
1892
1893static int MoxaPortLineStatus(struct moxa_port *port)
1894{
1895 void __iomem *ofsAddr;
1896 int val;
1897
1898 ofsAddr = port->tableAddr;
1899 if (MOXA_IS_320(port->board))
1900 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1901 else
1902 val = readw(ofsAddr + FlagStat) >> 4;
1903 val &= 0x0B;
1904 if (val & 8)
1905 val |= 4;
1906 moxa_new_dcdstate(port, val & 8);
1907 val &= 7;
1908 return val;
1909}
1910
1911static ssize_t MoxaPortWriteData(struct tty_struct *tty, const u8 *buffer,
1912 size_t len)
1913{
1914 struct moxa_port *port = tty->driver_data;
1915 void __iomem *baseAddr, *ofsAddr, *ofs;
1916 size_t c, total;
1917 u16 head, tail, tx_mask, spage, epage;
1918 u16 pageno, pageofs, bufhead;
1919
1920 ofsAddr = port->tableAddr;
1921 baseAddr = port->board->basemem;
1922 tx_mask = readw(ofsAddr + TX_mask);
1923 spage = readw(ofsAddr + Page_txb);
1924 epage = readw(ofsAddr + EndPage_txb);
1925 tail = readw(ofsAddr + TXwptr);
1926 head = readw(ofsAddr + TXrptr);
1927 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1928 if (c > len)
1929 c = len;
1930 total = c;
1931 if (spage == epage) {
1932 bufhead = readw(ofsAddr + Ofs_txb);
1933 writew(spage, baseAddr + Control_reg);
1934 while (c > 0) {
1935 if (head > tail)
1936 len = head - tail - 1;
1937 else
1938 len = tx_mask + 1 - tail;
1939 len = (c > len) ? len : c;
1940 ofs = baseAddr + DynPage_addr + bufhead + tail;
1941 memcpy_toio(ofs, buffer, len);
1942 buffer += len;
1943 tail = (tail + len) & tx_mask;
1944 c -= len;
1945 }
1946 } else {
1947 pageno = spage + (tail >> 13);
1948 pageofs = tail & Page_mask;
1949 while (c > 0) {
1950 len = Page_size - pageofs;
1951 if (len > c)
1952 len = c;
1953 writeb(pageno, baseAddr + Control_reg);
1954 ofs = baseAddr + DynPage_addr + pageofs;
1955 memcpy_toio(ofs, buffer, len);
1956 buffer += len;
1957 if (++pageno == epage)
1958 pageno = spage;
1959 pageofs = 0;
1960 c -= len;
1961 }
1962 tail = (tail + total) & tx_mask;
1963 }
1964 writew(tail, ofsAddr + TXwptr);
1965 writeb(1, ofsAddr + CD180TXirq); /* start to send */
1966 return total;
1967}
1968
1969static int MoxaPortReadData(struct moxa_port *port)
1970{
1971 void __iomem *baseAddr, *ofsAddr, *ofs;
1972 u8 *dst;
1973 unsigned int count, len, total;
1974 u16 tail, rx_mask, spage, epage;
1975 u16 pageno, pageofs, bufhead, head;
1976
1977 ofsAddr = port->tableAddr;
1978 baseAddr = port->board->basemem;
1979 head = readw(ofsAddr + RXrptr);
1980 tail = readw(ofsAddr + RXwptr);
1981 rx_mask = readw(ofsAddr + RX_mask);
1982 spage = readw(ofsAddr + Page_rxb);
1983 epage = readw(ofsAddr + EndPage_rxb);
1984 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1985 if (count == 0)
1986 return 0;
1987
1988 total = count;
1989 if (spage == epage) {
1990 bufhead = readw(ofsAddr + Ofs_rxb);
1991 writew(spage, baseAddr + Control_reg);
1992 while (count > 0) {
1993 ofs = baseAddr + DynPage_addr + bufhead + head;
1994 len = (tail >= head) ? (tail - head) :
1995 (rx_mask + 1 - head);
1996 len = tty_prepare_flip_string(&port->port, &dst,
1997 min(len, count));
1998 memcpy_fromio(dst, ofs, len);
1999 head = (head + len) & rx_mask;
2000 count -= len;
2001 }
2002 } else {
2003 pageno = spage + (head >> 13);
2004 pageofs = head & Page_mask;
2005 while (count > 0) {
2006 writew(pageno, baseAddr + Control_reg);
2007 ofs = baseAddr + DynPage_addr + pageofs;
2008 len = tty_prepare_flip_string(&port->port, &dst,
2009 min(Page_size - pageofs, count));
2010 memcpy_fromio(dst, ofs, len);
2011
2012 count -= len;
2013 pageofs = (pageofs + len) & Page_mask;
2014 if (pageofs == 0 && ++pageno == epage)
2015 pageno = spage;
2016 }
2017 head = (head + total) & rx_mask;
2018 }
2019 writew(head, ofsAddr + RXrptr);
2020 if (readb(ofsAddr + FlagStat) & Xoff_state) {
2021 moxaLowWaterChk = 1;
2022 port->lowChkFlag = 1;
2023 }
2024 return total;
2025}
2026
2027
2028static unsigned int MoxaPortTxQueue(struct moxa_port *port)
2029{
2030 void __iomem *ofsAddr = port->tableAddr;
2031 u16 rptr, wptr, mask;
2032
2033 rptr = readw(ofsAddr + TXrptr);
2034 wptr = readw(ofsAddr + TXwptr);
2035 mask = readw(ofsAddr + TX_mask);
2036 return (wptr - rptr) & mask;
2037}
2038
2039static unsigned int MoxaPortTxFree(struct moxa_port *port)
2040{
2041 void __iomem *ofsAddr = port->tableAddr;
2042 u16 rptr, wptr, mask;
2043
2044 rptr = readw(ofsAddr + TXrptr);
2045 wptr = readw(ofsAddr + TXwptr);
2046 mask = readw(ofsAddr + TX_mask);
2047 return mask - ((wptr - rptr) & mask);
2048}
2049
2050static int MoxaPortRxQueue(struct moxa_port *port)
2051{
2052 void __iomem *ofsAddr = port->tableAddr;
2053 u16 rptr, wptr, mask;
2054
2055 rptr = readw(ofsAddr + RXrptr);
2056 wptr = readw(ofsAddr + RXwptr);
2057 mask = readw(ofsAddr + RX_mask);
2058 return (wptr - rptr) & mask;
2059}
2060
2061static void MoxaPortTxDisable(struct moxa_port *port)
2062{
2063 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
2064}
2065
2066static void MoxaPortTxEnable(struct moxa_port *port)
2067{
2068 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
2069}
2070
2071static int moxa_get_serial_info(struct tty_struct *tty,
2072 struct serial_struct *ss)
2073{
2074 struct moxa_port *info = tty->driver_data;
2075
2076 if (!info)
2077 return -ENODEV;
2078 guard(mutex)(&info->port.mutex);
2079 ss->type = info->type;
2080 ss->line = info->port.tty->index;
2081 ss->flags = info->port.flags;
2082 ss->baud_base = 921600;
2083 ss->close_delay = jiffies_to_msecs(info->port.close_delay) / 10;
2084
2085 return 0;
2086}
2087
2088
2089static int moxa_set_serial_info(struct tty_struct *tty,
2090 struct serial_struct *ss)
2091{
2092 struct moxa_port *info = tty->driver_data;
2093 unsigned int close_delay;
2094
2095 if (!info)
2096 return -ENODEV;
2097
2098 close_delay = msecs_to_jiffies(ss->close_delay * 10);
2099
2100 guard(mutex)(&info->port.mutex);
2101 if (!capable(CAP_SYS_ADMIN)) {
2102 if (close_delay != info->port.close_delay ||
2103 ss->type != info->type ||
2104 ((ss->flags & ~ASYNC_USR_MASK) !=
2105 (info->port.flags & ~ASYNC_USR_MASK))) {
2106 return -EPERM;
2107 }
2108 } else {
2109 info->port.close_delay = close_delay;
2110
2111 MoxaSetFifo(info, ss->type == PORT_16550A);
2112
2113 info->type = ss->type;
2114 }
2115
2116 return 0;
2117}
2118
2119
2120
2121/*****************************************************************************
2122 * Static local functions: *
2123 *****************************************************************************/
2124
2125static void MoxaSetFifo(struct moxa_port *port, int enable)
2126{
2127 void __iomem *ofsAddr = port->tableAddr;
2128
2129 if (!enable) {
2130 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2131 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2132 } else {
2133 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2134 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2135 }
2136}