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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * udc.c - ChipIdea UDC driver
4 *
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6 *
7 * Author: David Lopo
8 */
9
10#include <linux/delay.h>
11#include <linux/device.h>
12#include <linux/dmapool.h>
13#include <linux/dma-direct.h>
14#include <linux/err.h>
15#include <linux/irqreturn.h>
16#include <linux/kernel.h>
17#include <linux/slab.h>
18#include <linux/pm_runtime.h>
19#include <linux/pinctrl/consumer.h>
20#include <linux/usb/ch9.h>
21#include <linux/usb/gadget.h>
22#include <linux/usb/otg-fsm.h>
23#include <linux/usb/chipidea.h>
24
25#include "ci.h"
26#include "udc.h"
27#include "bits.h"
28#include "otg.h"
29#include "otg_fsm.h"
30#include "trace.h"
31
32/* control endpoint description */
33static const struct usb_endpoint_descriptor
34ctrl_endpt_out_desc = {
35 .bLength = USB_DT_ENDPOINT_SIZE,
36 .bDescriptorType = USB_DT_ENDPOINT,
37
38 .bEndpointAddress = USB_DIR_OUT,
39 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
40 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
41};
42
43static const struct usb_endpoint_descriptor
44ctrl_endpt_in_desc = {
45 .bLength = USB_DT_ENDPOINT_SIZE,
46 .bDescriptorType = USB_DT_ENDPOINT,
47
48 .bEndpointAddress = USB_DIR_IN,
49 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
50 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
51};
52
53static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
54 struct td_node *node);
55/**
56 * hw_ep_bit: calculates the bit number
57 * @num: endpoint number
58 * @dir: endpoint direction
59 *
60 * This function returns bit number
61 */
62static inline int hw_ep_bit(int num, int dir)
63{
64 return num + ((dir == TX) ? 16 : 0);
65}
66
67static inline int ep_to_bit(struct ci_hdrc *ci, int n)
68{
69 int fill = 16 - ci->hw_ep_max / 2;
70
71 if (n >= ci->hw_ep_max / 2)
72 n += fill;
73
74 return n;
75}
76
77/**
78 * hw_device_state: enables/disables interrupts (execute without interruption)
79 * @ci: the controller
80 * @dma: 0 => disable, !0 => enable and set dma engine
81 *
82 * This function returns an error code
83 */
84static int hw_device_state(struct ci_hdrc *ci, u32 dma)
85{
86 if (dma) {
87 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
88 /* interrupt, error, port change, reset, sleep/suspend */
89 hw_write(ci, OP_USBINTR, ~0,
90 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI);
91 } else {
92 hw_write(ci, OP_USBINTR, ~0, 0);
93 }
94 return 0;
95}
96
97/**
98 * hw_ep_flush: flush endpoint fifo (execute without interruption)
99 * @ci: the controller
100 * @num: endpoint number
101 * @dir: endpoint direction
102 *
103 * This function returns an error code
104 */
105static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
106{
107 int n = hw_ep_bit(num, dir);
108
109 do {
110 /* flush any pending transfer */
111 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
112 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
113 cpu_relax();
114 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
115
116 return 0;
117}
118
119/**
120 * hw_ep_disable: disables endpoint (execute without interruption)
121 * @ci: the controller
122 * @num: endpoint number
123 * @dir: endpoint direction
124 *
125 * This function returns an error code
126 */
127static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
128{
129 hw_write(ci, OP_ENDPTCTRL + num,
130 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
131 return 0;
132}
133
134/**
135 * hw_ep_enable: enables endpoint (execute without interruption)
136 * @ci: the controller
137 * @num: endpoint number
138 * @dir: endpoint direction
139 * @type: endpoint type
140 *
141 * This function returns an error code
142 */
143static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
144{
145 u32 mask, data;
146
147 if (dir == TX) {
148 mask = ENDPTCTRL_TXT; /* type */
149 data = type << __ffs(mask);
150
151 mask |= ENDPTCTRL_TXS; /* unstall */
152 mask |= ENDPTCTRL_TXR; /* reset data toggle */
153 data |= ENDPTCTRL_TXR;
154 mask |= ENDPTCTRL_TXE; /* enable */
155 data |= ENDPTCTRL_TXE;
156 } else {
157 mask = ENDPTCTRL_RXT; /* type */
158 data = type << __ffs(mask);
159
160 mask |= ENDPTCTRL_RXS; /* unstall */
161 mask |= ENDPTCTRL_RXR; /* reset data toggle */
162 data |= ENDPTCTRL_RXR;
163 mask |= ENDPTCTRL_RXE; /* enable */
164 data |= ENDPTCTRL_RXE;
165 }
166 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
167 return 0;
168}
169
170/**
171 * hw_ep_get_halt: return endpoint halt status
172 * @ci: the controller
173 * @num: endpoint number
174 * @dir: endpoint direction
175 *
176 * This function returns 1 if endpoint halted
177 */
178static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
179{
180 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
181
182 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
183}
184
185/**
186 * hw_ep_prime: primes endpoint (execute without interruption)
187 * @ci: the controller
188 * @num: endpoint number
189 * @dir: endpoint direction
190 * @is_ctrl: true if control endpoint
191 *
192 * This function returns an error code
193 */
194static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
195{
196 int n = hw_ep_bit(num, dir);
197
198 /* Synchronize before ep prime */
199 wmb();
200
201 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
202 return -EAGAIN;
203
204 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
205
206 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
207 cpu_relax();
208 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
209 return -EAGAIN;
210
211 /* status shoult be tested according with manual but it doesn't work */
212 return 0;
213}
214
215/**
216 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
217 * without interruption)
218 * @ci: the controller
219 * @num: endpoint number
220 * @dir: endpoint direction
221 * @value: true => stall, false => unstall
222 *
223 * This function returns an error code
224 */
225static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
226{
227 if (value != 0 && value != 1)
228 return -EINVAL;
229
230 do {
231 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
232 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
233 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
234
235 /* data toggle - reserved for EP0 but it's in ESS */
236 hw_write(ci, reg, mask_xs|mask_xr,
237 value ? mask_xs : mask_xr);
238 } while (value != hw_ep_get_halt(ci, num, dir));
239
240 return 0;
241}
242
243/**
244 * hw_port_is_high_speed: test if port is high speed
245 * @ci: the controller
246 *
247 * This function returns true if high speed port
248 */
249static int hw_port_is_high_speed(struct ci_hdrc *ci)
250{
251 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
252 hw_read(ci, OP_PORTSC, PORTSC_HSP);
253}
254
255/**
256 * hw_test_and_clear_complete: test & clear complete status (execute without
257 * interruption)
258 * @ci: the controller
259 * @n: endpoint number
260 *
261 * This function returns complete status
262 */
263static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
264{
265 n = ep_to_bit(ci, n);
266 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
267}
268
269/**
270 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
271 * without interruption)
272 * @ci: the controller
273 *
274 * This function returns active interrutps
275 */
276static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
277{
278 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
279
280 hw_write(ci, OP_USBSTS, ~0, reg);
281 return reg;
282}
283
284/**
285 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
286 * interruption)
287 * @ci: the controller
288 *
289 * This function returns guard value
290 */
291static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
292{
293 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
294}
295
296/**
297 * hw_test_and_set_setup_guard: test & set setup guard (execute without
298 * interruption)
299 * @ci: the controller
300 *
301 * This function returns guard value
302 */
303static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
304{
305 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
306}
307
308/**
309 * hw_usb_set_address: configures USB address (execute without interruption)
310 * @ci: the controller
311 * @value: new USB address
312 *
313 * This function explicitly sets the address, without the "USBADRA" (advance)
314 * feature, which is not supported by older versions of the controller.
315 */
316static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
317{
318 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
319 value << __ffs(DEVICEADDR_USBADR));
320}
321
322/**
323 * hw_usb_reset: restart device after a bus reset (execute without
324 * interruption)
325 * @ci: the controller
326 *
327 * This function returns an error code
328 */
329static int hw_usb_reset(struct ci_hdrc *ci)
330{
331 hw_usb_set_address(ci, 0);
332
333 /* ESS flushes only at end?!? */
334 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
335
336 /* clear setup token semaphores */
337 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
338
339 /* clear complete status */
340 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
341
342 /* wait until all bits cleared */
343 while (hw_read(ci, OP_ENDPTPRIME, ~0))
344 udelay(10); /* not RTOS friendly */
345
346 /* reset all endpoints ? */
347
348 /* reset internal status and wait for further instructions
349 no need to verify the port reset status (ESS does it) */
350
351 return 0;
352}
353
354/******************************************************************************
355 * UTIL block
356 *****************************************************************************/
357
358static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
359 unsigned int length, struct scatterlist *s)
360{
361 int i;
362 u32 temp;
363 struct td_node *lastnode, *node = kzalloc_obj(struct td_node,
364 GFP_ATOMIC);
365
366 if (node == NULL)
367 return -ENOMEM;
368
369 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
370 if (node->ptr == NULL) {
371 kfree(node);
372 return -ENOMEM;
373 }
374
375 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
376 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
377 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
378 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
379 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
380
381 if (hwreq->req.length == 0
382 || hwreq->req.length % hwep->ep.maxpacket)
383 mul++;
384 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
385 }
386
387 if (s) {
388 temp = (u32) (sg_dma_address(s) + hwreq->req.actual);
389 node->td_remaining_size = CI_MAX_BUF_SIZE - length;
390 } else {
391 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
392 }
393
394 if (length) {
395 node->ptr->page[0] = cpu_to_le32(temp);
396 for (i = 1; i < TD_PAGE_COUNT; i++) {
397 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
398 page &= ~TD_RESERVED_MASK;
399 node->ptr->page[i] = cpu_to_le32(page);
400 }
401 }
402
403 hwreq->req.actual += length;
404
405 if (!list_empty(&hwreq->tds)) {
406 /* get the last entry */
407 lastnode = list_entry(hwreq->tds.prev,
408 struct td_node, td);
409 lastnode->ptr->next = cpu_to_le32(node->dma);
410 }
411
412 INIT_LIST_HEAD(&node->td);
413 list_add_tail(&node->td, &hwreq->tds);
414
415 return 0;
416}
417
418/**
419 * _usb_addr: calculates endpoint address from direction & number
420 * @ep: endpoint
421 */
422static inline u8 _usb_addr(struct ci_hw_ep *ep)
423{
424 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
425}
426
427static int prepare_td_for_non_sg(struct ci_hw_ep *hwep,
428 struct ci_hw_req *hwreq)
429{
430 unsigned int rest = hwreq->req.length;
431 int pages = TD_PAGE_COUNT;
432 int ret = 0;
433
434 if (rest == 0) {
435 ret = add_td_to_list(hwep, hwreq, 0, NULL);
436 if (ret < 0)
437 return ret;
438 }
439
440 /*
441 * The first buffer could be not page aligned.
442 * In that case we have to span into one extra td.
443 */
444 if (hwreq->req.dma % PAGE_SIZE)
445 pages--;
446
447 while (rest > 0) {
448 unsigned int count = min(hwreq->req.length - hwreq->req.actual,
449 (unsigned int)(pages * CI_HDRC_PAGE_SIZE));
450
451 ret = add_td_to_list(hwep, hwreq, count, NULL);
452 if (ret < 0)
453 return ret;
454
455 rest -= count;
456 }
457
458 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
459 && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
460 ret = add_td_to_list(hwep, hwreq, 0, NULL);
461 if (ret < 0)
462 return ret;
463 }
464
465 return ret;
466}
467
468static int prepare_td_per_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
469 struct scatterlist *s)
470{
471 unsigned int rest = sg_dma_len(s);
472 int ret = 0;
473
474 hwreq->req.actual = 0;
475 while (rest > 0) {
476 unsigned int count = min_t(unsigned int, rest,
477 CI_MAX_BUF_SIZE);
478
479 ret = add_td_to_list(hwep, hwreq, count, s);
480 if (ret < 0)
481 return ret;
482
483 rest -= count;
484 }
485
486 return ret;
487}
488
489static void ci_add_buffer_entry(struct td_node *node, struct scatterlist *s)
490{
491 int empty_td_slot_index = (CI_MAX_BUF_SIZE - node->td_remaining_size)
492 / CI_HDRC_PAGE_SIZE;
493 int i;
494 u32 token;
495
496 token = le32_to_cpu(node->ptr->token) + (sg_dma_len(s) << __ffs(TD_TOTAL_BYTES));
497 node->ptr->token = cpu_to_le32(token);
498
499 for (i = empty_td_slot_index; i < TD_PAGE_COUNT; i++) {
500 u32 page = (u32) sg_dma_address(s) +
501 (i - empty_td_slot_index) * CI_HDRC_PAGE_SIZE;
502
503 page &= ~TD_RESERVED_MASK;
504 node->ptr->page[i] = cpu_to_le32(page);
505 }
506}
507
508static int prepare_td_for_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
509{
510 struct usb_request *req = &hwreq->req;
511 struct scatterlist *s = req->sg;
512 int ret = 0, i = 0;
513 struct td_node *node = NULL;
514
515 if (!s || req->zero || req->length == 0) {
516 dev_err(hwep->ci->dev, "not supported operation for sg\n");
517 return -EINVAL;
518 }
519
520 while (i++ < req->num_mapped_sgs) {
521 if (sg_dma_address(s) % PAGE_SIZE) {
522 dev_err(hwep->ci->dev, "not page aligned sg buffer\n");
523 return -EINVAL;
524 }
525
526 if (node && (node->td_remaining_size >= sg_dma_len(s))) {
527 ci_add_buffer_entry(node, s);
528 node->td_remaining_size -= sg_dma_len(s);
529 } else {
530 ret = prepare_td_per_sg(hwep, hwreq, s);
531 if (ret)
532 return ret;
533
534 node = list_entry(hwreq->tds.prev,
535 struct td_node, td);
536 }
537
538 s = sg_next(s);
539 }
540
541 return ret;
542}
543
544/*
545 * Verify if the scatterlist is valid by iterating each sg entry.
546 * Return invalid sg entry index which is less than num_sgs.
547 */
548static int sglist_get_invalid_entry(struct device *dma_dev, u8 dir,
549 struct usb_request *req)
550{
551 int i;
552 struct scatterlist *s = req->sg;
553
554 if (req->num_sgs == 1)
555 return 1;
556
557 dir = dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
558
559 for (i = 0; i < req->num_sgs; i++, s = sg_next(s)) {
560 /* Only small sg (generally last sg) may be bounced. If
561 * that happens. we can't ensure the addr is page-aligned
562 * after dma map.
563 */
564 if (dma_kmalloc_needs_bounce(dma_dev, s->length, dir))
565 break;
566
567 /* Make sure each sg start address (except first sg) is
568 * page-aligned and end address (except last sg) is also
569 * page-aligned.
570 */
571 if (i == 0) {
572 if (!IS_ALIGNED(s->offset + s->length,
573 CI_HDRC_PAGE_SIZE))
574 break;
575 } else {
576 if (s->offset)
577 break;
578 if (!sg_is_last(s) && !IS_ALIGNED(s->length,
579 CI_HDRC_PAGE_SIZE))
580 break;
581 }
582 }
583
584 return i;
585}
586
587static int sglist_do_bounce(struct ci_hw_req *hwreq, int index,
588 bool copy, unsigned int *bounced)
589{
590 void *buf;
591 int i, ret, nents, num_sgs;
592 unsigned int rest, rounded;
593 struct scatterlist *sg, *src, *dst;
594
595 nents = index + 1;
596 ret = sg_alloc_table(&hwreq->sgt, nents, GFP_KERNEL);
597 if (ret)
598 return ret;
599
600 sg = src = hwreq->req.sg;
601 num_sgs = hwreq->req.num_sgs;
602 rest = hwreq->req.length;
603 dst = hwreq->sgt.sgl;
604
605 for (i = 0; i < index; i++) {
606 memcpy(dst, src, sizeof(*src));
607 rest -= src->length;
608 src = sg_next(src);
609 dst = sg_next(dst);
610 }
611
612 /* create one bounce buffer */
613 rounded = round_up(rest, CI_HDRC_PAGE_SIZE);
614 buf = kmalloc(rounded, GFP_KERNEL);
615 if (!buf) {
616 sg_free_table(&hwreq->sgt);
617 return -ENOMEM;
618 }
619
620 sg_set_buf(dst, buf, rounded);
621
622 hwreq->req.sg = hwreq->sgt.sgl;
623 hwreq->req.num_sgs = nents;
624 hwreq->sgt.sgl = sg;
625 hwreq->sgt.nents = num_sgs;
626
627 if (copy)
628 sg_copy_to_buffer(src, num_sgs - index, buf, rest);
629
630 *bounced = rest;
631
632 return 0;
633}
634
635static void sglist_do_debounce(struct ci_hw_req *hwreq, bool copy)
636{
637 void *buf;
638 int i, nents, num_sgs;
639 struct scatterlist *sg, *src, *dst;
640
641 sg = hwreq->req.sg;
642 num_sgs = hwreq->req.num_sgs;
643 src = sg_last(sg, num_sgs);
644 buf = sg_virt(src);
645
646 if (copy) {
647 dst = hwreq->sgt.sgl;
648 for (i = 0; i < num_sgs - 1; i++)
649 dst = sg_next(dst);
650
651 nents = hwreq->sgt.nents - num_sgs + 1;
652 sg_copy_from_buffer(dst, nents, buf, sg_dma_len(src));
653 }
654
655 hwreq->req.sg = hwreq->sgt.sgl;
656 hwreq->req.num_sgs = hwreq->sgt.nents;
657 hwreq->sgt.sgl = sg;
658 hwreq->sgt.nents = num_sgs;
659
660 kfree(buf);
661 sg_free_table(&hwreq->sgt);
662}
663
664/**
665 * _hardware_enqueue: configures a request at hardware level
666 * @hwep: endpoint
667 * @hwreq: request
668 *
669 * This function returns an error code
670 */
671static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
672{
673 struct ci_hdrc *ci = hwep->ci;
674 int ret = 0;
675 struct td_node *firstnode, *lastnode;
676 unsigned int bounced_size;
677 struct scatterlist *sg;
678
679 /* don't queue twice */
680 if (hwreq->req.status == -EALREADY)
681 return -EALREADY;
682
683 hwreq->req.status = -EALREADY;
684
685 if (hwreq->req.num_sgs && hwreq->req.length &&
686 ci->has_short_pkt_limit) {
687 ret = sglist_get_invalid_entry(ci->dev->parent, hwep->dir,
688 &hwreq->req);
689 if (ret < hwreq->req.num_sgs) {
690 ret = sglist_do_bounce(hwreq, ret, hwep->dir == TX,
691 &bounced_size);
692 if (ret)
693 return ret;
694 }
695 }
696
697 ret = usb_gadget_map_request_by_dev(ci->dev->parent,
698 &hwreq->req, hwep->dir);
699 if (ret)
700 return ret;
701
702 if (hwreq->sgt.sgl) {
703 /* We've mapped a bigger buffer, now recover the actual size */
704 sg = sg_last(hwreq->req.sg, hwreq->req.num_sgs);
705 sg_dma_len(sg) = min(sg_dma_len(sg), bounced_size);
706 }
707
708 if (hwreq->req.num_mapped_sgs)
709 ret = prepare_td_for_sg(hwep, hwreq);
710 else
711 ret = prepare_td_for_non_sg(hwep, hwreq);
712
713 if (ret)
714 return ret;
715
716 lastnode = list_entry(hwreq->tds.prev,
717 struct td_node, td);
718
719 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
720 if (!hwreq->req.no_interrupt)
721 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
722
723 list_for_each_entry_safe(firstnode, lastnode, &hwreq->tds, td)
724 trace_ci_prepare_td(hwep, hwreq, firstnode);
725
726 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
727
728 wmb();
729
730 hwreq->req.actual = 0;
731 if (!list_empty(&hwep->qh.queue)) {
732 struct ci_hw_req *hwreqprev;
733 int n = hw_ep_bit(hwep->num, hwep->dir);
734 int tmp_stat;
735 struct td_node *prevlastnode;
736 u32 next = firstnode->dma & TD_ADDR_MASK;
737
738 hwreqprev = list_entry(hwep->qh.queue.prev,
739 struct ci_hw_req, queue);
740 prevlastnode = list_entry(hwreqprev->tds.prev,
741 struct td_node, td);
742
743 prevlastnode->ptr->next = cpu_to_le32(next);
744 wmb();
745
746 if (ci->rev == CI_REVISION_22) {
747 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
748 reprime_dtd(ci, hwep, prevlastnode);
749 }
750
751 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
752 goto done;
753 do {
754 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
755 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
756 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW) && tmp_stat);
757 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
758 if (tmp_stat)
759 goto done;
760
761 /* OP_ENDPTSTAT will be clear by HW when the endpoint met
762 * err. This dTD don't push to dQH if current dTD point is
763 * not the last one in previous request.
764 */
765 if (hwep->qh.ptr->curr != cpu_to_le32(prevlastnode->dma))
766 goto done;
767 }
768
769 /* QH configuration */
770 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
771 hwep->qh.ptr->td.token &=
772 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
773
774 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
775 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
776
777 if (hwreq->req.length == 0
778 || hwreq->req.length % hwep->ep.maxpacket)
779 mul++;
780 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
781 }
782
783 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
784 hwep->type == USB_ENDPOINT_XFER_CONTROL);
785done:
786 return ret;
787}
788
789/**
790 * free_pending_td: remove a pending request for the endpoint
791 * @hwep: endpoint
792 */
793static void free_pending_td(struct ci_hw_ep *hwep)
794{
795 struct td_node *pending = hwep->pending_td;
796
797 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
798 hwep->pending_td = NULL;
799 kfree(pending);
800}
801
802static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
803 struct td_node *node)
804{
805 hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
806 hwep->qh.ptr->td.token &=
807 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
808
809 return hw_ep_prime(ci, hwep->num, hwep->dir,
810 hwep->type == USB_ENDPOINT_XFER_CONTROL);
811}
812
813/**
814 * _hardware_dequeue: handles a request at hardware level
815 * @hwep: endpoint
816 * @hwreq: request
817 *
818 * This function returns an error code
819 */
820static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
821{
822 u32 tmptoken;
823 struct td_node *node, *tmpnode;
824 unsigned remaining_length;
825 unsigned actual = hwreq->req.length;
826 struct ci_hdrc *ci = hwep->ci;
827 bool is_isoc = hwep->type == USB_ENDPOINT_XFER_ISOC;
828
829 if (hwreq->req.status != -EALREADY)
830 return -EINVAL;
831
832 hwreq->req.status = 0;
833
834 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
835 tmptoken = le32_to_cpu(node->ptr->token);
836 trace_ci_complete_td(hwep, hwreq, node);
837 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
838 int n = hw_ep_bit(hwep->num, hwep->dir);
839
840 if (ci->rev == CI_REVISION_24 ||
841 ci->rev == CI_REVISION_22 || is_isoc)
842 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
843 reprime_dtd(ci, hwep, node);
844 hwreq->req.status = -EALREADY;
845 return -EBUSY;
846 }
847
848 remaining_length = (tmptoken & TD_TOTAL_BYTES);
849 remaining_length >>= __ffs(TD_TOTAL_BYTES);
850 actual -= remaining_length;
851
852 hwreq->req.status = tmptoken & TD_STATUS;
853 if ((TD_STATUS_HALTED & hwreq->req.status)) {
854 hwreq->req.status = -EPIPE;
855 break;
856 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
857 hwreq->req.status = -EPROTO;
858 break;
859 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
860 if (is_isoc) {
861 hwreq->req.status = 0;
862 } else {
863 hwreq->req.status = -EILSEQ;
864 break;
865 }
866 }
867
868 if (remaining_length && !is_isoc) {
869 if (hwep->dir == TX) {
870 hwreq->req.status = -EPROTO;
871 break;
872 }
873 }
874 /*
875 * As the hardware could still address the freed td
876 * which will run the udc unusable, the cleanup of the
877 * td has to be delayed by one.
878 */
879 if (hwep->pending_td)
880 free_pending_td(hwep);
881
882 hwep->pending_td = node;
883 list_del_init(&node->td);
884 }
885
886 usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
887 &hwreq->req, hwep->dir);
888
889 /* sglist bounced */
890 if (hwreq->sgt.sgl)
891 sglist_do_debounce(hwreq, hwep->dir == RX);
892
893 hwreq->req.actual += actual;
894
895 if (hwreq->req.status)
896 return hwreq->req.status;
897
898 return hwreq->req.actual;
899}
900
901/**
902 * _ep_nuke: dequeues all endpoint requests
903 * @hwep: endpoint
904 *
905 * This function returns an error code
906 * Caller must hold lock
907 */
908static int _ep_nuke(struct ci_hw_ep *hwep)
909__releases(hwep->lock)
910__acquires(hwep->lock)
911{
912 struct td_node *node, *tmpnode;
913 if (hwep == NULL)
914 return -EINVAL;
915
916 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
917
918 while (!list_empty(&hwep->qh.queue)) {
919
920 /* pop oldest request */
921 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
922 struct ci_hw_req, queue);
923
924 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
925 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
926 list_del_init(&node->td);
927 node->ptr = NULL;
928 kfree(node);
929 }
930
931 list_del_init(&hwreq->queue);
932 hwreq->req.status = -ESHUTDOWN;
933
934 /* Unmap DMA and clean up bounce buffers before giving back */
935 usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
936 &hwreq->req, hwep->dir);
937
938 if (hwreq->sgt.sgl)
939 sglist_do_debounce(hwreq, false);
940
941 if (hwreq->req.complete != NULL) {
942 spin_unlock(hwep->lock);
943 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
944 spin_lock(hwep->lock);
945 }
946 }
947
948 if (hwep->pending_td)
949 free_pending_td(hwep);
950
951 return 0;
952}
953
954static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
955{
956 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
957 int direction, retval = 0;
958 unsigned long flags;
959
960 if (ep == NULL || hwep->ep.desc == NULL)
961 return -EINVAL;
962
963 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
964 return -EOPNOTSUPP;
965
966 spin_lock_irqsave(hwep->lock, flags);
967
968 if (value && hwep->dir == TX && check_transfer &&
969 !list_empty(&hwep->qh.queue) &&
970 !usb_endpoint_xfer_control(hwep->ep.desc)) {
971 spin_unlock_irqrestore(hwep->lock, flags);
972 return -EAGAIN;
973 }
974
975 direction = hwep->dir;
976 do {
977 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
978
979 if (!value)
980 hwep->wedge = 0;
981
982 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
983 hwep->dir = (hwep->dir == TX) ? RX : TX;
984
985 } while (hwep->dir != direction);
986
987 spin_unlock_irqrestore(hwep->lock, flags);
988 return retval;
989}
990
991
992/**
993 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
994 * @gadget: gadget
995 *
996 * This function returns an error code
997 */
998static int _gadget_stop_activity(struct usb_gadget *gadget)
999{
1000 struct usb_ep *ep;
1001 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1002 unsigned long flags;
1003
1004 /* flush all endpoints */
1005 gadget_for_each_ep(ep, gadget) {
1006 usb_ep_fifo_flush(ep);
1007 }
1008 usb_ep_fifo_flush(&ci->ep0out->ep);
1009 usb_ep_fifo_flush(&ci->ep0in->ep);
1010
1011 /* make sure to disable all endpoints */
1012 gadget_for_each_ep(ep, gadget) {
1013 usb_ep_disable(ep);
1014 }
1015
1016 if (ci->status != NULL) {
1017 usb_ep_free_request(&ci->ep0in->ep, ci->status);
1018 ci->status = NULL;
1019 }
1020
1021 spin_lock_irqsave(&ci->lock, flags);
1022 ci->gadget.speed = USB_SPEED_UNKNOWN;
1023 ci->remote_wakeup = 0;
1024 ci->suspended = 0;
1025 spin_unlock_irqrestore(&ci->lock, flags);
1026
1027 return 0;
1028}
1029
1030/******************************************************************************
1031 * ISR block
1032 *****************************************************************************/
1033/**
1034 * isr_reset_handler: USB reset interrupt handler
1035 * @ci: UDC device
1036 *
1037 * This function resets USB engine after a bus reset occurred
1038 */
1039static void isr_reset_handler(struct ci_hdrc *ci)
1040__releases(ci->lock)
1041__acquires(ci->lock)
1042{
1043 int retval;
1044 u32 intr;
1045
1046 spin_unlock(&ci->lock);
1047 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
1048 usb_gadget_udc_reset(&ci->gadget, ci->driver);
1049
1050 retval = _gadget_stop_activity(&ci->gadget);
1051 if (retval)
1052 goto done;
1053
1054 retval = hw_usb_reset(ci);
1055 if (retval)
1056 goto done;
1057
1058 /* clear SLI */
1059 hw_write(ci, OP_USBSTS, USBi_SLI, USBi_SLI);
1060 intr = hw_read(ci, OP_USBINTR, ~0);
1061 hw_write(ci, OP_USBINTR, ~0, intr | USBi_SLI);
1062
1063 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
1064 if (ci->status == NULL)
1065 retval = -ENOMEM;
1066
1067done:
1068 spin_lock(&ci->lock);
1069
1070 if (retval)
1071 dev_err(ci->dev, "error: %i\n", retval);
1072}
1073
1074/**
1075 * isr_get_status_complete: get_status request complete function
1076 * @ep: endpoint
1077 * @req: request handled
1078 *
1079 * Caller must release lock
1080 */
1081static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
1082{
1083 if (ep == NULL || req == NULL)
1084 return;
1085
1086 kfree(req->buf);
1087 usb_ep_free_request(ep, req);
1088}
1089
1090/**
1091 * _ep_queue: queues (submits) an I/O request to an endpoint
1092 * @ep: endpoint
1093 * @req: request
1094 * @gfp_flags: GFP flags (not used)
1095 *
1096 * Caller must hold lock
1097 * This function returns an error code
1098 */
1099static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
1100 gfp_t __maybe_unused gfp_flags)
1101{
1102 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1103 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1104 struct ci_hdrc *ci = hwep->ci;
1105 int retval = 0;
1106
1107 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1108 return -EINVAL;
1109
1110 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1111 if (req->length)
1112 hwep = (ci->ep0_dir == RX) ?
1113 ci->ep0out : ci->ep0in;
1114 if (!list_empty(&hwep->qh.queue)) {
1115 _ep_nuke(hwep);
1116 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
1117 _usb_addr(hwep));
1118 }
1119 }
1120
1121 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
1122 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
1123 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
1124 return -EMSGSIZE;
1125 }
1126
1127 if (ci->has_short_pkt_limit &&
1128 hwreq->req.length > CI_MAX_REQ_SIZE) {
1129 dev_err(hwep->ci->dev, "request length too big (max 16KB)\n");
1130 return -EMSGSIZE;
1131 }
1132
1133 /* first nuke then test link, e.g. previous status has not sent */
1134 if (!list_empty(&hwreq->queue)) {
1135 dev_err(hwep->ci->dev, "request already in queue\n");
1136 return -EBUSY;
1137 }
1138
1139 /* push request */
1140 hwreq->req.status = -EINPROGRESS;
1141 hwreq->req.actual = 0;
1142
1143 retval = _hardware_enqueue(hwep, hwreq);
1144
1145 if (retval == -EALREADY)
1146 retval = 0;
1147 if (!retval)
1148 list_add_tail(&hwreq->queue, &hwep->qh.queue);
1149
1150 return retval;
1151}
1152
1153/**
1154 * isr_get_status_response: get_status request response
1155 * @ci: ci struct
1156 * @setup: setup request packet
1157 *
1158 * This function returns an error code
1159 */
1160static int isr_get_status_response(struct ci_hdrc *ci,
1161 struct usb_ctrlrequest *setup)
1162__releases(hwep->lock)
1163__acquires(hwep->lock)
1164{
1165 struct ci_hw_ep *hwep = ci->ep0in;
1166 struct usb_request *req = NULL;
1167 gfp_t gfp_flags = GFP_ATOMIC;
1168 int dir, num, retval;
1169
1170 if (hwep == NULL || setup == NULL)
1171 return -EINVAL;
1172
1173 spin_unlock(hwep->lock);
1174 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
1175 spin_lock(hwep->lock);
1176 if (req == NULL)
1177 return -ENOMEM;
1178
1179 req->complete = isr_get_status_complete;
1180 req->length = 2;
1181 req->buf = kzalloc(req->length, gfp_flags);
1182 if (req->buf == NULL) {
1183 retval = -ENOMEM;
1184 goto err_free_req;
1185 }
1186
1187 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1188 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
1189 ci->gadget.is_selfpowered;
1190 } else if ((setup->bRequestType & USB_RECIP_MASK) \
1191 == USB_RECIP_ENDPOINT) {
1192 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1193 TX : RX;
1194 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1195 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
1196 }
1197 /* else do nothing; reserved for future use */
1198
1199 retval = _ep_queue(&hwep->ep, req, gfp_flags);
1200 if (retval)
1201 goto err_free_buf;
1202
1203 return 0;
1204
1205 err_free_buf:
1206 kfree(req->buf);
1207 err_free_req:
1208 spin_unlock(hwep->lock);
1209 usb_ep_free_request(&hwep->ep, req);
1210 spin_lock(hwep->lock);
1211 return retval;
1212}
1213
1214/**
1215 * isr_setup_status_complete: setup_status request complete function
1216 * @ep: endpoint
1217 * @req: request handled
1218 *
1219 * Caller must release lock. Put the port in test mode if test mode
1220 * feature is selected.
1221 */
1222static void
1223isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
1224{
1225 struct ci_hdrc *ci = req->context;
1226 unsigned long flags;
1227
1228 if (req->status < 0)
1229 return;
1230
1231 if (ci->setaddr) {
1232 hw_usb_set_address(ci, ci->address);
1233 ci->setaddr = false;
1234 if (ci->address)
1235 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
1236 }
1237
1238 spin_lock_irqsave(&ci->lock, flags);
1239 if (ci->test_mode)
1240 hw_port_test_set(ci, ci->test_mode);
1241 spin_unlock_irqrestore(&ci->lock, flags);
1242}
1243
1244/**
1245 * isr_setup_status_phase: queues the status phase of a setup transation
1246 * @ci: ci struct
1247 *
1248 * This function returns an error code
1249 */
1250static int isr_setup_status_phase(struct ci_hdrc *ci)
1251{
1252 struct ci_hw_ep *hwep;
1253
1254 /*
1255 * Unexpected USB controller behavior, caused by bad signal integrity
1256 * or ground reference problems, can lead to isr_setup_status_phase
1257 * being called with ci->status equal to NULL.
1258 * If this situation occurs, you should review your USB hardware design.
1259 */
1260 if (WARN_ON_ONCE(!ci->status))
1261 return -EPIPE;
1262
1263 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
1264 ci->status->context = ci;
1265 ci->status->complete = isr_setup_status_complete;
1266
1267 return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
1268}
1269
1270/**
1271 * isr_tr_complete_low: transaction complete low level handler
1272 * @hwep: endpoint
1273 *
1274 * This function returns an error code
1275 * Caller must hold lock
1276 */
1277static int isr_tr_complete_low(struct ci_hw_ep *hwep)
1278__releases(hwep->lock)
1279__acquires(hwep->lock)
1280{
1281 struct ci_hw_req *hwreq, *hwreqtemp;
1282 struct ci_hw_ep *hweptemp = hwep;
1283 int retval = 0;
1284
1285 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
1286 queue) {
1287 retval = _hardware_dequeue(hwep, hwreq);
1288 if (retval < 0)
1289 break;
1290 list_del_init(&hwreq->queue);
1291 if (hwreq->req.complete != NULL) {
1292 spin_unlock(hwep->lock);
1293 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
1294 hwreq->req.length)
1295 hweptemp = hwep->ci->ep0in;
1296 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
1297 spin_lock(hwep->lock);
1298 }
1299 }
1300
1301 if (retval == -EBUSY)
1302 retval = 0;
1303
1304 return retval;
1305}
1306
1307static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1308{
1309 dev_warn(&ci->gadget.dev,
1310 "connect the device to an alternate port if you want HNP\n");
1311 return isr_setup_status_phase(ci);
1312}
1313
1314/**
1315 * isr_setup_packet_handler: setup packet handler
1316 * @ci: UDC descriptor
1317 *
1318 * This function handles setup packet
1319 */
1320static void isr_setup_packet_handler(struct ci_hdrc *ci)
1321__releases(ci->lock)
1322__acquires(ci->lock)
1323{
1324 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1325 struct usb_ctrlrequest req;
1326 int type, num, dir, err = -EINVAL;
1327 u8 tmode = 0;
1328
1329 /*
1330 * Flush data and handshake transactions of previous
1331 * setup packet.
1332 */
1333 _ep_nuke(ci->ep0out);
1334 _ep_nuke(ci->ep0in);
1335
1336 /* read_setup_packet */
1337 do {
1338 hw_test_and_set_setup_guard(ci);
1339 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1340 } while (!hw_test_and_clear_setup_guard(ci));
1341
1342 type = req.bRequestType;
1343
1344 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1345
1346 switch (req.bRequest) {
1347 case USB_REQ_CLEAR_FEATURE:
1348 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1349 le16_to_cpu(req.wValue) ==
1350 USB_ENDPOINT_HALT) {
1351 if (req.wLength != 0)
1352 break;
1353 num = le16_to_cpu(req.wIndex);
1354 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1355 num &= USB_ENDPOINT_NUMBER_MASK;
1356 if (dir == TX)
1357 num += ci->hw_ep_max / 2;
1358 if (!ci->ci_hw_ep[num].wedge) {
1359 spin_unlock(&ci->lock);
1360 err = usb_ep_clear_halt(
1361 &ci->ci_hw_ep[num].ep);
1362 spin_lock(&ci->lock);
1363 if (err)
1364 break;
1365 }
1366 err = isr_setup_status_phase(ci);
1367 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1368 le16_to_cpu(req.wValue) ==
1369 USB_DEVICE_REMOTE_WAKEUP) {
1370 if (req.wLength != 0)
1371 break;
1372 ci->remote_wakeup = 0;
1373 err = isr_setup_status_phase(ci);
1374 } else {
1375 goto delegate;
1376 }
1377 break;
1378 case USB_REQ_GET_STATUS:
1379 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1380 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1381 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1382 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1383 goto delegate;
1384 if (le16_to_cpu(req.wLength) != 2 ||
1385 le16_to_cpu(req.wValue) != 0)
1386 break;
1387 err = isr_get_status_response(ci, &req);
1388 break;
1389 case USB_REQ_SET_ADDRESS:
1390 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1391 goto delegate;
1392 if (le16_to_cpu(req.wLength) != 0 ||
1393 le16_to_cpu(req.wIndex) != 0)
1394 break;
1395 ci->address = (u8)le16_to_cpu(req.wValue);
1396 ci->setaddr = true;
1397 err = isr_setup_status_phase(ci);
1398 break;
1399 case USB_REQ_SET_FEATURE:
1400 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1401 le16_to_cpu(req.wValue) ==
1402 USB_ENDPOINT_HALT) {
1403 if (req.wLength != 0)
1404 break;
1405 num = le16_to_cpu(req.wIndex);
1406 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1407 num &= USB_ENDPOINT_NUMBER_MASK;
1408 if (dir == TX)
1409 num += ci->hw_ep_max / 2;
1410
1411 spin_unlock(&ci->lock);
1412 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1413 spin_lock(&ci->lock);
1414 if (!err)
1415 isr_setup_status_phase(ci);
1416 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1417 if (req.wLength != 0)
1418 break;
1419 switch (le16_to_cpu(req.wValue)) {
1420 case USB_DEVICE_REMOTE_WAKEUP:
1421 ci->remote_wakeup = 1;
1422 err = isr_setup_status_phase(ci);
1423 break;
1424 case USB_DEVICE_TEST_MODE:
1425 tmode = le16_to_cpu(req.wIndex) >> 8;
1426 switch (tmode) {
1427 case USB_TEST_J:
1428 case USB_TEST_K:
1429 case USB_TEST_SE0_NAK:
1430 case USB_TEST_PACKET:
1431 case USB_TEST_FORCE_ENABLE:
1432 ci->test_mode = tmode;
1433 err = isr_setup_status_phase(
1434 ci);
1435 break;
1436 default:
1437 break;
1438 }
1439 break;
1440 case USB_DEVICE_B_HNP_ENABLE:
1441 if (ci_otg_is_fsm_mode(ci)) {
1442 ci->gadget.b_hnp_enable = 1;
1443 err = isr_setup_status_phase(
1444 ci);
1445 }
1446 break;
1447 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1448 if (ci_otg_is_fsm_mode(ci))
1449 err = otg_a_alt_hnp_support(ci);
1450 break;
1451 case USB_DEVICE_A_HNP_SUPPORT:
1452 if (ci_otg_is_fsm_mode(ci)) {
1453 ci->gadget.a_hnp_support = 1;
1454 err = isr_setup_status_phase(
1455 ci);
1456 }
1457 break;
1458 default:
1459 goto delegate;
1460 }
1461 } else {
1462 goto delegate;
1463 }
1464 break;
1465 default:
1466delegate:
1467 if (req.wLength == 0) /* no data phase */
1468 ci->ep0_dir = TX;
1469
1470 spin_unlock(&ci->lock);
1471 err = ci->driver->setup(&ci->gadget, &req);
1472 spin_lock(&ci->lock);
1473 break;
1474 }
1475
1476 if (err < 0) {
1477 spin_unlock(&ci->lock);
1478 if (_ep_set_halt(&hwep->ep, 1, false))
1479 dev_err(ci->dev, "error: _ep_set_halt\n");
1480 spin_lock(&ci->lock);
1481 }
1482}
1483
1484/**
1485 * isr_tr_complete_handler: transaction complete interrupt handler
1486 * @ci: UDC descriptor
1487 *
1488 * This function handles traffic events
1489 */
1490static void isr_tr_complete_handler(struct ci_hdrc *ci)
1491__releases(ci->lock)
1492__acquires(ci->lock)
1493{
1494 unsigned i;
1495 int err;
1496
1497 for (i = 0; i < ci->hw_ep_max; i++) {
1498 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1499
1500 if (hwep->ep.desc == NULL)
1501 continue; /* not configured */
1502
1503 if (hw_test_and_clear_complete(ci, i)) {
1504 err = isr_tr_complete_low(hwep);
1505 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1506 if (err > 0) /* needs status phase */
1507 err = isr_setup_status_phase(ci);
1508 if (err < 0) {
1509 spin_unlock(&ci->lock);
1510 if (_ep_set_halt(&hwep->ep, 1, false))
1511 dev_err(ci->dev,
1512 "error: _ep_set_halt\n");
1513 spin_lock(&ci->lock);
1514 }
1515 }
1516 }
1517
1518 /* Only handle setup packet below */
1519 if (i == 0 &&
1520 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1521 isr_setup_packet_handler(ci);
1522 }
1523}
1524
1525/******************************************************************************
1526 * ENDPT block
1527 *****************************************************************************/
1528/*
1529 * ep_enable: configure endpoint, making it usable
1530 *
1531 * Check usb_ep_enable() at "usb_gadget.h" for details
1532 */
1533static int ep_enable(struct usb_ep *ep,
1534 const struct usb_endpoint_descriptor *desc)
1535{
1536 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1537 int retval = 0;
1538 unsigned long flags;
1539 u32 cap = 0;
1540
1541 if (ep == NULL || desc == NULL)
1542 return -EINVAL;
1543
1544 spin_lock_irqsave(hwep->lock, flags);
1545
1546 /* only internal SW should enable ctrl endpts */
1547
1548 if (!list_empty(&hwep->qh.queue)) {
1549 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1550 spin_unlock_irqrestore(hwep->lock, flags);
1551 return -EBUSY;
1552 }
1553
1554 hwep->ep.desc = desc;
1555
1556 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1557 hwep->num = usb_endpoint_num(desc);
1558 hwep->type = usb_endpoint_type(desc);
1559
1560 hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1561 hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1562
1563 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1564 cap |= QH_IOS;
1565
1566 cap |= QH_ZLT;
1567 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1568 /*
1569 * For ISO-TX, we set mult at QH as the largest value, and use
1570 * MultO at TD as real mult value.
1571 */
1572 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1573 cap |= 3 << __ffs(QH_MULT);
1574
1575 hwep->qh.ptr->cap = cpu_to_le32(cap);
1576
1577 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1578
1579 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1580 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1581 retval = -EINVAL;
1582 }
1583
1584 /*
1585 * Enable endpoints in the HW other than ep0 as ep0
1586 * is always enabled
1587 */
1588 if (hwep->num)
1589 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1590 hwep->type);
1591
1592 spin_unlock_irqrestore(hwep->lock, flags);
1593 return retval;
1594}
1595
1596/*
1597 * ep_disable: endpoint is no longer usable
1598 *
1599 * Check usb_ep_disable() at "usb_gadget.h" for details
1600 */
1601static int ep_disable(struct usb_ep *ep)
1602{
1603 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1604 int direction, retval = 0;
1605 unsigned long flags;
1606
1607 if (ep == NULL)
1608 return -EINVAL;
1609 else if (hwep->ep.desc == NULL)
1610 return -EBUSY;
1611
1612 spin_lock_irqsave(hwep->lock, flags);
1613 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1614 spin_unlock_irqrestore(hwep->lock, flags);
1615 return 0;
1616 }
1617
1618 /* only internal SW should disable ctrl endpts */
1619
1620 direction = hwep->dir;
1621 do {
1622 retval |= _ep_nuke(hwep);
1623 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1624
1625 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1626 hwep->dir = (hwep->dir == TX) ? RX : TX;
1627
1628 } while (hwep->dir != direction);
1629
1630 hwep->ep.desc = NULL;
1631
1632 spin_unlock_irqrestore(hwep->lock, flags);
1633 return retval;
1634}
1635
1636/*
1637 * ep_alloc_request: allocate a request object to use with this endpoint
1638 *
1639 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1640 */
1641static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1642{
1643 struct ci_hw_req *hwreq;
1644
1645 if (ep == NULL)
1646 return NULL;
1647
1648 hwreq = kzalloc_obj(struct ci_hw_req, gfp_flags);
1649 if (hwreq != NULL) {
1650 INIT_LIST_HEAD(&hwreq->queue);
1651 INIT_LIST_HEAD(&hwreq->tds);
1652 }
1653
1654 return (hwreq == NULL) ? NULL : &hwreq->req;
1655}
1656
1657/*
1658 * ep_free_request: frees a request object
1659 *
1660 * Check usb_ep_free_request() at "usb_gadget.h" for details
1661 */
1662static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1663{
1664 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1665 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1666 struct td_node *node, *tmpnode;
1667 unsigned long flags;
1668
1669 if (ep == NULL || req == NULL) {
1670 return;
1671 } else if (!list_empty(&hwreq->queue)) {
1672 dev_err(hwep->ci->dev, "freeing queued request\n");
1673 return;
1674 }
1675
1676 spin_lock_irqsave(hwep->lock, flags);
1677
1678 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1679 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1680 list_del_init(&node->td);
1681 node->ptr = NULL;
1682 kfree(node);
1683 }
1684
1685 kfree(hwreq);
1686
1687 spin_unlock_irqrestore(hwep->lock, flags);
1688}
1689
1690/*
1691 * ep_queue: queues (submits) an I/O request to an endpoint
1692 *
1693 * Check usb_ep_queue()* at usb_gadget.h" for details
1694 */
1695static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1696 gfp_t __maybe_unused gfp_flags)
1697{
1698 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1699 int retval = 0;
1700 unsigned long flags;
1701
1702 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1703 return -EINVAL;
1704
1705 spin_lock_irqsave(hwep->lock, flags);
1706 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1707 spin_unlock_irqrestore(hwep->lock, flags);
1708 return 0;
1709 }
1710 retval = _ep_queue(ep, req, gfp_flags);
1711 spin_unlock_irqrestore(hwep->lock, flags);
1712 return retval;
1713}
1714
1715/*
1716 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1717 *
1718 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1719 */
1720static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1721{
1722 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1723 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1724 unsigned long flags;
1725 struct td_node *node, *tmpnode;
1726
1727 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1728 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1729 list_empty(&hwep->qh.queue))
1730 return -EINVAL;
1731
1732 spin_lock_irqsave(hwep->lock, flags);
1733 if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
1734 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1735
1736 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1737 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1738 list_del(&node->td);
1739 kfree(node);
1740 }
1741
1742 /* pop request */
1743 list_del_init(&hwreq->queue);
1744
1745 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1746
1747 if (hwreq->sgt.sgl)
1748 sglist_do_debounce(hwreq, false);
1749
1750 req->status = -ECONNRESET;
1751
1752 if (hwreq->req.complete != NULL) {
1753 spin_unlock(hwep->lock);
1754 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1755 spin_lock(hwep->lock);
1756 }
1757
1758 spin_unlock_irqrestore(hwep->lock, flags);
1759 return 0;
1760}
1761
1762/*
1763 * ep_set_halt: sets the endpoint halt feature
1764 *
1765 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1766 */
1767static int ep_set_halt(struct usb_ep *ep, int value)
1768{
1769 return _ep_set_halt(ep, value, true);
1770}
1771
1772/*
1773 * ep_set_wedge: sets the halt feature and ignores clear requests
1774 *
1775 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1776 */
1777static int ep_set_wedge(struct usb_ep *ep)
1778{
1779 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1780 unsigned long flags;
1781
1782 if (ep == NULL || hwep->ep.desc == NULL)
1783 return -EINVAL;
1784
1785 spin_lock_irqsave(hwep->lock, flags);
1786 hwep->wedge = 1;
1787 spin_unlock_irqrestore(hwep->lock, flags);
1788
1789 return usb_ep_set_halt(ep);
1790}
1791
1792/*
1793 * ep_fifo_flush: flushes contents of a fifo
1794 *
1795 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1796 */
1797static void ep_fifo_flush(struct usb_ep *ep)
1798{
1799 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1800 unsigned long flags;
1801
1802 if (ep == NULL) {
1803 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1804 return;
1805 }
1806
1807 spin_lock_irqsave(hwep->lock, flags);
1808 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1809 spin_unlock_irqrestore(hwep->lock, flags);
1810 return;
1811 }
1812
1813 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1814
1815 spin_unlock_irqrestore(hwep->lock, flags);
1816}
1817
1818/*
1819 * Endpoint-specific part of the API to the USB controller hardware
1820 * Check "usb_gadget.h" for details
1821 */
1822static const struct usb_ep_ops usb_ep_ops = {
1823 .enable = ep_enable,
1824 .disable = ep_disable,
1825 .alloc_request = ep_alloc_request,
1826 .free_request = ep_free_request,
1827 .queue = ep_queue,
1828 .dequeue = ep_dequeue,
1829 .set_halt = ep_set_halt,
1830 .set_wedge = ep_set_wedge,
1831 .fifo_flush = ep_fifo_flush,
1832};
1833
1834/******************************************************************************
1835 * GADGET block
1836 *****************************************************************************/
1837
1838static void ci_udc_enable_vbus_irq(struct ci_hdrc *ci, bool enable)
1839{
1840 u32 reg = OTGSC_BSVIS;
1841
1842 if (!ci->is_otg)
1843 return;
1844
1845 if (enable)
1846 reg |= OTGSC_BSVIE;
1847
1848 /* Clear pending BSVIS and enable/disable BSVIE */
1849 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, reg);
1850}
1851
1852static int ci_udc_get_frame(struct usb_gadget *_gadget)
1853{
1854 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1855 unsigned long flags;
1856 int ret;
1857
1858 spin_lock_irqsave(&ci->lock, flags);
1859 ret = hw_read(ci, OP_FRINDEX, 0x3fff);
1860 spin_unlock_irqrestore(&ci->lock, flags);
1861 return ret >> 3;
1862}
1863
1864/*
1865 * ci_hdrc_gadget_connect: caller makes sure gadget driver is binded
1866 */
1867static void ci_hdrc_gadget_connect(struct usb_gadget *_gadget, int is_active)
1868{
1869 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1870
1871 if (is_active) {
1872 pm_runtime_get_sync(ci->dev);
1873 hw_device_reset(ci);
1874 spin_lock_irq(&ci->lock);
1875 if (ci->driver) {
1876 hw_device_state(ci, ci->ep0out->qh.dma);
1877 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1878 spin_unlock_irq(&ci->lock);
1879 usb_udc_vbus_handler(_gadget, true);
1880 } else {
1881 spin_unlock_irq(&ci->lock);
1882 }
1883 } else {
1884 usb_udc_vbus_handler(_gadget, false);
1885 if (ci->driver)
1886 ci->driver->disconnect(&ci->gadget);
1887 hw_device_state(ci, 0);
1888 if (ci->platdata->notify_event)
1889 ci->platdata->notify_event(ci,
1890 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1891 _gadget_stop_activity(&ci->gadget);
1892 pm_runtime_put_sync(ci->dev);
1893 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1894 }
1895}
1896
1897static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1898{
1899 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1900 unsigned long flags;
1901 int ret = 0;
1902
1903 spin_lock_irqsave(&ci->lock, flags);
1904 ci->vbus_active = is_active;
1905 spin_unlock_irqrestore(&ci->lock, flags);
1906
1907 if (ci->usb_phy)
1908 usb_phy_set_charger_state(ci->usb_phy, is_active ?
1909 USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
1910
1911 if (ci->platdata->notify_event)
1912 ret = ci->platdata->notify_event(ci,
1913 CI_HDRC_CONTROLLER_VBUS_EVENT);
1914
1915 if (ci->usb_phy) {
1916 if (is_active)
1917 usb_phy_set_event(ci->usb_phy, USB_EVENT_VBUS);
1918 else
1919 usb_phy_set_event(ci->usb_phy, USB_EVENT_NONE);
1920 }
1921
1922 if (ci->driver)
1923 ci_hdrc_gadget_connect(_gadget, is_active);
1924
1925 return ret;
1926}
1927
1928static int ci_udc_wakeup(struct usb_gadget *_gadget)
1929{
1930 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1931 unsigned long flags;
1932 int ret = 0;
1933
1934 spin_lock_irqsave(&ci->lock, flags);
1935 if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
1936 spin_unlock_irqrestore(&ci->lock, flags);
1937 return 0;
1938 }
1939 if (!ci->remote_wakeup) {
1940 ret = -EOPNOTSUPP;
1941 goto out;
1942 }
1943 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1944 ret = -EINVAL;
1945 goto out;
1946 }
1947 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1948out:
1949 spin_unlock_irqrestore(&ci->lock, flags);
1950 return ret;
1951}
1952
1953static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1954{
1955 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1956
1957 if (ci->usb_phy)
1958 return usb_phy_set_power(ci->usb_phy, ma);
1959 return -ENOTSUPP;
1960}
1961
1962static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1963{
1964 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1965 struct ci_hw_ep *hwep = ci->ep0in;
1966 unsigned long flags;
1967
1968 spin_lock_irqsave(hwep->lock, flags);
1969 _gadget->is_selfpowered = (is_on != 0);
1970 spin_unlock_irqrestore(hwep->lock, flags);
1971
1972 return 0;
1973}
1974
1975/* Change Data+ pullup status
1976 * this func is used by usb_gadget_connect/disconnect
1977 */
1978static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1979{
1980 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1981
1982 /*
1983 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1984 * and don't touch Data+ in host mode for dual role config.
1985 */
1986 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1987 return 0;
1988
1989 pm_runtime_get_sync(ci->dev);
1990 if (is_on)
1991 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1992 else
1993 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1994
1995 if (ci->platdata->notify_event) {
1996 _gadget->connected = is_on;
1997 ci->platdata->notify_event(ci, CI_HDRC_CONTROLLER_PULLUP_EVENT);
1998 }
1999 pm_runtime_put_sync(ci->dev);
2000
2001 return 0;
2002}
2003
2004static int ci_udc_start(struct usb_gadget *gadget,
2005 struct usb_gadget_driver *driver);
2006static int ci_udc_stop(struct usb_gadget *gadget);
2007
2008/* Match ISOC IN from the highest endpoint */
2009static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
2010 struct usb_endpoint_descriptor *desc,
2011 struct usb_ss_ep_comp_descriptor *comp_desc)
2012{
2013 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
2014 struct usb_ep *ep;
2015
2016 if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
2017 list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
2018 if (ep->caps.dir_in && !ep->claimed)
2019 return ep;
2020 }
2021 }
2022
2023 return NULL;
2024}
2025
2026/*
2027 * Device operations part of the API to the USB controller hardware,
2028 * which don't involve endpoints (or i/o)
2029 * Check "usb_gadget.h" for details
2030 */
2031static const struct usb_gadget_ops usb_gadget_ops = {
2032 .get_frame = ci_udc_get_frame,
2033 .vbus_session = ci_udc_vbus_session,
2034 .wakeup = ci_udc_wakeup,
2035 .set_selfpowered = ci_udc_selfpowered,
2036 .pullup = ci_udc_pullup,
2037 .vbus_draw = ci_udc_vbus_draw,
2038 .udc_start = ci_udc_start,
2039 .udc_stop = ci_udc_stop,
2040 .match_ep = ci_udc_match_ep,
2041};
2042
2043static int init_eps(struct ci_hdrc *ci)
2044{
2045 int retval = 0, i, j;
2046
2047 memset(ci->ci_hw_ep, 0, sizeof(ci->ci_hw_ep));
2048
2049 for (i = 0; i < ci->hw_ep_max/2; i++)
2050 for (j = RX; j <= TX; j++) {
2051 int k = i + j * ci->hw_ep_max/2;
2052 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
2053
2054 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
2055 (j == TX) ? "in" : "out");
2056
2057 hwep->ci = ci;
2058 hwep->lock = &ci->lock;
2059 hwep->td_pool = ci->td_pool;
2060
2061 hwep->ep.name = hwep->name;
2062 hwep->ep.ops = &usb_ep_ops;
2063
2064 if (i == 0) {
2065 hwep->ep.caps.type_control = true;
2066 } else {
2067 hwep->ep.caps.type_iso = true;
2068 hwep->ep.caps.type_bulk = true;
2069 hwep->ep.caps.type_int = true;
2070 }
2071
2072 if (j == TX)
2073 hwep->ep.caps.dir_in = true;
2074 else
2075 hwep->ep.caps.dir_out = true;
2076
2077 /*
2078 * for ep0: maxP defined in desc, for other
2079 * eps, maxP is set by epautoconfig() called
2080 * by gadget layer
2081 */
2082 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
2083
2084 INIT_LIST_HEAD(&hwep->qh.queue);
2085 hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
2086 &hwep->qh.dma);
2087 if (hwep->qh.ptr == NULL)
2088 retval = -ENOMEM;
2089
2090 /*
2091 * set up shorthands for ep0 out and in endpoints,
2092 * don't add to gadget's ep_list
2093 */
2094 if (i == 0) {
2095 if (j == RX)
2096 ci->ep0out = hwep;
2097 else
2098 ci->ep0in = hwep;
2099
2100 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
2101 continue;
2102 }
2103
2104 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
2105 }
2106
2107 return retval;
2108}
2109
2110static void destroy_eps(struct ci_hdrc *ci)
2111{
2112 int i;
2113
2114 for (i = 0; i < ci->hw_ep_max; i++) {
2115 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
2116
2117 if (hwep->pending_td)
2118 free_pending_td(hwep);
2119 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
2120 }
2121}
2122
2123/**
2124 * ci_udc_start: register a gadget driver
2125 * @gadget: our gadget
2126 * @driver: the driver being registered
2127 *
2128 * Interrupts are enabled here.
2129 */
2130static int ci_udc_start(struct usb_gadget *gadget,
2131 struct usb_gadget_driver *driver)
2132{
2133 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
2134 int retval;
2135
2136 if (driver->disconnect == NULL)
2137 return -EINVAL;
2138
2139 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
2140 retval = usb_ep_enable(&ci->ep0out->ep);
2141 if (retval)
2142 return retval;
2143
2144 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
2145 retval = usb_ep_enable(&ci->ep0in->ep);
2146 if (retval)
2147 return retval;
2148
2149 ci->driver = driver;
2150
2151 /* Start otg fsm for B-device */
2152 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
2153 ci_hdrc_otg_fsm_start(ci);
2154 return retval;
2155 }
2156
2157 if (ci->vbus_active)
2158 ci_hdrc_gadget_connect(gadget, 1);
2159 else
2160 usb_udc_vbus_handler(&ci->gadget, false);
2161
2162 return retval;
2163}
2164
2165static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
2166{
2167 if (!ci_otg_is_fsm_mode(ci))
2168 return;
2169
2170 mutex_lock(&ci->fsm.lock);
2171 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
2172 ci->fsm.a_bidl_adis_tmout = 1;
2173 ci_hdrc_otg_fsm_start(ci);
2174 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
2175 ci->fsm.protocol = PROTO_UNDEF;
2176 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
2177 }
2178 mutex_unlock(&ci->fsm.lock);
2179}
2180
2181/*
2182 * ci_udc_stop: unregister a gadget driver
2183 */
2184static int ci_udc_stop(struct usb_gadget *gadget)
2185{
2186 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
2187 unsigned long flags;
2188
2189 spin_lock_irqsave(&ci->lock, flags);
2190 ci->driver = NULL;
2191
2192 if (ci->vbus_active) {
2193 hw_device_state(ci, 0);
2194 spin_unlock_irqrestore(&ci->lock, flags);
2195 if (ci->platdata->notify_event)
2196 ci->platdata->notify_event(ci,
2197 CI_HDRC_CONTROLLER_STOPPED_EVENT);
2198 _gadget_stop_activity(&ci->gadget);
2199 spin_lock_irqsave(&ci->lock, flags);
2200 pm_runtime_put(ci->dev);
2201 }
2202
2203 spin_unlock_irqrestore(&ci->lock, flags);
2204
2205 ci_udc_stop_for_otg_fsm(ci);
2206 return 0;
2207}
2208
2209/******************************************************************************
2210 * BUS block
2211 *****************************************************************************/
2212/*
2213 * udc_irq: ci interrupt handler
2214 *
2215 * This function returns IRQ_HANDLED if the IRQ has been handled
2216 * It locks access to registers
2217 */
2218static irqreturn_t udc_irq(struct ci_hdrc *ci)
2219{
2220 irqreturn_t retval;
2221 u32 intr;
2222
2223 if (ci == NULL)
2224 return IRQ_HANDLED;
2225
2226 spin_lock(&ci->lock);
2227
2228 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
2229 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
2230 USBMODE_CM_DC) {
2231 spin_unlock(&ci->lock);
2232 return IRQ_NONE;
2233 }
2234 }
2235 intr = hw_test_and_clear_intr_active(ci);
2236
2237 if (intr) {
2238 /* order defines priority - do NOT change it */
2239 if (USBi_URI & intr)
2240 isr_reset_handler(ci);
2241
2242 if (USBi_PCI & intr) {
2243 ci->gadget.speed = hw_port_is_high_speed(ci) ?
2244 USB_SPEED_HIGH : USB_SPEED_FULL;
2245 if (ci->usb_phy)
2246 usb_phy_set_event(ci->usb_phy,
2247 USB_EVENT_ENUMERATED);
2248 if (ci->suspended) {
2249 if (ci->driver->resume) {
2250 spin_unlock(&ci->lock);
2251 ci->driver->resume(&ci->gadget);
2252 spin_lock(&ci->lock);
2253 }
2254 ci->suspended = 0;
2255 usb_gadget_set_state(&ci->gadget,
2256 ci->resume_state);
2257 }
2258 }
2259
2260 if ((USBi_UI | USBi_UEI) & intr)
2261 isr_tr_complete_handler(ci);
2262
2263 if ((USBi_SLI & intr) && !(ci->suspended)) {
2264 ci->suspended = 1;
2265 ci->resume_state = ci->gadget.state;
2266 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
2267 ci->driver->suspend) {
2268 spin_unlock(&ci->lock);
2269 ci->driver->suspend(&ci->gadget);
2270 spin_lock(&ci->lock);
2271 }
2272 usb_gadget_set_state(&ci->gadget,
2273 USB_STATE_SUSPENDED);
2274 }
2275 retval = IRQ_HANDLED;
2276 } else {
2277 retval = IRQ_NONE;
2278 }
2279 spin_unlock(&ci->lock);
2280
2281 return retval;
2282}
2283
2284/**
2285 * udc_start: initialize gadget role
2286 * @ci: chipidea controller
2287 */
2288static int udc_start(struct ci_hdrc *ci)
2289{
2290 struct device *dev = ci->dev;
2291 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
2292 int retval = 0;
2293
2294 memset(&ci->gadget, 0, sizeof(ci->gadget));
2295
2296 ci->gadget.ops = &usb_gadget_ops;
2297 ci->gadget.speed = USB_SPEED_UNKNOWN;
2298 ci->gadget.max_speed = USB_SPEED_HIGH;
2299 ci->gadget.name = ci->platdata->name;
2300 ci->gadget.otg_caps = otg_caps;
2301 ci->gadget.sg_supported = 1;
2302 ci->gadget.irq = ci->irq;
2303
2304 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
2305 ci->gadget.quirk_avoids_skb_reserve = 1;
2306
2307 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
2308 otg_caps->adp_support))
2309 ci->gadget.is_otg = 1;
2310
2311 INIT_LIST_HEAD(&ci->gadget.ep_list);
2312
2313 /* alloc resources */
2314 ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
2315 sizeof(struct ci_hw_qh),
2316 64, CI_HDRC_PAGE_SIZE);
2317 if (ci->qh_pool == NULL)
2318 return -ENOMEM;
2319
2320 ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
2321 sizeof(struct ci_hw_td),
2322 64, CI_HDRC_PAGE_SIZE);
2323 if (ci->td_pool == NULL) {
2324 retval = -ENOMEM;
2325 goto free_qh_pool;
2326 }
2327
2328 retval = init_eps(ci);
2329 if (retval)
2330 goto free_pools;
2331
2332 ci->gadget.ep0 = &ci->ep0in->ep;
2333
2334 if (ci->platdata->pins_device)
2335 pinctrl_select_state(ci->platdata->pctl,
2336 ci->platdata->pins_device);
2337
2338 retval = usb_add_gadget_udc(dev, &ci->gadget);
2339 if (retval)
2340 goto destroy_eps;
2341
2342 ci_udc_enable_vbus_irq(ci, true);
2343 return retval;
2344
2345destroy_eps:
2346 destroy_eps(ci);
2347free_pools:
2348 dma_pool_destroy(ci->td_pool);
2349free_qh_pool:
2350 dma_pool_destroy(ci->qh_pool);
2351 return retval;
2352}
2353
2354/**
2355 * udc_stop: deinitialize gadget role
2356 * @ci: chipidea controller
2357 */
2358static void udc_stop(struct ci_hdrc *ci)
2359{
2360 ci_udc_enable_vbus_irq(ci, false);
2361 usb_del_gadget_udc(&ci->gadget);
2362 ci->vbus_active = 0;
2363
2364 destroy_eps(ci);
2365
2366 dma_pool_destroy(ci->td_pool);
2367 dma_pool_destroy(ci->qh_pool);
2368
2369 if (ci->platdata->pins_device && ci->platdata->pins_default)
2370 pinctrl_select_state(ci->platdata->pctl,
2371 ci->platdata->pins_default);
2372}
2373
2374#ifdef CONFIG_PM_SLEEP
2375static void udc_suspend(struct ci_hdrc *ci)
2376{
2377 /*
2378 * Set OP_ENDPTLISTADDR to be non-zero for
2379 * checking if controller resume from power lost
2380 * in non-host mode.
2381 */
2382 if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0)
2383 hw_write(ci, OP_ENDPTLISTADDR, ~0, ~0);
2384
2385 if (ci->gadget.connected &&
2386 (!ci->suspended || !device_may_wakeup(ci->dev)))
2387 usb_gadget_disconnect(&ci->gadget);
2388}
2389
2390static void udc_resume(struct ci_hdrc *ci, bool power_lost)
2391{
2392 if (power_lost) {
2393 ci_udc_enable_vbus_irq(ci, true);
2394 if (ci->vbus_active)
2395 usb_gadget_vbus_disconnect(&ci->gadget);
2396 } else if (ci->vbus_active && ci->driver &&
2397 !ci->gadget.connected) {
2398 usb_gadget_connect(&ci->gadget);
2399 }
2400
2401 /* Restore value 0 if it was set for power lost check */
2402 if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0xFFFFFFFF)
2403 hw_write(ci, OP_ENDPTLISTADDR, ~0, 0);
2404}
2405#endif
2406
2407/**
2408 * ci_hdrc_gadget_init - initialize device related bits
2409 * @ci: the controller
2410 *
2411 * This function initializes the gadget, if the device is "device capable".
2412 */
2413int ci_hdrc_gadget_init(struct ci_hdrc *ci)
2414{
2415 struct ci_role_driver *rdrv;
2416
2417 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
2418 return -ENXIO;
2419
2420 rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
2421 if (!rdrv)
2422 return -ENOMEM;
2423
2424 rdrv->start = udc_start;
2425 rdrv->stop = udc_stop;
2426#ifdef CONFIG_PM_SLEEP
2427 rdrv->suspend = udc_suspend;
2428 rdrv->resume = udc_resume;
2429#endif
2430 rdrv->irq = udc_irq;
2431 rdrv->name = "gadget";
2432
2433 ci->roles[CI_ROLE_GADGET] = rdrv;
2434
2435 /* Pull down DP for possible charger detection */
2436 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
2437 return 0;
2438}
2439
2440/*
2441 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
2442 *
2443 * No interrupts active, the IRQ has been released
2444 */
2445void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
2446{
2447 struct device *dev = &ci->gadget.dev;
2448
2449 if (ci->roles[CI_ROLE_GADGET] && device_is_registered(dev))
2450 udc_stop(ci);
2451}