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1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2/******************************************************************************
3 *
4 * Name: actbl2.h - ACPI Table Definitions
5 *
6 * Copyright (C) 2000 - 2026, Intel Corp.
7 *
8 *****************************************************************************/
9
10#ifndef __ACTBL2_H__
11#define __ACTBL2_H__
12
13/*******************************************************************************
14 *
15 * Additional ACPI Tables (2)
16 *
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
19 *
20 ******************************************************************************/
21
22/*
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
26 */
27#define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */
28#define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */
29#define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */
30#define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */
31#define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */
32#define ACPI_SIG_ERDT "ERDT" /* Enhanced Resource Director Technology */
33#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
34#define ACPI_SIG_IOVT "IOVT" /* I/O Virtualization Table */
35#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
36#define ACPI_SIG_KEYP "KEYP" /* Key Programming Interface for IDE */
37#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
38#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
39#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
40#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
41#define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */
42#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
43#define ACPI_SIG_MRRM "MRRM" /* Memory Range and Region Mapping table */
44#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
45#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
46#define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */
47#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
48#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
49#define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */
50#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
51#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
52#define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */
53#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
54#define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */
55#define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
56#define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
57#define ACPI_SIG_RIMT "RIMT" /* RISC-V IO Mapping Table */
58#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
59#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
60#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
61#define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */
62#define ACPI_SIG_SWFT "SWFT" /* SoundWire File Table */
63#define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */
64
65/*
66 * All tables must be byte-packed to match the ACPI specification, since
67 * the tables are provided by the system BIOS.
68 */
69#pragma pack(1)
70
71/*
72 * Note: C bitfields are not used for this reason:
73 *
74 * "Bitfields are great and easy to read, but unfortunately the C language
75 * does not specify the layout of bitfields in memory, which means they are
76 * essentially useless for dealing with packed data in on-disk formats or
77 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
78 * this decision was a design error in C. Ritchie could have picked an order
79 * and stuck with it." Norman Ramsey.
80 * See http://stackoverflow.com/a/1053662/41661
81 */
82
83/*******************************************************************************
84 *
85 * AEST - Arm Error Source Table
86 *
87 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1(Sep 2020) and
88 * 2.0(May 2023) Platform Design Document.
89 *
90 ******************************************************************************/
91
92struct acpi_table_aest {
93 struct acpi_table_header header;
94};
95
96/* Common Subtable header - one per Node Structure (Subtable) */
97
98struct acpi_aest_hdr {
99 u8 type;
100 u16 length;
101 u8 reserved;
102 u32 node_specific_offset;
103 u32 node_interface_offset;
104 u32 node_interrupt_offset;
105 u32 node_interrupt_count;
106 u64 timestamp_rate;
107 u64 reserved1;
108 u64 error_injection_rate;
109};
110
111/* Values for Type above */
112
113#define ACPI_AEST_PROCESSOR_ERROR_NODE 0
114#define ACPI_AEST_MEMORY_ERROR_NODE 1
115#define ACPI_AEST_SMMU_ERROR_NODE 2
116#define ACPI_AEST_VENDOR_ERROR_NODE 3
117#define ACPI_AEST_GIC_ERROR_NODE 4
118#define ACPI_AEST_PCIE_ERROR_NODE 5
119#define ACPI_AEST_PROXY_ERROR_NODE 6
120#define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */
121
122/*
123 * AEST subtables (Error nodes)
124 */
125
126/* 0: Processor Error */
127
128typedef struct acpi_aest_processor {
129 u32 processor_id;
130 u8 resource_type;
131 u8 reserved;
132 u8 flags;
133 u8 revision;
134 u64 processor_affinity;
135
136} acpi_aest_processor;
137
138/* Values for resource_type above, related structs below */
139
140#define ACPI_AEST_CACHE_RESOURCE 0
141#define ACPI_AEST_TLB_RESOURCE 1
142#define ACPI_AEST_GENERIC_RESOURCE 2
143#define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */
144
145/* 0R: Processor Cache Resource Substructure */
146
147typedef struct acpi_aest_processor_cache {
148 u32 cache_reference;
149 u32 reserved;
150
151} acpi_aest_processor_cache;
152
153/* Values for cache_type above */
154
155#define ACPI_AEST_CACHE_DATA 0
156#define ACPI_AEST_CACHE_INSTRUCTION 1
157#define ACPI_AEST_CACHE_UNIFIED 2
158#define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */
159
160/* 1R: Processor TLB Resource Substructure */
161
162typedef struct acpi_aest_processor_tlb {
163 u32 tlb_level;
164 u32 reserved;
165
166} acpi_aest_processor_tlb;
167
168/* 2R: Processor Generic Resource Substructure */
169
170typedef struct acpi_aest_processor_generic {
171 u32 resource;
172
173} acpi_aest_processor_generic;
174
175/* 1: Memory Error */
176
177typedef struct acpi_aest_memory {
178 u32 srat_proximity_domain;
179
180} acpi_aest_memory;
181
182/* 2: Smmu Error */
183
184typedef struct acpi_aest_smmu {
185 u32 iort_node_reference;
186 u32 subcomponent_reference;
187
188} acpi_aest_smmu;
189
190/* 3: Vendor Defined */
191
192typedef struct acpi_aest_vendor {
193 u32 acpi_hid;
194 u32 acpi_uid;
195 u8 vendor_specific_data[16];
196
197} acpi_aest_vendor;
198
199struct acpi_aest_vendor_v2 {
200 char acpi_hid[8];
201 u32 acpi_uid;
202 u8 vendor_specific_data[16];
203};
204
205/* 4: Gic Error */
206
207typedef struct acpi_aest_gic {
208 u32 interface_type;
209 u32 instance_id;
210
211} acpi_aest_gic;
212
213/* Values for interface_type above */
214
215#define ACPI_AEST_GIC_CPU 0
216#define ACPI_AEST_GIC_DISTRIBUTOR 1
217#define ACPI_AEST_GIC_REDISTRIBUTOR 2
218#define ACPI_AEST_GIC_ITS 3
219#define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */
220
221/* 5: PCIe Error */
222
223struct acpi_aest_pcie {
224 u32 iort_node_reference;
225};
226
227/* 6: Proxy Error */
228
229struct acpi_aest_proxy {
230 u64 node_address;
231};
232
233/* Node Interface Structure */
234
235typedef struct acpi_aest_node_interface {
236 u8 type;
237 u8 reserved[3];
238 u32 flags;
239 u64 address;
240 u32 error_record_index;
241 u32 error_record_count;
242 u64 error_record_implemented;
243 u64 error_status_reporting;
244 u64 addressing_mode;
245
246} acpi_aest_node_interface;
247
248/* Node Interface Structure V2 */
249
250struct acpi_aest_node_interface_header {
251 u8 type;
252 u8 group_format;
253 u8 reserved[2];
254 u32 flags;
255 u64 address;
256 u32 error_record_index;
257 u32 error_record_count;
258};
259
260#define ACPI_AEST_NODE_GROUP_FORMAT_4K 0
261#define ACPI_AEST_NODE_GROUP_FORMAT_16K 1
262#define ACPI_AEST_NODE_GROUP_FORMAT_64K 2
263
264struct acpi_aest_node_interface_common {
265 u32 error_node_device;
266 u32 processor_affinity;
267 u64 error_group_register_base;
268 u64 fault_inject_register_base;
269 u64 interrupt_config_register_base;
270};
271
272struct acpi_aest_node_interface_4k {
273 u64 error_record_implemented;
274 u64 error_status_reporting;
275 u64 addressing_mode;
276 struct acpi_aest_node_interface_common common;
277};
278
279struct acpi_aest_node_interface_16k {
280 u64 error_record_implemented[4];
281 u64 error_status_reporting[4];
282 u64 addressing_mode[4];
283 struct acpi_aest_node_interface_common common;
284};
285
286struct acpi_aest_node_interface_64k {
287 u64 error_record_implemented[14];
288 u64 error_status_reporting[14];
289 u64 addressing_mode[14];
290 struct acpi_aest_node_interface_common common;
291};
292
293/* Values for Type field above */
294
295#define ACPI_AEST_NODE_SYSTEM_REGISTER 0
296#define ACPI_AEST_NODE_MEMORY_MAPPED 1
297#define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2
298#define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */
299
300/* Node Interrupt Structure */
301
302typedef struct acpi_aest_node_interrupt {
303 u8 type;
304 u8 reserved[2];
305 u8 flags;
306 u32 gsiv;
307 u8 iort_id;
308 u8 reserved1[3];
309
310} acpi_aest_node_interrupt;
311
312/* Node Interrupt Structure V2 */
313
314struct acpi_aest_node_interrupt_v2 {
315 u8 type;
316 u8 reserved[2];
317 u8 flags;
318 u32 gsiv;
319 u8 reserved1[4];
320};
321
322/* Values for Type field above */
323
324#define ACPI_AEST_NODE_FAULT_HANDLING 0
325#define ACPI_AEST_NODE_ERROR_RECOVERY 1
326#define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */
327
328/*******************************************************************************
329 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface
330 *
331 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document"
332 * ARM DEN0093 v1.1
333 *
334 ******************************************************************************/
335struct acpi_table_agdi {
336 struct acpi_table_header header; /* Common ACPI table header */
337 u8 flags;
338 u8 reserved[3];
339 u32 sdei_event;
340 u32 gsiv;
341};
342
343/* Mask for Flags field above */
344
345#define ACPI_AGDI_SIGNALING_MODE (1)
346
347/*******************************************************************************
348 *
349 * APMT - ARM Performance Monitoring Unit Table
350 *
351 * Conforms to:
352 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document
353 * ARM DEN0117 v1.0 November 25, 2021
354 *
355 ******************************************************************************/
356
357struct acpi_table_apmt {
358 struct acpi_table_header header; /* Common ACPI table header */
359};
360
361#define ACPI_APMT_NODE_ID_LENGTH 4
362
363/*
364 * APMT subtables
365 */
366struct acpi_apmt_node {
367 u16 length;
368 u8 flags;
369 u8 type;
370 u32 id;
371 u64 inst_primary;
372 u32 inst_secondary;
373 u64 base_address0;
374 u64 base_address1;
375 u32 ovflw_irq;
376 u32 reserved;
377 u32 ovflw_irq_flags;
378 u32 proc_affinity;
379 u32 impl_id;
380};
381
382/* Masks for Flags field above */
383
384#define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0)
385#define ACPI_APMT_FLAGS_AFFINITY (1<<1)
386#define ACPI_APMT_FLAGS_ATOMIC (1<<2)
387
388/* Values for Flags dual page field above */
389
390#define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0)
391#define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0)
392
393/* Values for Flags processor affinity field above */
394#define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1)
395#define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1)
396
397/* Values for Flags 64-bit atomic field above */
398#define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2)
399#define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2)
400
401/* Values for Type field above */
402
403enum acpi_apmt_node_type {
404 ACPI_APMT_NODE_TYPE_MC = 0x00,
405 ACPI_APMT_NODE_TYPE_SMMU = 0x01,
406 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02,
407 ACPI_APMT_NODE_TYPE_ACPI = 0x03,
408 ACPI_APMT_NODE_TYPE_CACHE = 0x04,
409 ACPI_APMT_NODE_TYPE_COUNT
410};
411
412/* Masks for ovflw_irq_flags field above */
413
414#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0)
415#define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1)
416
417/* Values for ovflw_irq_flags mode field above */
418
419#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0)
420#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0)
421
422/* Values for ovflw_irq_flags type field above */
423
424#define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1)
425
426/*******************************************************************************
427 *
428 * BDAT - BIOS Data ACPI Table
429 *
430 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5
431 * Nov 2020
432 *
433 ******************************************************************************/
434
435struct acpi_table_bdat {
436 struct acpi_table_header header;
437 struct acpi_generic_address gas;
438};
439
440/*******************************************************************************
441 *
442 * CCEL - CC-Event Log
443 * From: "Guest-Host-Communication Interface (GHCI) for Intel
444 * Trust Domain Extensions (Intel TDX)". Feb 2022
445 *
446 ******************************************************************************/
447
448struct acpi_table_ccel {
449 struct acpi_table_header header; /* Common ACPI table header */
450 u8 CCtype;
451 u8 Ccsub_type;
452 u16 reserved;
453 u64 log_area_minimum_length;
454 u64 log_area_start_address;
455};
456
457/*******************************************************************************
458 *
459 * ERDT - Enhanced Resource Director Technology (ERDT) table
460 *
461 * Conforms to "Intel Resource Director Technology Architecture Specification"
462 * Version 1.1, January 2025
463 *
464 ******************************************************************************/
465
466struct acpi_table_erdt {
467 struct acpi_table_header header; /* Common ACPI table header */
468 u32 max_clos; /* Maximum classes of service */
469 u8 reserved[24];
470 u8 erdt_substructures[];
471};
472
473/* Values for subtable type in struct acpi_subtbl_hdr_16 */
474
475enum acpi_erdt_type {
476 ACPI_ERDT_TYPE_RMDD = 0,
477 ACPI_ERDT_TYPE_CACD = 1,
478 ACPI_ERDT_TYPE_DACD = 2,
479 ACPI_ERDT_TYPE_CMRC = 3,
480 ACPI_ERDT_TYPE_MMRC = 4,
481 ACPI_ERDT_TYPE_MARC = 5,
482 ACPI_ERDT_TYPE_CARC = 6,
483 ACPI_ERDT_TYPE_CMRD = 7,
484 ACPI_ERDT_TYPE_IBRD = 8,
485 ACPI_ERDT_TYPE_IBAD = 9,
486 ACPI_ERDT_TYPE_CARD = 10,
487 ACPI_ERDT_TYPE_RESERVED = 11 /* 11 and above are reserved */
488};
489
490/*
491 * ERDT Subtables, correspond to Type in struct acpi_subtbl_hdr_16
492 */
493
494/* 0: RMDD - Resource Management Domain Description */
495
496struct acpi_erdt_rmdd {
497 struct acpi_subtbl_hdr_16 header;
498 u16 flags;
499 u16 IO_l3_slices; /* Number of slices in IO cache */
500 u8 IO_l3_sets; /* Number of sets in IO cache */
501 u8 IO_l3_ways; /* Number of ways in IO cache */
502 u64 reserved;
503 u16 domain_id; /* Unique domain ID */
504 u32 max_rmid; /* Maximun RMID supported */
505 u64 creg_base; /* Control Register Base Address */
506 u16 creg_size; /* Control Register Size (4K pages) */
507 u8 rmdd_structs[];
508};
509
510/* 1: CACD - CPU Agent Collection Description */
511
512struct acpi_erdt_cacd {
513 struct acpi_subtbl_hdr_16 header;
514 u16 reserved;
515 u16 domain_id; /* Unique domain ID */
516 u32 X2APICIDS[];
517};
518
519/* 2: DACD - Device Agent Collection Description */
520
521struct acpi_erdt_dacd {
522 struct acpi_subtbl_hdr_16 header;
523 u16 reserved;
524 u16 domain_id; /* Unique domain ID */
525 u8 dev_paths[];
526};
527
528struct acpi_erdt_dacd_dev_paths {
529 struct acpi_subtable_header header;
530 u16 segment;
531 u8 reserved;
532 u8 start_bus;
533 u8 path[];
534};
535
536/* 3: CMRC - Cache Monitoring Registers for CPU Agents */
537
538struct acpi_erdt_cmrc {
539 struct acpi_subtbl_hdr_16 header;
540 u32 reserved1;
541 u32 flags;
542 u8 index_fn;
543 u8 reserved2[11];
544 u64 cmt_reg_base;
545 u32 cmt_reg_size;
546 u16 clump_size;
547 u16 clump_stride;
548 u64 up_scale;
549};
550
551/* 4: MMRC - Memory-bandwidth Monitoring Registers for CPU Agents */
552
553struct acpi_erdt_mmrc {
554 struct acpi_subtbl_hdr_16 header;
555 u32 reserved1;
556 u32 flags;
557 u8 index_fn;
558 u8 reserved2[11];
559 u64 reg_base;
560 u32 reg_size;
561 u8 counter_width;
562 u64 up_scale;
563 u8 reserved3[7];
564 u32 corr_factor_list_len;
565 u32 corr_factor_list[];
566};
567
568/* 5: MARC - Memory-bandwidth Allocation Registers for CPU Agents */
569
570struct acpi_erdt_marc {
571 struct acpi_subtbl_hdr_16 header;
572 u16 reserved1;
573 u16 flags;
574 u8 index_fn;
575 u8 reserved2[7];
576 u64 reg_base_opt;
577 u64 reg_base_min;
578 u64 reg_base_max;
579 u32 mba_reg_size;
580 u32 mba_ctrl_range;
581};
582
583/* 6: CARC - Cache Allocation Registers for CPU Agents */
584
585struct acpi_erdt_carc {
586 struct acpi_subtbl_hdr_16 header;
587};
588
589/* 7: CMRD - Cache Monitoring Registers for Device Agents */
590
591struct acpi_erdt_cmrd {
592 struct acpi_subtbl_hdr_16 header;
593 u32 reserved1;
594 u32 flags;
595 u8 index_fn;
596 u8 reserved2[11];
597 u64 reg_base;
598 u32 reg_size;
599 u16 cmt_reg_off;
600 u16 cmt_clump_size;
601 u64 up_scale;
602};
603
604/* 8: IBRD - Cache Monitoring Registers for Device Agents */
605
606struct acpi_erdt_ibrd {
607 struct acpi_subtbl_hdr_16 header;
608 u32 reserved1;
609 u32 flags;
610 u8 index_fn;
611 u8 reserved2[11];
612 u64 reg_base;
613 u32 reg_size;
614 u16 total_bw_offset;
615 u16 Iomiss_bw_offset;
616 u16 total_bw_clump;
617 u16 Iomiss_bw_clump;
618 u8 reserved3[7];
619 u8 counter_width;
620 u64 up_scale;
621 u32 corr_factor_list_len;
622 u32 corr_factor_list[];
623};
624
625/* 9: IBAD - IO bandwidth Allocation Registers for device agents */
626
627struct acpi_erdt_ibad {
628 struct acpi_subtbl_hdr_16 header;
629};
630
631/* 10: CARD - IO bandwidth Allocation Registers for Device Agents */
632
633struct acpi_erdt_card {
634 struct acpi_subtbl_hdr_16 header;
635 u32 reserved1;
636 u32 flags;
637 u32 contention_mask;
638 u8 index_fn;
639 u8 reserved2[7];
640 u64 reg_base;
641 u32 reg_size;
642 u16 cat_reg_offset;
643 u16 cat_reg_block_size;
644};
645
646/*******************************************************************************
647 *
648 * IORT - IO Remapping Table
649 *
650 * Conforms to "IO Remapping Table System Software on ARM Platforms",
651 * Document number: ARM DEN 0049E.f, Apr 2024
652 *
653 ******************************************************************************/
654
655struct acpi_table_iort {
656 struct acpi_table_header header;
657 u32 node_count;
658 u32 node_offset;
659 u32 reserved;
660};
661
662/*
663 * IORT subtables
664 */
665struct acpi_iort_node {
666 u8 type;
667 u16 length;
668 u8 revision;
669 u32 identifier;
670 u32 mapping_count;
671 u32 mapping_offset;
672 char node_data[];
673};
674
675/* Values for subtable Type above */
676
677enum acpi_iort_node_type {
678 ACPI_IORT_NODE_ITS_GROUP = 0x00,
679 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
680 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
681 ACPI_IORT_NODE_SMMU = 0x03,
682 ACPI_IORT_NODE_SMMU_V3 = 0x04,
683 ACPI_IORT_NODE_PMCG = 0x05,
684 ACPI_IORT_NODE_RMR = 0x06,
685 ACPI_IORT_NODE_IWB = 0x07,
686};
687
688struct acpi_iort_id_mapping {
689 u32 input_base; /* Lowest value in input range */
690 u32 id_count; /* Number of IDs */
691 u32 output_base; /* Lowest value in output range */
692 u32 output_reference; /* A reference to the output node */
693 u32 flags;
694};
695
696/* Masks for Flags field above for IORT subtable */
697
698#define ACPI_IORT_ID_SINGLE_MAPPING (1)
699
700struct acpi_iort_memory_access {
701 u32 cache_coherency;
702 u8 hints;
703 u16 reserved;
704 u8 memory_flags;
705};
706
707/* Values for cache_coherency field above */
708
709#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
710#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
711
712/* Masks for Hints field above */
713
714#define ACPI_IORT_HT_TRANSIENT (1)
715#define ACPI_IORT_HT_WRITE (1<<1)
716#define ACPI_IORT_HT_READ (1<<2)
717#define ACPI_IORT_HT_OVERRIDE (1<<3)
718
719/* Masks for memory_flags field above */
720
721#define ACPI_IORT_MF_COHERENCY (1)
722#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
723#define ACPI_IORT_MF_CANWBS (1<<2)
724
725/*
726 * IORT node specific subtables
727 */
728struct acpi_iort_its_group {
729 u32 its_count;
730 u32 identifiers[]; /* GIC ITS identifier array */
731};
732
733struct acpi_iort_named_component {
734 u32 node_flags;
735 u64 memory_properties; /* Memory access properties */
736 u8 memory_address_limit; /* Memory address size limit */
737 char device_name[]; /* Path of namespace object */
738};
739
740/* Masks for Flags field above */
741
742#define ACPI_IORT_NC_STALL_SUPPORTED (1)
743#define ACPI_IORT_NC_PASID_BITS (31<<1)
744
745struct acpi_iort_root_complex {
746 u64 memory_properties; /* Memory access properties */
747 u32 ats_attribute;
748 u32 pci_segment_number;
749 u8 memory_address_limit; /* Memory address size limit */
750 u16 pasid_capabilities; /* PASID Capabilities */
751 u8 reserved[]; /* Reserved, must be zero */
752};
753
754/* Masks for ats_attribute field above */
755
756#define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */
757#define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */
758#define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */
759
760/* Masks for pasid_capabilities field above */
761#define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */
762
763struct acpi_iort_smmu {
764 u64 base_address; /* SMMU base address */
765 u64 span; /* Length of memory range */
766 u32 model;
767 u32 flags;
768 u32 global_interrupt_offset;
769 u32 context_interrupt_count;
770 u32 context_interrupt_offset;
771 u32 pmu_interrupt_count;
772 u32 pmu_interrupt_offset;
773 u64 interrupts[]; /* Interrupt array */
774};
775
776/* Values for Model field above */
777
778#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
779#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
780#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
781#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
782#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
783#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
784
785/* Masks for Flags field above */
786
787#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
788#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
789
790/* Global interrupt format */
791
792struct acpi_iort_smmu_gsi {
793 u32 nsg_irpt;
794 u32 nsg_irpt_flags;
795 u32 nsg_cfg_irpt;
796 u32 nsg_cfg_irpt_flags;
797};
798
799struct acpi_iort_smmu_v3 {
800 u64 base_address; /* SMMUv3 base address */
801 u32 flags;
802 u32 reserved;
803 u64 vatos_address;
804 u32 model;
805 u32 event_gsiv;
806 u32 pri_gsiv;
807 u32 gerr_gsiv;
808 u32 sync_gsiv;
809 u32 pxm;
810 u32 id_mapping_index;
811};
812
813/* Values for Model field above */
814
815#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
816#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
817#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
818
819/* Masks for Flags field above */
820
821#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
822#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
823#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
824#define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4)
825
826struct acpi_iort_pmcg {
827 u64 page0_base_address;
828 u32 overflow_gsiv;
829 u32 node_reference;
830 u64 page1_base_address;
831};
832
833struct acpi_iort_rmr {
834 u32 flags;
835 u32 rmr_count;
836 u32 rmr_offset;
837};
838
839/* Masks for Flags field above */
840#define ACPI_IORT_RMR_REMAP_PERMITTED (1)
841#define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1)
842
843/*
844 * Macro to access the Access Attributes in flags field above:
845 * Access Attributes is encoded in bits 9:2
846 */
847#define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF)
848
849/* Values for above Access Attributes */
850
851#define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00
852#define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01
853#define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02
854#define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03
855#define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04
856#define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05
857
858struct acpi_iort_rmr_desc {
859 u64 base_address;
860 u64 length;
861 u32 reserved;
862};
863
864struct acpi_iort_iwb {
865 u64 base_address;
866 u16 iwb_index; /* Unique IWB identifier matching with the IWB GSI namespace. */
867 char device_name[]; /* Path of the IWB namespace object */
868};
869
870/*******************************************************************************
871 *
872 * IOVT - I/O Virtualization Table
873 *
874 * Conforms to "LoongArch I/O Virtualization Table",
875 * Version 0.1, October 2024
876 *
877 ******************************************************************************/
878
879struct acpi_table_iovt {
880 struct acpi_table_header header; /* Common ACPI table header */
881 u16 iommu_count;
882 u16 iommu_offset;
883 u8 reserved[8];
884};
885
886/* IOVT subtable header */
887
888struct acpi_iovt_header {
889 u16 type;
890 u16 length;
891};
892
893/* Values for Type field above */
894
895enum acpi_iovt_iommu_type {
896 ACPI_IOVT_IOMMU_V1 = 0x00,
897 ACPI_IOVT_IOMMU_RESERVED = 0x01 /* 1 and greater are reserved */
898};
899
900/* IOVT subtables */
901
902struct acpi_iovt_iommu {
903 struct acpi_iovt_header header;
904 u32 flags;
905 u16 segment;
906 u16 phy_width; /* Physical Address Width */
907 u16 virt_width; /* Virtual Address Width */
908 u16 max_page_level;
909 u64 page_size;
910 u32 device_id;
911 u64 base_address;
912 u32 address_space_size;
913 u8 interrupt_type;
914 u8 reserved[3];
915 u32 gsi_number;
916 u32 proximity_domain;
917 u32 max_device_num;
918 u32 device_entry_num;
919 u32 device_entry_offset;
920};
921
922struct acpi_iovt_device_entry {
923 u8 type;
924 u8 length;
925 u8 flags;
926 u8 reserved[3];
927 u16 device_id;
928};
929
930enum acpi_iovt_device_entry_type {
931 ACPI_IOVT_DEVICE_ENTRY_SINGLE = 0x00,
932 ACPI_IOVT_DEVICE_ENTRY_START = 0x01,
933 ACPI_IOVT_DEVICE_ENTRY_END = 0x02,
934 ACPI_IOVT_DEVICE_ENTRY_RESERVED = 0x03 /* 3 and greater are reserved */
935};
936
937/*******************************************************************************
938 *
939 * IVRS - I/O Virtualization Reporting Structure
940 * Version 1
941 *
942 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
943 * Revision 1.26, February 2009.
944 *
945 ******************************************************************************/
946
947struct acpi_table_ivrs {
948 struct acpi_table_header header; /* Common ACPI table header */
949 u32 info; /* Common virtualization info */
950 u64 reserved;
951};
952
953/* Values for Info field above */
954
955#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
956#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
957#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
958
959/* IVRS subtable header */
960
961struct acpi_ivrs_header {
962 u8 type; /* Subtable type */
963 u8 flags;
964 u16 length; /* Subtable length */
965 u16 device_id; /* ID of IOMMU */
966};
967
968/* Values for subtable Type above */
969
970enum acpi_ivrs_type {
971 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
972 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
973 ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
974 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
975 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
976 ACPI_IVRS_TYPE_MEMORY3 = 0x22
977};
978
979/* Masks for Flags field above for IVHD subtable */
980
981#define ACPI_IVHD_TT_ENABLE (1)
982#define ACPI_IVHD_PASS_PW (1<<1)
983#define ACPI_IVHD_RES_PASS_PW (1<<2)
984#define ACPI_IVHD_ISOC (1<<3)
985#define ACPI_IVHD_IOTLB (1<<4)
986
987/* Masks for Flags field above for IVMD subtable */
988
989#define ACPI_IVMD_UNITY (1)
990#define ACPI_IVMD_READ (1<<1)
991#define ACPI_IVMD_WRITE (1<<2)
992#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
993
994/*
995 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
996 */
997
998/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
999
1000struct acpi_ivrs_hardware_10 {
1001 struct acpi_ivrs_header header;
1002 u16 capability_offset; /* Offset for IOMMU control fields */
1003 u64 base_address; /* IOMMU control registers */
1004 u16 pci_segment_group;
1005 u16 info; /* MSI number and unit ID */
1006 u32 feature_reporting;
1007};
1008
1009/* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
1010
1011struct acpi_ivrs_hardware_11 {
1012 struct acpi_ivrs_header header;
1013 u16 capability_offset; /* Offset for IOMMU control fields */
1014 u64 base_address; /* IOMMU control registers */
1015 u16 pci_segment_group;
1016 u16 info; /* MSI number and unit ID */
1017 u32 attributes;
1018 u64 efr_register_image;
1019 u64 reserved;
1020};
1021
1022/* Masks for Info field above */
1023
1024#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
1025#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
1026
1027/*
1028 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
1029 * Upper two bits of the Type field are the (encoded) length of the structure.
1030 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
1031 * are reserved for future use but not defined.
1032 */
1033struct acpi_ivrs_de_header {
1034 u8 type;
1035 u16 id;
1036 u8 data_setting;
1037};
1038
1039/* Length of device entry is in the top two bits of Type field above */
1040
1041#define ACPI_IVHD_ENTRY_LENGTH 0xC0
1042
1043/* Values for device entry Type field above */
1044
1045enum acpi_ivrs_device_entry_type {
1046 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
1047
1048 ACPI_IVRS_TYPE_PAD4 = 0,
1049 ACPI_IVRS_TYPE_ALL = 1,
1050 ACPI_IVRS_TYPE_SELECT = 2,
1051 ACPI_IVRS_TYPE_START = 3,
1052 ACPI_IVRS_TYPE_END = 4,
1053
1054 /* 8-byte device entries */
1055
1056 ACPI_IVRS_TYPE_PAD8 = 64,
1057 ACPI_IVRS_TYPE_NOT_USED = 65,
1058 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
1059 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
1060 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
1061 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
1062 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */
1063
1064 /* Variable-length device entries */
1065
1066 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */
1067};
1068
1069/* Values for Data field above */
1070
1071#define ACPI_IVHD_INIT_PASS (1)
1072#define ACPI_IVHD_EINT_PASS (1<<1)
1073#define ACPI_IVHD_NMI_PASS (1<<2)
1074#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
1075#define ACPI_IVHD_LINT0_PASS (1<<6)
1076#define ACPI_IVHD_LINT1_PASS (1<<7)
1077
1078/* Types 0-4: 4-byte device entry */
1079
1080struct acpi_ivrs_device4 {
1081 struct acpi_ivrs_de_header header;
1082};
1083
1084/* Types 66-67: 8-byte device entry */
1085
1086struct acpi_ivrs_device8a {
1087 struct acpi_ivrs_de_header header;
1088 u8 reserved1;
1089 u16 used_id;
1090 u8 reserved2;
1091};
1092
1093/* Types 70-71: 8-byte device entry */
1094
1095struct acpi_ivrs_device8b {
1096 struct acpi_ivrs_de_header header;
1097 u32 extended_data;
1098};
1099
1100/* Values for extended_data above */
1101
1102#define ACPI_IVHD_ATS_DISABLED (1<<31)
1103
1104/* Type 72: 8-byte device entry */
1105
1106struct acpi_ivrs_device8c {
1107 struct acpi_ivrs_de_header header;
1108 u8 handle;
1109 u16 used_id;
1110 u8 variety;
1111};
1112
1113/* Values for Variety field above */
1114
1115#define ACPI_IVHD_IOAPIC 1
1116#define ACPI_IVHD_HPET 2
1117
1118/* Type 240: variable-length device entry */
1119
1120struct acpi_ivrs_device_hid {
1121 struct acpi_ivrs_de_header header;
1122 u64 acpi_hid;
1123 u64 acpi_cid;
1124 u8 uid_type;
1125 u8 uid_length;
1126};
1127
1128/* Values for uid_type above */
1129
1130#define ACPI_IVRS_UID_NOT_PRESENT 0
1131#define ACPI_IVRS_UID_IS_INTEGER 1
1132#define ACPI_IVRS_UID_IS_STRING 2
1133
1134/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
1135
1136struct acpi_ivrs_memory {
1137 struct acpi_ivrs_header header;
1138 u16 aux_data;
1139 u64 reserved;
1140 u64 start_address;
1141 u64 memory_length;
1142};
1143
1144/*******************************************************************************
1145 *
1146 * KEYP - Key Programming Interface for Root Complex Integrity and Data
1147 * Encryption (IDE)
1148 * Version 1
1149 *
1150 * Conforms to "Key Programming Interface for Root Complex Integrity and Data
1151 * Encryption (IDE)" document. See under ACPI-Related Documents.
1152 *
1153 ******************************************************************************/
1154struct acpi_table_keyp {
1155 struct acpi_table_header header; /* Common ACPI table header */
1156 u32 reserved;
1157};
1158
1159/* KEYP common subtable header */
1160
1161struct acpi_keyp_common_header {
1162 u8 type;
1163 u8 reserved;
1164 u16 length;
1165};
1166
1167/* Values for Type field above */
1168
1169enum acpi_keyp_type {
1170 ACPI_KEYP_TYPE_CONFIG_UNIT = 0,
1171};
1172
1173/* Root Port Information Structure */
1174
1175struct acpi_keyp_rp_info {
1176 u16 segment;
1177 u8 bus;
1178 u8 devfn;
1179};
1180
1181/* Key Configuration Unit Structure */
1182
1183struct acpi_keyp_config_unit {
1184 struct acpi_keyp_common_header header;
1185 u8 protocol_type;
1186 u8 version;
1187 u8 root_port_count;
1188 u8 flags;
1189 u64 register_base_address;
1190 struct acpi_keyp_rp_info rp_info[];
1191};
1192
1193enum acpi_keyp_protocol_type {
1194 ACPI_KEYP_PROTO_TYPE_INVALID = 0,
1195 ACPI_KEYP_PROTO_TYPE_PCIE,
1196 ACPI_KEYP_PROTO_TYPE_CXL,
1197 ACPI_KEYP_PROTO_TYPE_RESERVED
1198};
1199
1200#define ACPI_KEYP_F_TVM_USABLE (1)
1201
1202/*******************************************************************************
1203 *
1204 * LPIT - Low Power Idle Table
1205 *
1206 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
1207 *
1208 ******************************************************************************/
1209
1210struct acpi_table_lpit {
1211 struct acpi_table_header header; /* Common ACPI table header */
1212};
1213
1214/* LPIT subtable header */
1215
1216struct acpi_lpit_header {
1217 u32 type; /* Subtable type */
1218 u32 length; /* Subtable length */
1219 u16 unique_id;
1220 u16 reserved;
1221 u32 flags;
1222};
1223
1224/* Values for subtable Type above */
1225
1226enum acpi_lpit_type {
1227 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
1228 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
1229};
1230
1231/* Masks for Flags field above */
1232
1233#define ACPI_LPIT_STATE_DISABLED (1)
1234#define ACPI_LPIT_NO_COUNTER (1<<1)
1235
1236/*
1237 * LPIT subtables, correspond to Type in struct acpi_lpit_header
1238 */
1239
1240/* 0x00: Native C-state instruction based LPI structure */
1241
1242struct acpi_lpit_native {
1243 struct acpi_lpit_header header;
1244 struct acpi_generic_address entry_trigger;
1245 u32 residency;
1246 u32 latency;
1247 struct acpi_generic_address residency_counter;
1248 u64 counter_frequency;
1249};
1250
1251/*******************************************************************************
1252 *
1253 * MADT - Multiple APIC Description Table
1254 * Version 3
1255 *
1256 ******************************************************************************/
1257
1258struct acpi_table_madt {
1259 struct acpi_table_header header; /* Common ACPI table header */
1260 u32 address; /* Physical address of local APIC */
1261 u32 flags;
1262};
1263
1264/* Masks for Flags field above */
1265
1266#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
1267
1268/* Values for PCATCompat flag */
1269
1270#define ACPI_MADT_DUAL_PIC 1
1271#define ACPI_MADT_MULTIPLE_APIC 0
1272
1273/* Values for MADT subtable type in struct acpi_subtable_header */
1274
1275enum acpi_madt_type {
1276 ACPI_MADT_TYPE_LOCAL_APIC = 0,
1277 ACPI_MADT_TYPE_IO_APIC = 1,
1278 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
1279 ACPI_MADT_TYPE_NMI_SOURCE = 3,
1280 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
1281 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
1282 ACPI_MADT_TYPE_IO_SAPIC = 6,
1283 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
1284 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
1285 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
1286 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
1287 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
1288 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
1289 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
1290 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
1291 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
1292 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
1293 ACPI_MADT_TYPE_CORE_PIC = 17,
1294 ACPI_MADT_TYPE_LIO_PIC = 18,
1295 ACPI_MADT_TYPE_HT_PIC = 19,
1296 ACPI_MADT_TYPE_EIO_PIC = 20,
1297 ACPI_MADT_TYPE_MSI_PIC = 21,
1298 ACPI_MADT_TYPE_BIO_PIC = 22,
1299 ACPI_MADT_TYPE_LPC_PIC = 23,
1300 ACPI_MADT_TYPE_RINTC = 24,
1301 ACPI_MADT_TYPE_IMSIC = 25,
1302 ACPI_MADT_TYPE_APLIC = 26,
1303 ACPI_MADT_TYPE_PLIC = 27,
1304 ACPI_MADT_TYPE_GICV5_IRS = 28,
1305 ACPI_MADT_TYPE_GICV5_ITS = 29,
1306 ACPI_MADT_TYPE_GICV5_ITS_TRANSLATE = 30,
1307 ACPI_MADT_TYPE_RESERVED = 31, /* 31 to 0x7F are reserved */
1308 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */
1309};
1310
1311/*
1312 * MADT Subtables, correspond to Type in struct acpi_subtable_header
1313 */
1314
1315/* 0: Processor Local APIC */
1316
1317struct acpi_madt_local_apic {
1318 struct acpi_subtable_header header;
1319 u8 processor_id; /* ACPI processor id */
1320 u8 id; /* Processor's local APIC id */
1321 u32 lapic_flags;
1322};
1323
1324/* 1: IO APIC */
1325
1326struct acpi_madt_io_apic {
1327 struct acpi_subtable_header header;
1328 u8 id; /* I/O APIC ID */
1329 u8 reserved; /* reserved - must be zero */
1330 u32 address; /* APIC physical address */
1331 u32 global_irq_base; /* Global system interrupt where INTI lines start */
1332};
1333
1334/* 2: Interrupt Override */
1335
1336struct acpi_madt_interrupt_override {
1337 struct acpi_subtable_header header;
1338 u8 bus; /* 0 - ISA */
1339 u8 source_irq; /* Interrupt source (IRQ) */
1340 u32 global_irq; /* Global system interrupt */
1341 u16 inti_flags;
1342};
1343
1344/* 3: NMI Source */
1345
1346struct acpi_madt_nmi_source {
1347 struct acpi_subtable_header header;
1348 u16 inti_flags;
1349 u32 global_irq; /* Global system interrupt */
1350};
1351
1352/* 4: Local APIC NMI */
1353
1354struct acpi_madt_local_apic_nmi {
1355 struct acpi_subtable_header header;
1356 u8 processor_id; /* ACPI processor id */
1357 u16 inti_flags;
1358 u8 lint; /* LINTn to which NMI is connected */
1359};
1360
1361/* 5: Address Override */
1362
1363struct acpi_madt_local_apic_override {
1364 struct acpi_subtable_header header;
1365 u16 reserved; /* Reserved, must be zero */
1366 u64 address; /* APIC physical address */
1367};
1368
1369/* 6: I/O Sapic */
1370
1371struct acpi_madt_io_sapic {
1372 struct acpi_subtable_header header;
1373 u8 id; /* I/O SAPIC ID */
1374 u8 reserved; /* Reserved, must be zero */
1375 u32 global_irq_base; /* Global interrupt for SAPIC start */
1376 u64 address; /* SAPIC physical address */
1377};
1378
1379/* 7: Local Sapic */
1380
1381struct acpi_madt_local_sapic {
1382 struct acpi_subtable_header header;
1383 u8 processor_id; /* ACPI processor id */
1384 u8 id; /* SAPIC ID */
1385 u8 eid; /* SAPIC EID */
1386 u8 reserved[3]; /* Reserved, must be zero */
1387 u32 lapic_flags;
1388 u32 uid; /* Numeric UID - ACPI 3.0 */
1389 char uid_string[]; /* String UID - ACPI 3.0 */
1390};
1391
1392/* 8: Platform Interrupt Source */
1393
1394struct acpi_madt_interrupt_source {
1395 struct acpi_subtable_header header;
1396 u16 inti_flags;
1397 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
1398 u8 id; /* Processor ID */
1399 u8 eid; /* Processor EID */
1400 u8 io_sapic_vector; /* Vector value for PMI interrupts */
1401 u32 global_irq; /* Global system interrupt */
1402 u32 flags; /* Interrupt Source Flags */
1403};
1404
1405/* Masks for Flags field above */
1406
1407#define ACPI_MADT_CPEI_OVERRIDE (1)
1408
1409/* 9: Processor Local X2APIC (ACPI 4.0) */
1410
1411struct acpi_madt_local_x2apic {
1412 struct acpi_subtable_header header;
1413 u16 reserved; /* reserved - must be zero */
1414 u32 local_apic_id; /* Processor x2APIC ID */
1415 u32 lapic_flags;
1416 u32 uid; /* ACPI processor UID */
1417};
1418
1419/* 10: Local X2APIC NMI (ACPI 4.0) */
1420
1421struct acpi_madt_local_x2apic_nmi {
1422 struct acpi_subtable_header header;
1423 u16 inti_flags;
1424 u32 uid; /* ACPI processor UID */
1425 u8 lint; /* LINTn to which NMI is connected */
1426 u8 reserved[3]; /* reserved - must be zero */
1427};
1428
1429/* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 + ACPI 6.7 changes) */
1430
1431struct acpi_madt_generic_interrupt {
1432 struct acpi_subtable_header header;
1433 u16 reserved; /* reserved - must be zero */
1434 u32 cpu_interface_number;
1435 u32 uid;
1436 u32 flags;
1437 u32 parking_version;
1438 u32 performance_interrupt;
1439 u64 parked_address;
1440 u64 base_address;
1441 u64 gicv_base_address;
1442 u64 gich_base_address;
1443 u32 vgic_interrupt;
1444 u64 gicr_base_address;
1445 u64 arm_mpidr;
1446 u8 efficiency_class;
1447 u8 reserved2[1];
1448 u16 spe_interrupt; /* ACPI 6.3 */
1449 u16 trbe_interrupt; /* ACPI 6.5 */
1450 u16 iaffid; /* ACPI 6.7 */
1451 u32 irs_id;
1452};
1453
1454/* Masks for Flags field above */
1455
1456/* ACPI_MADT_ENABLED (1) Processor is usable if set */
1457#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
1458#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
1459#define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */
1460#define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */
1461
1462/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
1463
1464struct acpi_madt_generic_distributor {
1465 struct acpi_subtable_header header;
1466 u16 reserved; /* reserved - must be zero */
1467 u32 gic_id;
1468 u64 base_address;
1469 u32 global_irq_base;
1470 u8 version;
1471 u8 reserved2[3]; /* reserved - must be zero */
1472};
1473
1474/* Values for Version field above and Version field in acpi_madt_gicv5_irs */
1475
1476enum acpi_madt_gic_version {
1477 ACPI_MADT_GIC_VERSION_NONE = 0,
1478 ACPI_MADT_GIC_VERSION_V1 = 1,
1479 ACPI_MADT_GIC_VERSION_V2 = 2,
1480 ACPI_MADT_GIC_VERSION_V3 = 3,
1481 ACPI_MADT_GIC_VERSION_V4 = 4,
1482 ACPI_MADT_GIC_VERSION_V5 = 5,
1483 ACPI_MADT_GIC_VERSION_RESERVED = 6 /* 6 and greater are reserved */
1484};
1485
1486/* 13: Generic MSI Frame (ACPI 5.1) */
1487
1488struct acpi_madt_generic_msi_frame {
1489 struct acpi_subtable_header header;
1490 u16 reserved; /* reserved - must be zero */
1491 u32 msi_frame_id;
1492 u64 base_address;
1493 u32 flags;
1494 u16 spi_count;
1495 u16 spi_base;
1496};
1497
1498/* Masks for Flags field above */
1499
1500#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
1501
1502/* 14: Generic Redistributor (ACPI 5.1) */
1503
1504struct acpi_madt_generic_redistributor {
1505 struct acpi_subtable_header header;
1506 u8 flags;
1507 u8 reserved; /* reserved - must be zero */
1508 u64 base_address;
1509 u32 length;
1510};
1511
1512#define ACPI_MADT_GICR_NON_COHERENT (1)
1513
1514/* 15: Generic Translator (ACPI 6.0) */
1515
1516struct acpi_madt_generic_translator {
1517 struct acpi_subtable_header header;
1518 u8 flags;
1519 u8 reserved; /* reserved - must be zero */
1520 u32 translation_id;
1521 u64 base_address;
1522 u32 reserved2;
1523};
1524
1525#define ACPI_MADT_ITS_NON_COHERENT (1)
1526
1527/* 16: Multiprocessor wakeup (ACPI 6.6) */
1528
1529struct acpi_madt_multiproc_wakeup {
1530 struct acpi_subtable_header header;
1531 u16 version;
1532 u32 reserved; /* reserved - must be zero */
1533 u64 mailbox_address;
1534 u64 reset_vector;
1535};
1536
1537/* Values for Version field above */
1538
1539enum acpi_madt_multiproc_wakeup_version {
1540 ACPI_MADT_MP_WAKEUP_VERSION_NONE = 0,
1541 ACPI_MADT_MP_WAKEUP_VERSION_V1 = 1,
1542 ACPI_MADT_MP_WAKEUP_VERSION_RESERVED = 2, /* 2 and greater are reserved */
1543};
1544
1545#define ACPI_MADT_MP_WAKEUP_SIZE_V0 16
1546#define ACPI_MADT_MP_WAKEUP_SIZE_V1 24
1547
1548#define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032
1549#define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048
1550
1551struct acpi_madt_multiproc_wakeup_mailbox {
1552 u16 command;
1553 u16 reserved; /* reserved - must be zero */
1554 u32 apic_id;
1555 u64 wakeup_vector;
1556 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */
1557 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */
1558};
1559
1560#define ACPI_MP_WAKE_COMMAND_WAKEUP 1
1561#define ACPI_MP_WAKE_COMMAND_TEST 2
1562
1563/* 17: CPU Core Interrupt Controller (ACPI 6.5) */
1564
1565struct acpi_madt_core_pic {
1566 struct acpi_subtable_header header;
1567 u8 version;
1568 u32 processor_id;
1569 u32 core_id;
1570 u32 flags;
1571};
1572
1573/* Values for Version field above */
1574
1575enum acpi_madt_core_pic_version {
1576 ACPI_MADT_CORE_PIC_VERSION_NONE = 0,
1577 ACPI_MADT_CORE_PIC_VERSION_V1 = 1,
1578 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1579};
1580
1581/* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */
1582
1583struct acpi_madt_lio_pic {
1584 struct acpi_subtable_header header;
1585 u8 version;
1586 u64 address;
1587 u16 size;
1588 u8 cascade[2];
1589 u32 cascade_map[2];
1590};
1591
1592/* Values for Version field above */
1593
1594enum acpi_madt_lio_pic_version {
1595 ACPI_MADT_LIO_PIC_VERSION_NONE = 0,
1596 ACPI_MADT_LIO_PIC_VERSION_V1 = 1,
1597 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1598};
1599
1600/* 19: HT Interrupt Controller (ACPI 6.5) */
1601
1602struct acpi_madt_ht_pic {
1603 struct acpi_subtable_header header;
1604 u8 version;
1605 u64 address;
1606 u16 size;
1607 u8 cascade[8];
1608};
1609
1610/* Values for Version field above */
1611
1612enum acpi_madt_ht_pic_version {
1613 ACPI_MADT_HT_PIC_VERSION_NONE = 0,
1614 ACPI_MADT_HT_PIC_VERSION_V1 = 1,
1615 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1616};
1617
1618/* 20: Extend I/O Interrupt Controller (ACPI 6.5) */
1619
1620struct acpi_madt_eio_pic {
1621 struct acpi_subtable_header header;
1622 u8 version;
1623 u8 cascade;
1624 u8 node;
1625 u64 node_map;
1626};
1627
1628/* Values for Version field above */
1629
1630enum acpi_madt_eio_pic_version {
1631 ACPI_MADT_EIO_PIC_VERSION_NONE = 0,
1632 ACPI_MADT_EIO_PIC_VERSION_V1 = 1,
1633 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1634};
1635
1636/* 21: MSI Interrupt Controller (ACPI 6.5) */
1637
1638struct acpi_madt_msi_pic {
1639 struct acpi_subtable_header header;
1640 u8 version;
1641 u64 msg_address;
1642 u32 start;
1643 u32 count;
1644};
1645
1646/* Values for Version field above */
1647
1648enum acpi_madt_msi_pic_version {
1649 ACPI_MADT_MSI_PIC_VERSION_NONE = 0,
1650 ACPI_MADT_MSI_PIC_VERSION_V1 = 1,
1651 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1652};
1653
1654/* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */
1655
1656struct acpi_madt_bio_pic {
1657 struct acpi_subtable_header header;
1658 u8 version;
1659 u64 address;
1660 u16 size;
1661 u16 id;
1662 u16 gsi_base;
1663};
1664
1665/* Values for Version field above */
1666
1667enum acpi_madt_bio_pic_version {
1668 ACPI_MADT_BIO_PIC_VERSION_NONE = 0,
1669 ACPI_MADT_BIO_PIC_VERSION_V1 = 1,
1670 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1671};
1672
1673/* 23: LPC Interrupt Controller (ACPI 6.5) */
1674
1675struct acpi_madt_lpc_pic {
1676 struct acpi_subtable_header header;
1677 u8 version;
1678 u64 address;
1679 u16 size;
1680 u8 cascade;
1681};
1682
1683/* Values for Version field above */
1684
1685enum acpi_madt_lpc_pic_version {
1686 ACPI_MADT_LPC_PIC_VERSION_NONE = 0,
1687 ACPI_MADT_LPC_PIC_VERSION_V1 = 1,
1688 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1689};
1690
1691/* 24: RISC-V INTC */
1692struct acpi_madt_rintc {
1693 struct acpi_subtable_header header;
1694 u8 version;
1695 u8 reserved;
1696 u32 flags;
1697 u64 hart_id;
1698 u32 uid; /* ACPI processor UID */
1699 u32 ext_intc_id; /* External INTC Id */
1700 u64 imsic_addr; /* IMSIC base address */
1701 u32 imsic_size; /* IMSIC size */
1702};
1703
1704/* Values for RISC-V INTC Version field above */
1705
1706enum acpi_madt_rintc_version {
1707 ACPI_MADT_RINTC_VERSION_NONE = 0,
1708 ACPI_MADT_RINTC_VERSION_V1 = 1,
1709 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1710};
1711
1712/* 25: RISC-V IMSIC */
1713struct acpi_madt_imsic {
1714 struct acpi_subtable_header header;
1715 u8 version;
1716 u8 reserved;
1717 u32 flags;
1718 u16 num_ids;
1719 u16 num_guest_ids;
1720 u8 guest_index_bits;
1721 u8 hart_index_bits;
1722 u8 group_index_bits;
1723 u8 group_index_shift;
1724};
1725
1726/* 26: RISC-V APLIC */
1727struct acpi_madt_aplic {
1728 struct acpi_subtable_header header;
1729 u8 version;
1730 u8 id;
1731 u32 flags;
1732 u8 hw_id[8];
1733 u16 num_idcs;
1734 u16 num_sources;
1735 u32 gsi_base;
1736 u64 base_addr;
1737 u32 size;
1738};
1739
1740/* 27: RISC-V PLIC */
1741struct acpi_madt_plic {
1742 struct acpi_subtable_header header;
1743 u8 version;
1744 u8 id;
1745 u8 hw_id[8];
1746 u16 num_irqs;
1747 u16 max_prio;
1748 u32 flags;
1749 u32 size;
1750 u64 base_addr;
1751 u32 gsi_base;
1752};
1753
1754/* 28: Arm GICv5 IRS (ACPI 6.7) */
1755struct acpi_madt_gicv5_irs {
1756 struct acpi_subtable_header header;
1757 u8 version;
1758 u8 reserved;
1759 u32 irs_id;
1760 u32 flags;
1761 u32 reserved2;
1762 u64 config_base_address;
1763 u64 setlpi_base_address;
1764};
1765
1766#define ACPI_MADT_IRS_NON_COHERENT (1)
1767
1768/* 29: Arm GICv5 ITS Config Frame (ACPI 6.7) */
1769struct acpi_madt_gicv5_translator {
1770 struct acpi_subtable_header header;
1771 u8 flags;
1772 u8 reserved; /* reserved - must be zero */
1773 u32 translator_id;
1774 u64 base_address;
1775};
1776
1777#define ACPI_MADT_GICV5_ITS_NON_COHERENT (1)
1778
1779/* 30: Arm GICv5 ITS Translate Frame (ACPI 6.7) */
1780struct acpi_madt_gicv5_translate_frame {
1781 struct acpi_subtable_header header;
1782 u16 reserved; /* reserved - must be zero */
1783 u32 linked_translator_id;
1784 u32 translate_frame_id;
1785 u32 reserved2;
1786 u64 base_address;
1787};
1788
1789/* 80: OEM data */
1790
1791struct acpi_madt_oem_data {
1792 ACPI_FLEX_ARRAY(u8, oem_data);
1793};
1794
1795/*
1796 * Common flags fields for MADT subtables
1797 */
1798
1799/* MADT Local APIC flags */
1800
1801#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
1802#define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */
1803
1804/* MADT MPS INTI flags (inti_flags) */
1805
1806#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
1807#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
1808
1809/* Values for MPS INTI flags */
1810
1811#define ACPI_MADT_POLARITY_CONFORMS 0
1812#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
1813#define ACPI_MADT_POLARITY_RESERVED 2
1814#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
1815
1816#define ACPI_MADT_TRIGGER_CONFORMS (0)
1817#define ACPI_MADT_TRIGGER_EDGE (1<<2)
1818#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
1819#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
1820
1821/*******************************************************************************
1822 *
1823 * MCFG - PCI Memory Mapped Configuration table and subtable
1824 * Version 1
1825 *
1826 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
1827 *
1828 ******************************************************************************/
1829
1830struct acpi_table_mcfg {
1831 struct acpi_table_header header; /* Common ACPI table header */
1832 u8 reserved[8];
1833};
1834
1835/* Subtable */
1836
1837struct acpi_mcfg_allocation {
1838 u64 address; /* Base address, processor-relative */
1839 u16 pci_segment; /* PCI segment group number */
1840 u8 start_bus_number; /* Starting PCI Bus number */
1841 u8 end_bus_number; /* Final PCI Bus number */
1842 u32 reserved;
1843};
1844
1845/*******************************************************************************
1846 *
1847 * MCHI - Management Controller Host Interface Table
1848 * Version 1
1849 *
1850 * Conforms to "Management Component Transport Protocol (MCTP) Host
1851 * Interface Specification", Revision 1.0.0a, October 13, 2009
1852 *
1853 ******************************************************************************/
1854
1855struct acpi_table_mchi {
1856 struct acpi_table_header header; /* Common ACPI table header */
1857 u8 interface_type;
1858 u8 protocol;
1859 u64 protocol_data;
1860 u8 interrupt_type;
1861 u8 gpe;
1862 u8 pci_device_flag;
1863 u32 global_interrupt;
1864 struct acpi_generic_address control_register;
1865 u8 pci_segment;
1866 u8 pci_bus;
1867 u8 pci_device;
1868 u8 pci_function;
1869};
1870
1871/*******************************************************************************
1872 *
1873 * MPAM - Memory System Resource Partitioning and Monitoring
1874 *
1875 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0"
1876 * Document number: ARM DEN 0065, December, 2022.
1877 *
1878 ******************************************************************************/
1879
1880/* MPAM RIS locator types. Table 11, Location types */
1881enum acpi_mpam_locator_type {
1882 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0,
1883 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1,
1884 ACPI_MPAM_LOCATION_TYPE_SMMU = 2,
1885 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3,
1886 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4,
1887 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5,
1888 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF
1889};
1890
1891/* MPAM Functional dependency descriptor. Table 10 */
1892struct acpi_mpam_func_deps {
1893 u32 producer;
1894 u32 reserved;
1895};
1896
1897/* MPAM Processor cache locator descriptor. Table 13 */
1898struct acpi_mpam_resource_cache_locator {
1899 u64 cache_reference;
1900 u32 reserved;
1901};
1902
1903/* MPAM Memory locator descriptor. Table 14 */
1904struct acpi_mpam_resource_memory_locator {
1905 u64 proximity_domain;
1906 u32 reserved;
1907};
1908
1909/* MPAM SMMU locator descriptor. Table 15 */
1910struct acpi_mpam_resource_smmu_locator {
1911 u64 smmu_interface;
1912 u32 reserved;
1913};
1914
1915/* MPAM Memory-side cache locator descriptor. Table 16 */
1916struct acpi_mpam_resource_memcache_locator {
1917 u8 reserved[7];
1918 u8 level;
1919 u32 reference;
1920};
1921
1922/* MPAM ACPI device locator descriptor. Table 17 */
1923struct acpi_mpam_resource_acpi_locator {
1924 u64 acpi_hw_id;
1925 u32 acpi_unique_id;
1926};
1927
1928/* MPAM Interconnect locator descriptor. Table 18 */
1929struct acpi_mpam_resource_interconnect_locator {
1930 u64 inter_connect_desc_tbl_off;
1931 u32 reserved;
1932};
1933
1934/* MPAM Locator structure. Table 12 */
1935struct acpi_mpam_resource_generic_locator {
1936 u64 descriptor1;
1937 u32 descriptor2;
1938};
1939
1940union acpi_mpam_resource_locator {
1941 struct acpi_mpam_resource_cache_locator cache_locator;
1942 struct acpi_mpam_resource_memory_locator memory_locator;
1943 struct acpi_mpam_resource_smmu_locator smmu_locator;
1944 struct acpi_mpam_resource_memcache_locator mem_cache_locator;
1945 struct acpi_mpam_resource_acpi_locator acpi_locator;
1946 struct acpi_mpam_resource_interconnect_locator interconnect_ifc_locator;
1947 struct acpi_mpam_resource_generic_locator generic_locator;
1948};
1949
1950/* Memory System Component Resource Node Structure Table 9 */
1951struct acpi_mpam_resource_node {
1952 u32 identifier;
1953 u8 ris_index;
1954 u16 reserved1;
1955 u8 locator_type;
1956 union acpi_mpam_resource_locator locator;
1957 u32 num_functional_deps;
1958};
1959
1960/* Memory System Component (MSC) Node Structure. Table 4 */
1961struct acpi_mpam_msc_node {
1962 u16 length;
1963 u8 interface_type;
1964 u8 reserved;
1965 u32 identifier;
1966 u64 base_address;
1967 u32 mmio_size;
1968 u32 overflow_interrupt;
1969 u32 overflow_interrupt_flags;
1970 u32 reserved1;
1971 u32 overflow_interrupt_affinity;
1972 u32 error_interrupt;
1973 u32 error_interrupt_flags;
1974 u32 reserved2;
1975 u32 error_interrupt_affinity;
1976 u32 max_nrdy_usec;
1977 u64 hardware_id_linked_device;
1978 u32 instance_id_linked_device;
1979 u32 num_resource_nodes;
1980};
1981
1982struct acpi_table_mpam {
1983 struct acpi_table_header header; /* Common ACPI table header */
1984};
1985
1986/*******************************************************************************
1987 *
1988 * MPST - Memory Power State Table (ACPI 5.0)
1989 * Version 1
1990 *
1991 ******************************************************************************/
1992
1993#define ACPI_MPST_CHANNEL_INFO \
1994 u8 channel_id; \
1995 u8 reserved1[3]; \
1996 u16 power_node_count; \
1997 u16 reserved2;
1998
1999/* Main table */
2000
2001struct acpi_table_mpst {
2002 struct acpi_table_header header; /* Common ACPI table header */
2003 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
2004};
2005
2006/* Memory Platform Communication Channel Info */
2007
2008struct acpi_mpst_channel {
2009 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
2010};
2011
2012/* Memory Power Node Structure */
2013
2014struct acpi_mpst_power_node {
2015 u8 flags;
2016 u8 reserved1;
2017 u16 node_id;
2018 u32 length;
2019 u64 range_address;
2020 u64 range_length;
2021 u32 num_power_states;
2022 u32 num_physical_components;
2023};
2024
2025/* Values for Flags field above */
2026
2027#define ACPI_MPST_ENABLED 1
2028#define ACPI_MPST_POWER_MANAGED 2
2029#define ACPI_MPST_HOT_PLUG_CAPABLE 4
2030
2031/* Memory Power State Structure (follows POWER_NODE above) */
2032
2033struct acpi_mpst_power_state {
2034 u8 power_state;
2035 u8 info_index;
2036};
2037
2038/* Physical Component ID Structure (follows POWER_STATE above) */
2039
2040struct acpi_mpst_component {
2041 u16 component_id;
2042};
2043
2044/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
2045
2046struct acpi_mpst_data_hdr {
2047 u16 characteristics_count;
2048 u16 reserved;
2049};
2050
2051struct acpi_mpst_power_data {
2052 u8 structure_id;
2053 u8 flags;
2054 u16 reserved1;
2055 u32 average_power;
2056 u32 power_saving;
2057 u64 exit_latency;
2058 u64 reserved2;
2059};
2060
2061/* Values for Flags field above */
2062
2063#define ACPI_MPST_PRESERVE 1
2064#define ACPI_MPST_AUTOENTRY 2
2065#define ACPI_MPST_AUTOEXIT 4
2066
2067/* Shared Memory Region (not part of an ACPI table) */
2068
2069struct acpi_mpst_shared {
2070 u32 signature;
2071 u16 pcc_command;
2072 u16 pcc_status;
2073 u32 command_register;
2074 u32 status_register;
2075 u32 power_state_id;
2076 u32 power_node_id;
2077 u64 energy_consumed;
2078 u64 average_power;
2079};
2080
2081/*******************************************************************************
2082 *
2083 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
2084 * Version 1
2085 *
2086 ******************************************************************************/
2087
2088struct acpi_table_msct {
2089 struct acpi_table_header header; /* Common ACPI table header */
2090 u32 proximity_offset; /* Location of proximity info struct(s) */
2091 u32 max_proximity_domains; /* Max number of proximity domains */
2092 u32 max_clock_domains; /* Max number of clock domains */
2093 u64 max_address; /* Max physical address in system */
2094};
2095
2096/* subtable - Maximum Proximity Domain Information. Version 1 */
2097
2098struct acpi_msct_proximity {
2099 u8 revision;
2100 u8 length;
2101 u32 range_start; /* Start of domain range */
2102 u32 range_end; /* End of domain range */
2103 u32 processor_capacity;
2104 u64 memory_capacity; /* In bytes */
2105};
2106
2107/*******************************************************************************
2108 *
2109 * MRRM - Memory Range and Region Mapping (MRRM) table
2110 * Conforms to "Intel Resource Director Technology Architecture Specification"
2111 * Version 1.1, January 2025
2112 *
2113 ******************************************************************************/
2114
2115struct acpi_table_mrrm {
2116 struct acpi_table_header header; /* Common ACPI table header */
2117 u8 max_mem_region; /* Max Memory Regions supported */
2118 u8 flags; /* Region assignment type */
2119 u8 reserved[26];
2120 u8 memory_range_entry[];
2121};
2122
2123/* Flags */
2124#define ACPI_MRRM_FLAGS_REGION_ASSIGNMENT_OS (1<<0)
2125
2126/*******************************************************************************
2127 *
2128 * Memory Range entry - Memory Range entry in MRRM table
2129 *
2130 ******************************************************************************/
2131
2132struct acpi_mrrm_mem_range_entry {
2133 struct acpi_subtbl_hdr_16 header;
2134 u32 reserved0; /* Reserved */
2135 u64 addr_base; /* Base addr of the mem range */
2136 u64 addr_len; /* Length of the mem range */
2137 u16 region_id_flags; /* Valid local or remote Region-ID */
2138 u8 local_region_id; /* Platform-assigned static local Region-ID */
2139 u8 remote_region_id; /* Platform-assigned static remote Region-ID */
2140 u32 reserved1; /* Reserved */
2141 /* Region-ID Programming Registers[] */
2142};
2143
2144/* Values for region_id_flags above */
2145#define ACPI_MRRM_VALID_REGION_ID_FLAGS_LOCAL (1<<0)
2146#define ACPI_MRRM_VALID_REGION_ID_FLAGS_REMOTE (1<<1)
2147
2148/*******************************************************************************
2149 *
2150 * MSDM - Microsoft Data Management table
2151 *
2152 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
2153 * November 29, 2011. Copyright 2011 Microsoft
2154 *
2155 ******************************************************************************/
2156
2157/* Basic MSDM table is only the common ACPI header */
2158
2159struct acpi_table_msdm {
2160 struct acpi_table_header header; /* Common ACPI table header */
2161};
2162
2163/*******************************************************************************
2164 *
2165 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
2166 * Version 1
2167 *
2168 ******************************************************************************/
2169
2170struct acpi_table_nfit {
2171 struct acpi_table_header header; /* Common ACPI table header */
2172 u32 reserved; /* Reserved, must be zero */
2173};
2174
2175/* Subtable header for NFIT */
2176
2177struct acpi_nfit_header {
2178 u16 type;
2179 u16 length;
2180};
2181
2182/* Values for subtable type in struct acpi_nfit_header */
2183
2184enum acpi_nfit_type {
2185 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
2186 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
2187 ACPI_NFIT_TYPE_INTERLEAVE = 2,
2188 ACPI_NFIT_TYPE_SMBIOS = 3,
2189 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
2190 ACPI_NFIT_TYPE_DATA_REGION = 5,
2191 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
2192 ACPI_NFIT_TYPE_CAPABILITIES = 7,
2193 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
2194};
2195
2196/*
2197 * NFIT Subtables
2198 */
2199
2200/* 0: System Physical Address Range Structure */
2201
2202struct acpi_nfit_system_address {
2203 struct acpi_nfit_header header;
2204 u16 range_index;
2205 u16 flags;
2206 u32 reserved; /* Reserved, must be zero */
2207 u32 proximity_domain;
2208 u8 range_guid[16];
2209 u64 address;
2210 u64 length;
2211 u64 memory_mapping;
2212 u64 location_cookie; /* ACPI 6.4 */
2213};
2214
2215/* Flags */
2216
2217#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
2218#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
2219#define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */
2220
2221/* Range Type GUIDs appear in the include/acuuid.h file */
2222
2223/* 1: Memory Device to System Address Range Map Structure */
2224
2225struct acpi_nfit_memory_map {
2226 struct acpi_nfit_header header;
2227 u32 device_handle;
2228 u16 physical_id;
2229 u16 region_id;
2230 u16 range_index;
2231 u16 region_index;
2232 u64 region_size;
2233 u64 region_offset;
2234 u64 address;
2235 u16 interleave_index;
2236 u16 interleave_ways;
2237 u16 flags;
2238 u16 reserved; /* Reserved, must be zero */
2239};
2240
2241/* Flags */
2242
2243#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
2244#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
2245#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
2246#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
2247#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
2248#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
2249#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
2250
2251/* 2: Interleave Structure */
2252
2253struct acpi_nfit_interleave {
2254 struct acpi_nfit_header header;
2255 u16 interleave_index;
2256 u16 reserved; /* Reserved, must be zero */
2257 u32 line_count;
2258 u32 line_size;
2259 u32 line_offset[]; /* Variable length */
2260};
2261
2262/* 3: SMBIOS Management Information Structure */
2263
2264struct acpi_nfit_smbios {
2265 struct acpi_nfit_header header;
2266 u32 reserved; /* Reserved, must be zero */
2267 u8 data[]; /* Variable length */
2268};
2269
2270/* 4: NVDIMM Control Region Structure */
2271
2272struct acpi_nfit_control_region {
2273 struct acpi_nfit_header header;
2274 u16 region_index;
2275 u16 vendor_id;
2276 u16 device_id;
2277 u16 revision_id;
2278 u16 subsystem_vendor_id;
2279 u16 subsystem_device_id;
2280 u16 subsystem_revision_id;
2281 u8 valid_fields;
2282 u8 manufacturing_location;
2283 u16 manufacturing_date;
2284 u8 reserved[2]; /* Reserved, must be zero */
2285 u32 serial_number;
2286 u16 code;
2287 u16 windows;
2288 u64 window_size;
2289 u64 command_offset;
2290 u64 command_size;
2291 u64 status_offset;
2292 u64 status_size;
2293 u16 flags;
2294 u8 reserved1[6]; /* Reserved, must be zero */
2295};
2296
2297/* Flags */
2298
2299#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
2300
2301/* valid_fields bits */
2302
2303#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
2304
2305/* 5: NVDIMM Block Data Window Region Structure */
2306
2307struct acpi_nfit_data_region {
2308 struct acpi_nfit_header header;
2309 u16 region_index;
2310 u16 windows;
2311 u64 offset;
2312 u64 size;
2313 u64 capacity;
2314 u64 start_address;
2315};
2316
2317/* 6: Flush Hint Address Structure */
2318
2319struct acpi_nfit_flush_address {
2320 struct acpi_nfit_header header;
2321 u32 device_handle;
2322 u16 hint_count;
2323 u8 reserved[6]; /* Reserved, must be zero */
2324 u64 hint_address[]; /* Variable length */
2325};
2326
2327/* 7: Platform Capabilities Structure */
2328
2329struct acpi_nfit_capabilities {
2330 struct acpi_nfit_header header;
2331 u8 highest_capability;
2332 u8 reserved[3]; /* Reserved, must be zero */
2333 u32 capabilities;
2334 u32 reserved2;
2335};
2336
2337/* Capabilities Flags */
2338
2339#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
2340#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
2341#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
2342
2343/*
2344 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
2345 */
2346struct nfit_device_handle {
2347 u32 handle;
2348};
2349
2350/* Device handle construction and extraction macros */
2351
2352#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
2353#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
2354#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
2355#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
2356#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
2357
2358#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
2359#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
2360#define ACPI_NFIT_MEMORY_ID_OFFSET 8
2361#define ACPI_NFIT_SOCKET_ID_OFFSET 12
2362#define ACPI_NFIT_NODE_ID_OFFSET 16
2363
2364/* Macro to construct a NFIT/NVDIMM device handle */
2365
2366#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
2367 ((dimm) | \
2368 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
2369 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
2370 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
2371 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
2372
2373/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
2374
2375#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
2376 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
2377
2378#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
2379 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
2380
2381#define ACPI_NFIT_GET_MEMORY_ID(handle) \
2382 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
2383
2384#define ACPI_NFIT_GET_SOCKET_ID(handle) \
2385 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
2386
2387#define ACPI_NFIT_GET_NODE_ID(handle) \
2388 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
2389
2390/*******************************************************************************
2391 *
2392 * NHLT - Non HDAudio Link Table
2393 * Version 1
2394 *
2395 ******************************************************************************/
2396
2397struct acpi_table_nhlt {
2398 struct acpi_table_header header; /* Common ACPI table header */
2399 u8 endpoints_count;
2400 /*
2401 * struct acpi_nhlt_endpoint endpoints[];
2402 * struct acpi_nhlt_config oed_config;
2403 */
2404};
2405
2406struct acpi_nhlt_endpoint {
2407 u32 length;
2408 u8 link_type;
2409 u8 instance_id;
2410 u16 vendor_id;
2411 u16 device_id;
2412 u16 revision_id;
2413 u32 subsystem_id;
2414 u8 device_type;
2415 u8 direction;
2416 u8 virtual_bus_id;
2417 /*
2418 * struct acpi_nhlt_config device_config;
2419 * struct acpi_nhlt_formats_config formats_config;
2420 * struct acpi_nhlt_devices_info devices_info;
2421 */
2422};
2423
2424/*
2425 * Values for link_type field above
2426 *
2427 * Only types PDM and SSP are used
2428 */
2429#define ACPI_NHLT_LINKTYPE_HDA 0
2430#define ACPI_NHLT_LINKTYPE_DSP 1
2431#define ACPI_NHLT_LINKTYPE_PDM 2
2432#define ACPI_NHLT_LINKTYPE_SSP 3
2433#define ACPI_NHLT_LINKTYPE_SLIMBUS 4
2434#define ACPI_NHLT_LINKTYPE_SDW 5
2435#define ACPI_NHLT_LINKTYPE_UAOL 6
2436
2437/* Values for device_id field above */
2438
2439#define ACPI_NHLT_DEVICEID_DMIC 0xAE20
2440#define ACPI_NHLT_DEVICEID_BT 0xAE30
2441#define ACPI_NHLT_DEVICEID_I2S 0xAE34
2442
2443/* Values for device_type field above */
2444
2445/*
2446 * Device types unique to endpoint of link_type=PDM
2447 *
2448 * Type PDM used for all SKL+ platforms
2449 */
2450#define ACPI_NHLT_DEVICETYPE_PDM 0
2451#define ACPI_NHLT_DEVICETYPE_PDM_SKL 1
2452/* Device types unique to endpoint of link_type=SSP */
2453#define ACPI_NHLT_DEVICETYPE_BT 0
2454#define ACPI_NHLT_DEVICETYPE_FM 1
2455#define ACPI_NHLT_DEVICETYPE_MODEM 2
2456#define ACPI_NHLT_DEVICETYPE_CODEC 4
2457
2458/* Values for Direction field above */
2459
2460#define ACPI_NHLT_DIR_RENDER 0
2461#define ACPI_NHLT_DIR_CAPTURE 1
2462
2463struct acpi_nhlt_config {
2464 u32 capabilities_size;
2465 u8 capabilities[];
2466};
2467
2468struct acpi_nhlt_gendevice_config {
2469 u8 virtual_slot;
2470 u8 config_type;
2471};
2472
2473/* Values for config_type field above */
2474
2475#define ACPI_NHLT_CONFIGTYPE_GENERIC 0
2476#define ACPI_NHLT_CONFIGTYPE_MICARRAY 1
2477
2478struct acpi_nhlt_micdevice_config {
2479 u8 virtual_slot;
2480 u8 config_type;
2481 u8 array_type;
2482};
2483
2484/* Values for array_type field above */
2485
2486#define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA
2487#define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB
2488#define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC
2489#define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD
2490#define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE
2491#define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF
2492
2493struct acpi_nhlt_vendor_mic_config {
2494 u8 type;
2495 u8 panel;
2496 u16 speaker_position_distance; /* mm */
2497 u16 horizontal_offset; /* mm */
2498 u16 vertical_offset; /* mm */
2499 u8 frequency_low_band; /* 5*Hz */
2500 u8 frequency_high_band; /* 500*Hz */
2501 u16 direction_angle; /* -180 - +180 */
2502 u16 elevation_angle; /* -180 - +180 */
2503 u16 work_vertical_angle_begin; /* -180 - +180 with 2 deg step */
2504 u16 work_vertical_angle_end; /* -180 - +180 with 2 deg step */
2505 u16 work_horizontal_angle_begin; /* -180 - +180 with 2 deg step */
2506 u16 work_horizontal_angle_end; /* -180 - +180 with 2 deg step */
2507};
2508
2509/* Values for Type field above */
2510
2511#define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0
2512#define ACPI_NHLT_MICTYPE_SUBCARDIOID 1
2513#define ACPI_NHLT_MICTYPE_CARDIOID 2
2514#define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3
2515#define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4
2516#define ACPI_NHLT_MICTYPE_8SHAPED 5
2517#define ACPI_NHLT_MICTYPE_RESERVED 6
2518#define ACPI_NHLT_MICTYPE_VENDORDEFINED 7
2519
2520/* Values for Panel field above */
2521
2522#define ACPI_NHLT_MICLOCATION_TOP 0
2523#define ACPI_NHLT_MICLOCATION_BOTTOM 1
2524#define ACPI_NHLT_MICLOCATION_LEFT 2
2525#define ACPI_NHLT_MICLOCATION_RIGHT 3
2526#define ACPI_NHLT_MICLOCATION_FRONT 4
2527#define ACPI_NHLT_MICLOCATION_REAR 5
2528
2529struct acpi_nhlt_vendor_micdevice_config {
2530 u8 virtual_slot;
2531 u8 config_type;
2532 u8 array_type;
2533 u8 mics_count;
2534 struct acpi_nhlt_vendor_mic_config mics[];
2535};
2536
2537union acpi_nhlt_device_config {
2538 u8 virtual_slot;
2539 struct acpi_nhlt_gendevice_config gen;
2540 struct acpi_nhlt_micdevice_config mic;
2541 struct acpi_nhlt_vendor_micdevice_config vendor_mic;
2542};
2543
2544/* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */
2545struct acpi_nhlt_wave_formatext {
2546 u16 format_tag;
2547 u16 channel_count;
2548 u32 samples_per_sec;
2549 u32 avg_bytes_per_sec;
2550 u16 block_align;
2551 u16 bits_per_sample;
2552 u16 extra_format_size;
2553 u16 valid_bits_per_sample;
2554 u32 channel_mask;
2555 u8 subformat[16];
2556};
2557
2558struct acpi_nhlt_format_config {
2559 struct acpi_nhlt_wave_formatext format;
2560 struct acpi_nhlt_config config;
2561};
2562
2563struct acpi_nhlt_formats_config {
2564 u8 formats_count;
2565 struct acpi_nhlt_format_config formats[];
2566};
2567
2568struct acpi_nhlt_device_info {
2569 u8 id[16];
2570 u8 instance_id;
2571 u8 port_id;
2572};
2573
2574struct acpi_nhlt_devices_info {
2575 u8 devices_count;
2576 struct acpi_nhlt_device_info devices[];
2577};
2578
2579/*******************************************************************************
2580 *
2581 * PCCT - Platform Communications Channel Table (ACPI 5.0)
2582 * Version 2 (ACPI 6.2)
2583 *
2584 ******************************************************************************/
2585
2586struct acpi_table_pcct {
2587 struct acpi_table_header header; /* Common ACPI table header */
2588 u32 flags;
2589 u64 reserved;
2590};
2591
2592/* Values for Flags field above */
2593
2594#define ACPI_PCCT_DOORBELL 1
2595
2596/* Values for subtable type in struct acpi_subtable_header */
2597
2598enum acpi_pcct_type {
2599 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
2600 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
2601 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
2602 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
2603 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
2604 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */
2605 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
2606};
2607
2608/*
2609 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
2610 */
2611
2612/* 0: Generic Communications Subspace */
2613
2614struct acpi_pcct_subspace {
2615 struct acpi_subtable_header header;
2616 u8 reserved[6];
2617 u64 base_address;
2618 u64 length;
2619 struct acpi_generic_address doorbell_register;
2620 u64 preserve_mask;
2621 u64 write_mask;
2622 u32 latency;
2623 u32 max_access_rate;
2624 u16 min_turnaround_time;
2625};
2626
2627/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
2628
2629struct acpi_pcct_hw_reduced {
2630 struct acpi_subtable_header header;
2631 u32 platform_interrupt;
2632 u8 flags;
2633 u8 reserved;
2634 u64 base_address;
2635 u64 length;
2636 struct acpi_generic_address doorbell_register;
2637 u64 preserve_mask;
2638 u64 write_mask;
2639 u32 latency;
2640 u32 max_access_rate;
2641 u16 min_turnaround_time;
2642};
2643
2644/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
2645
2646struct acpi_pcct_hw_reduced_type2 {
2647 struct acpi_subtable_header header;
2648 u32 platform_interrupt;
2649 u8 flags;
2650 u8 reserved;
2651 u64 base_address;
2652 u64 length;
2653 struct acpi_generic_address doorbell_register;
2654 u64 preserve_mask;
2655 u64 write_mask;
2656 u32 latency;
2657 u32 max_access_rate;
2658 u16 min_turnaround_time;
2659 struct acpi_generic_address platform_ack_register;
2660 u64 ack_preserve_mask;
2661 u64 ack_write_mask;
2662};
2663
2664/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
2665
2666struct acpi_pcct_ext_pcc_master {
2667 struct acpi_subtable_header header;
2668 u32 platform_interrupt;
2669 u8 flags;
2670 u8 reserved1;
2671 u64 base_address;
2672 u32 length;
2673 struct acpi_generic_address doorbell_register;
2674 u64 preserve_mask;
2675 u64 write_mask;
2676 u32 latency;
2677 u32 max_access_rate;
2678 u32 min_turnaround_time;
2679 struct acpi_generic_address platform_ack_register;
2680 u64 ack_preserve_mask;
2681 u64 ack_set_mask;
2682 u64 reserved2;
2683 struct acpi_generic_address cmd_complete_register;
2684 u64 cmd_complete_mask;
2685 struct acpi_generic_address cmd_update_register;
2686 u64 cmd_update_preserve_mask;
2687 u64 cmd_update_set_mask;
2688 struct acpi_generic_address error_status_register;
2689 u64 error_status_mask;
2690};
2691
2692/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
2693
2694struct acpi_pcct_ext_pcc_slave {
2695 struct acpi_subtable_header header;
2696 u32 platform_interrupt;
2697 u8 flags;
2698 u8 reserved1;
2699 u64 base_address;
2700 u32 length;
2701 struct acpi_generic_address doorbell_register;
2702 u64 preserve_mask;
2703 u64 write_mask;
2704 u32 latency;
2705 u32 max_access_rate;
2706 u32 min_turnaround_time;
2707 struct acpi_generic_address platform_ack_register;
2708 u64 ack_preserve_mask;
2709 u64 ack_set_mask;
2710 u64 reserved2;
2711 struct acpi_generic_address cmd_complete_register;
2712 u64 cmd_complete_mask;
2713 struct acpi_generic_address cmd_update_register;
2714 u64 cmd_update_preserve_mask;
2715 u64 cmd_update_set_mask;
2716 struct acpi_generic_address error_status_register;
2717 u64 error_status_mask;
2718};
2719
2720/* 5: HW Registers based Communications Subspace */
2721
2722struct acpi_pcct_hw_reg {
2723 struct acpi_subtable_header header;
2724 u16 version;
2725 u64 base_address;
2726 u64 length;
2727 struct acpi_generic_address doorbell_register;
2728 u64 doorbell_preserve;
2729 u64 doorbell_write;
2730 struct acpi_generic_address cmd_complete_register;
2731 u64 cmd_complete_mask;
2732 struct acpi_generic_address error_status_register;
2733 u64 error_status_mask;
2734 u32 nominal_latency;
2735 u32 min_turnaround_time;
2736};
2737
2738/* Values for doorbell flags above */
2739
2740#define ACPI_PCCT_INTERRUPT_POLARITY (1)
2741#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
2742
2743/*
2744 * PCC memory structures (not part of the ACPI table)
2745 */
2746
2747/* Shared Memory Region */
2748
2749struct acpi_pcct_shared_memory {
2750 u32 signature;
2751 u16 command;
2752 u16 status;
2753};
2754
2755/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
2756
2757struct acpi_pcct_ext_pcc_shared_memory {
2758 u32 signature;
2759 u32 flags;
2760 u32 length;
2761 u32 command;
2762};
2763
2764/*******************************************************************************
2765 *
2766 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
2767 * Version 0
2768 *
2769 ******************************************************************************/
2770
2771struct acpi_table_pdtt {
2772 struct acpi_table_header header; /* Common ACPI table header */
2773 u8 trigger_count;
2774 u8 reserved[3];
2775 u32 array_offset;
2776};
2777
2778/*
2779 * PDTT Communication Channel Identifier Structure.
2780 * The number of these structures is defined by trigger_count above,
2781 * starting at array_offset.
2782 */
2783struct acpi_pdtt_channel {
2784 u8 subchannel_id;
2785 u8 flags;
2786};
2787
2788/* Flags for above */
2789
2790#define ACPI_PDTT_RUNTIME_TRIGGER (1)
2791#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
2792#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
2793
2794/*******************************************************************************
2795 *
2796 * PHAT - Platform Health Assessment Table (ACPI 6.4)
2797 * Version 1
2798 *
2799 ******************************************************************************/
2800
2801struct acpi_table_phat {
2802 struct acpi_table_header header; /* Common ACPI table header */
2803};
2804
2805/* Common header for PHAT subtables that follow main table */
2806
2807struct acpi_phat_header {
2808 u16 type;
2809 u16 length;
2810 u8 revision;
2811};
2812
2813/* Values for Type field above */
2814
2815#define ACPI_PHAT_TYPE_FW_VERSION_DATA 0
2816#define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1
2817#define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */
2818
2819/*
2820 * PHAT subtables, correspond to Type in struct acpi_phat_header
2821 */
2822
2823/* 0: Firmware Version Data Record */
2824
2825struct acpi_phat_version_data {
2826 struct acpi_phat_header header;
2827 u8 reserved[3];
2828 u32 element_count;
2829};
2830
2831struct acpi_phat_version_element {
2832 u8 guid[16];
2833 u64 version_value;
2834 u32 producer_id;
2835};
2836
2837/* 1: Firmware Health Data Record */
2838
2839struct acpi_phat_health_data {
2840 struct acpi_phat_header header;
2841 u8 reserved[2];
2842 u8 health;
2843 u8 device_guid[16];
2844 u32 device_specific_offset; /* Zero if no Device-specific data */
2845};
2846
2847/* Values for Health field above */
2848
2849#define ACPI_PHAT_ERRORS_FOUND 0
2850#define ACPI_PHAT_NO_ERRORS 1
2851#define ACPI_PHAT_UNKNOWN_ERRORS 2
2852#define ACPI_PHAT_ADVISORY 3
2853
2854/*******************************************************************************
2855 *
2856 * PMTT - Platform Memory Topology Table (ACPI 5.0)
2857 * Version 1
2858 *
2859 ******************************************************************************/
2860
2861struct acpi_table_pmtt {
2862 struct acpi_table_header header; /* Common ACPI table header */
2863 u32 memory_device_count;
2864 /*
2865 * Immediately followed by:
2866 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2867 */
2868};
2869
2870/* Common header for PMTT subtables that follow main table */
2871
2872struct acpi_pmtt_header {
2873 u8 type;
2874 u8 reserved1;
2875 u16 length;
2876 u16 flags;
2877 u16 reserved2;
2878 u32 memory_device_count; /* Zero means no memory device structs follow */
2879 /*
2880 * Immediately followed by:
2881 * u8 type_specific_data[]
2882 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2883 */
2884};
2885
2886/* Values for Type field above */
2887
2888#define ACPI_PMTT_TYPE_SOCKET 0
2889#define ACPI_PMTT_TYPE_CONTROLLER 1
2890#define ACPI_PMTT_TYPE_DIMM 2
2891#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */
2892#define ACPI_PMTT_TYPE_VENDOR 0xFF
2893
2894/* Values for Flags field above */
2895
2896#define ACPI_PMTT_TOP_LEVEL 0x0001
2897#define ACPI_PMTT_PHYSICAL 0x0002
2898#define ACPI_PMTT_MEMORY_TYPE 0x000C
2899
2900/*
2901 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
2902 */
2903
2904/* 0: Socket Structure */
2905
2906struct acpi_pmtt_socket {
2907 struct acpi_pmtt_header header;
2908 u16 socket_id;
2909 u16 reserved;
2910};
2911 /*
2912 * Immediately followed by:
2913 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2914 */
2915
2916/* 1: Memory Controller subtable */
2917
2918struct acpi_pmtt_controller {
2919 struct acpi_pmtt_header header;
2920 u16 controller_id;
2921 u16 reserved;
2922};
2923 /*
2924 * Immediately followed by:
2925 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2926 */
2927
2928/* 2: Physical Component Identifier (DIMM) */
2929
2930struct acpi_pmtt_physical_component {
2931 struct acpi_pmtt_header header;
2932 u32 bios_handle;
2933};
2934
2935/* 0xFF: Vendor Specific Data */
2936
2937struct acpi_pmtt_vendor_specific {
2938 struct acpi_pmtt_header header;
2939 u8 type_uuid[16];
2940 u8 specific[];
2941 /*
2942 * Immediately followed by:
2943 * u8 vendor_specific_data[];
2944 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2945 */
2946};
2947
2948/*******************************************************************************
2949 *
2950 * PPTT - Processor Properties Topology Table (ACPI 6.2)
2951 * Version 1
2952 *
2953 ******************************************************************************/
2954
2955struct acpi_table_pptt {
2956 struct acpi_table_header header; /* Common ACPI table header */
2957};
2958
2959/* Values for Type field above */
2960
2961enum acpi_pptt_type {
2962 ACPI_PPTT_TYPE_PROCESSOR = 0,
2963 ACPI_PPTT_TYPE_CACHE = 1,
2964 ACPI_PPTT_TYPE_ID = 2,
2965 ACPI_PPTT_TYPE_RESERVED = 3
2966};
2967
2968/* 0: Processor Hierarchy Node Structure */
2969
2970struct acpi_pptt_processor {
2971 struct acpi_subtable_header header;
2972 u16 reserved;
2973 u32 flags;
2974 u32 parent;
2975 u32 acpi_processor_id;
2976 u32 number_of_priv_resources;
2977};
2978
2979/* Flags */
2980
2981#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
2982#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
2983#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
2984#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
2985#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
2986
2987/* 1: Cache Type Structure */
2988
2989struct acpi_pptt_cache {
2990 struct acpi_subtable_header header;
2991 u16 reserved;
2992 u32 flags;
2993 u32 next_level_of_cache;
2994 u32 size;
2995 u32 number_of_sets;
2996 u8 associativity;
2997 u8 attributes;
2998 u16 line_size;
2999};
3000
3001/* 1: Cache Type Structure for PPTT version 3 */
3002
3003struct acpi_pptt_cache_v1 {
3004 struct acpi_subtable_header header;
3005 u16 reserved;
3006 u32 flags;
3007 u32 next_level_of_cache;
3008 u32 size;
3009 u32 number_of_sets;
3010 u8 associativity;
3011 u8 attributes;
3012 u16 line_size;
3013 u32 cache_id;
3014};
3015
3016/* Flags */
3017
3018#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
3019#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
3020#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
3021#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
3022#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
3023#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
3024#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
3025#define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */
3026
3027/* Masks for Attributes */
3028
3029#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
3030#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
3031#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
3032
3033/* Attributes describing cache */
3034#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
3035#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
3036#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
3037#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
3038
3039#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
3040#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
3041#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
3042#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
3043
3044#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
3045#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
3046
3047/* 2: ID Structure */
3048
3049struct acpi_pptt_id {
3050 struct acpi_subtable_header header;
3051 u16 reserved;
3052 u32 vendor_id;
3053 u64 level1_id;
3054 u64 level2_id;
3055 u16 major_rev;
3056 u16 minor_rev;
3057 u16 spin_rev;
3058};
3059
3060/*******************************************************************************
3061 *
3062 * PRMT - Platform Runtime Mechanism Table
3063 * Version 1
3064 *
3065 ******************************************************************************/
3066
3067struct acpi_table_prmt {
3068 struct acpi_table_header header; /* Common ACPI table header */
3069};
3070
3071struct acpi_table_prmt_header {
3072 u8 platform_guid[16];
3073 u32 module_info_offset;
3074 u32 module_info_count;
3075};
3076
3077struct acpi_prmt_module_header {
3078 u16 revision;
3079 u16 length;
3080};
3081
3082struct acpi_prmt_module_info {
3083 u16 revision;
3084 u16 length;
3085 u8 module_guid[16];
3086 u16 major_rev;
3087 u16 minor_rev;
3088 u16 handler_info_count;
3089 u32 handler_info_offset;
3090 u64 mmio_list_pointer;
3091};
3092
3093struct acpi_prmt_handler_info {
3094 u16 revision;
3095 u16 length;
3096 u8 handler_guid[16];
3097 u64 handler_address;
3098 u64 static_data_buffer_address;
3099 u64 acpi_param_buffer_address;
3100};
3101
3102/*******************************************************************************
3103 *
3104 * RASF - RAS Feature Table (ACPI 5.0)
3105 * Version 1
3106 *
3107 ******************************************************************************/
3108
3109struct acpi_table_rasf {
3110 struct acpi_table_header header; /* Common ACPI table header */
3111 u8 channel_id[12];
3112};
3113
3114/* RASF Platform Communication Channel Shared Memory Region */
3115
3116struct acpi_rasf_shared_memory {
3117 u32 signature;
3118 u16 command;
3119 u16 status;
3120 u16 version;
3121 u8 capabilities[16];
3122 u8 set_capabilities[16];
3123 u16 num_parameter_blocks;
3124 u32 set_capabilities_status;
3125};
3126
3127/* RASF Parameter Block Structure Header */
3128
3129struct acpi_rasf_parameter_block {
3130 u16 type;
3131 u16 version;
3132 u16 length;
3133};
3134
3135/* RASF Parameter Block Structure for PATROL_SCRUB */
3136
3137struct acpi_rasf_patrol_scrub_parameter {
3138 struct acpi_rasf_parameter_block header;
3139 u16 patrol_scrub_command;
3140 u64 requested_address_range[2];
3141 u64 actual_address_range[2];
3142 u16 flags;
3143 u8 requested_speed;
3144};
3145
3146/* Masks for Flags and Speed fields above */
3147
3148#define ACPI_RASF_SCRUBBER_RUNNING 1
3149#define ACPI_RASF_SPEED (7<<1)
3150#define ACPI_RASF_SPEED_SLOW (0<<1)
3151#define ACPI_RASF_SPEED_MEDIUM (4<<1)
3152#define ACPI_RASF_SPEED_FAST (7<<1)
3153
3154/* Channel Commands */
3155
3156enum acpi_rasf_commands {
3157 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
3158};
3159
3160/* Platform RAS Capabilities */
3161
3162enum acpi_rasf_capabiliities {
3163 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
3164 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
3165};
3166
3167/* Patrol Scrub Commands */
3168
3169enum acpi_rasf_patrol_scrub_commands {
3170 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
3171 ACPI_RASF_START_PATROL_SCRUBBER = 2,
3172 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
3173};
3174
3175/* Channel Command flags */
3176
3177#define ACPI_RASF_GENERATE_SCI (1<<15)
3178
3179/* Status values */
3180
3181enum acpi_rasf_status {
3182 ACPI_RASF_SUCCESS = 0,
3183 ACPI_RASF_NOT_VALID = 1,
3184 ACPI_RASF_NOT_SUPPORTED = 2,
3185 ACPI_RASF_BUSY = 3,
3186 ACPI_RASF_FAILED = 4,
3187 ACPI_RASF_ABORTED = 5,
3188 ACPI_RASF_INVALID_DATA = 6
3189};
3190
3191/* Status flags */
3192
3193#define ACPI_RASF_COMMAND_COMPLETE (1)
3194#define ACPI_RASF_SCI_DOORBELL (1<<1)
3195#define ACPI_RASF_ERROR (1<<2)
3196#define ACPI_RASF_STATUS (0x1F<<3)
3197
3198/*******************************************************************************
3199 *
3200 * RAS2 - RAS2 Feature Table (ACPI 6.5)
3201 * Version 1
3202 *
3203 *
3204 ******************************************************************************/
3205
3206struct acpi_table_ras2 {
3207 struct acpi_table_header header; /* Common ACPI table header */
3208 u16 reserved;
3209 u16 num_pcc_descs;
3210};
3211
3212/* RAS2 Platform Communication Channel Descriptor */
3213
3214struct acpi_ras2_pcc_desc {
3215 u8 channel_id;
3216 u16 reserved;
3217 u8 feature_type;
3218 u32 instance;
3219};
3220
3221/* RAS2 Platform Communication Channel Shared Memory Region */
3222
3223struct acpi_ras2_shmem {
3224 u32 signature;
3225 u16 command;
3226 u16 status;
3227 u16 version;
3228 u8 features[16];
3229 u8 set_caps[16];
3230 u16 num_param_blks;
3231 u32 set_caps_status;
3232};
3233
3234/* RAS2 Parameter Block Structure for PATROL_SCRUB */
3235
3236struct acpi_ras2_parameter_block {
3237 u16 type;
3238 u16 version;
3239 u16 length;
3240};
3241
3242/* RAS2 Parameter Block Structure for PATROL_SCRUB */
3243
3244struct acpi_ras2_patrol_scrub_param {
3245 struct acpi_ras2_parameter_block header;
3246 u16 command;
3247 u64 req_addr_range[2];
3248 u64 actl_addr_range[2];
3249 u32 flags;
3250 u32 scrub_params_out;
3251 u32 scrub_params_in;
3252 u32 ext_scrub_params;
3253 u8 scrub_rate_desc[256];
3254};
3255
3256/* Masks for Flags field above */
3257
3258#define ACPI_RAS2_SCRUBBER_RUNNING 1
3259
3260/* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */
3261
3262struct acpi_ras2_la2pa_translation_parameter {
3263 struct acpi_ras2_parameter_block header;
3264 u16 addr_translation_command;
3265 u64 sub_inst_id;
3266 u64 logical_address;
3267 u64 physical_address;
3268 u32 status;
3269};
3270
3271/* Channel Commands */
3272
3273enum acpi_ras2_commands {
3274 ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1
3275};
3276
3277/* Platform RAS2 Features */
3278
3279enum acpi_ras2_features {
3280 ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0,
3281 ACPI_RAS2_LA2PA_TRANSLATION = 1
3282};
3283
3284/* RAS2 Patrol Scrub Commands */
3285
3286enum acpi_ras2_patrol_scrub_commands {
3287 ACPI_RAS2_GET_PATROL_PARAMETERS = 1,
3288 ACPI_RAS2_START_PATROL_SCRUBBER = 2,
3289 ACPI_RAS2_STOP_PATROL_SCRUBBER = 3
3290};
3291
3292/* RAS2 LA2PA Translation Commands */
3293
3294enum acpi_ras2_la2_pa_translation_commands {
3295 ACPI_RAS2_GET_LA2PA_TRANSLATION = 1,
3296};
3297
3298/* RAS2 LA2PA Translation Status values */
3299
3300enum acpi_ras2_la2_pa_translation_status {
3301 ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0,
3302 ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1,
3303};
3304
3305/* Channel Command flags */
3306
3307#define ACPI_RAS2_GENERATE_SCI (1<<15)
3308
3309/* Status values */
3310
3311enum acpi_ras2_status {
3312 ACPI_RAS2_SUCCESS = 0,
3313 ACPI_RAS2_NOT_VALID = 1,
3314 ACPI_RAS2_NOT_SUPPORTED = 2,
3315 ACPI_RAS2_BUSY = 3,
3316 ACPI_RAS2_FAILED = 4,
3317 ACPI_RAS2_ABORTED = 5,
3318 ACPI_RAS2_INVALID_DATA = 6
3319};
3320
3321/* Status flags */
3322
3323#define ACPI_RAS2_COMMAND_COMPLETE (1)
3324#define ACPI_RAS2_SCI_DOORBELL (1<<1)
3325#define ACPI_RAS2_ERROR (1<<2)
3326#define ACPI_RAS2_STATUS (0x1F<<3)
3327
3328/*******************************************************************************
3329 *
3330 * RGRT - Regulatory Graphics Resource Table
3331 * Version 1
3332 *
3333 * Conforms to "ACPI RGRT" available at:
3334 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/
3335 *
3336 ******************************************************************************/
3337
3338struct acpi_table_rgrt {
3339 struct acpi_table_header header; /* Common ACPI table header */
3340 u16 version;
3341 u8 image_type;
3342 u8 reserved;
3343 u8 image[];
3344};
3345
3346/* image_type values */
3347
3348enum acpi_rgrt_image_type {
3349 ACPI_RGRT_TYPE_RESERVED0 = 0,
3350 ACPI_RGRT_IMAGE_TYPE_PNG = 1,
3351 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
3352};
3353
3354/*******************************************************************************
3355 *
3356 * RHCT - RISC-V Hart Capabilities Table
3357 * Version 1
3358 *
3359 ******************************************************************************/
3360
3361struct acpi_table_rhct {
3362 struct acpi_table_header header; /* Common ACPI table header */
3363 u32 flags; /* RHCT flags */
3364 u64 time_base_freq;
3365 u32 node_count;
3366 u32 node_offset;
3367};
3368
3369/* RHCT Flags */
3370
3371#define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1)
3372/*
3373 * RHCT subtables
3374 */
3375struct acpi_rhct_node_header {
3376 u16 type;
3377 u16 length;
3378 u16 revision;
3379};
3380
3381/* Values for RHCT subtable Type above */
3382
3383enum acpi_rhct_node_type {
3384 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000,
3385 ACPI_RHCT_NODE_TYPE_CMO = 0x0001,
3386 ACPI_RHCT_NODE_TYPE_MMU = 0x0002,
3387 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003,
3388 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF,
3389};
3390
3391/*
3392 * RHCT node specific subtables
3393 */
3394
3395/* ISA string node structure */
3396struct acpi_rhct_isa_string {
3397 u16 isa_length;
3398 char isa[];
3399};
3400
3401struct acpi_rhct_cmo_node {
3402 u8 reserved; /* Must be zero */
3403 u8 cbom_size; /* CBOM size in powerof 2 */
3404 u8 cbop_size; /* CBOP size in powerof 2 */
3405 u8 cboz_size; /* CBOZ size in powerof 2 */
3406};
3407
3408struct acpi_rhct_mmu_node {
3409 u8 reserved; /* Must be zero */
3410 u8 mmu_type; /* Virtual Address Scheme */
3411};
3412
3413enum acpi_rhct_mmu_type {
3414 ACPI_RHCT_MMU_TYPE_SV39 = 0,
3415 ACPI_RHCT_MMU_TYPE_SV48 = 1,
3416 ACPI_RHCT_MMU_TYPE_SV57 = 2
3417};
3418
3419/* Hart Info node structure */
3420struct acpi_rhct_hart_info {
3421 u16 num_offsets;
3422 u32 uid; /* ACPI processor UID */
3423};
3424
3425/*******************************************************************************
3426 *
3427 * RIMT - RISC-V IO Remapping Table
3428 *
3429 * https://github.com/riscv-non-isa/riscv-acpi-rimt
3430 *
3431 ******************************************************************************/
3432
3433struct acpi_table_rimt {
3434 struct acpi_table_header header; /* Common ACPI table header */
3435 u32 num_nodes; /* Number of RIMT Nodes */
3436 u32 node_offset; /* Offset to RIMT Node Array */
3437 u32 reserved;
3438};
3439
3440struct acpi_rimt_node {
3441 u8 type;
3442 u8 revision;
3443 u16 length;
3444 u16 reserved;
3445 u16 id;
3446 char node_data[];
3447};
3448
3449enum acpi_rimt_node_type {
3450 ACPI_RIMT_NODE_TYPE_IOMMU = 0x0,
3451 ACPI_RIMT_NODE_TYPE_PCIE_ROOT_COMPLEX = 0x1,
3452 ACPI_RIMT_NODE_TYPE_PLAT_DEVICE = 0x2,
3453};
3454
3455struct acpi_rimt_iommu {
3456 u8 hardware_id[8]; /* Hardware ID */
3457 u64 base_address; /* Base Address */
3458 u32 flags; /* Flags */
3459 u32 proximity_domain; /* Proximity Domain */
3460 u16 pcie_segment_number; /* PCIe Segment number */
3461 u16 pcie_bdf; /* PCIe B/D/F */
3462 u16 num_interrupt_wires; /* Number of interrupt wires */
3463 u16 interrupt_wire_offset; /* Interrupt wire array offset */
3464 u64 interrupt_wire[]; /* Interrupt wire array */
3465};
3466
3467/* IOMMU Node Flags */
3468#define ACPI_RIMT_IOMMU_FLAGS_PCIE (1)
3469#define ACPI_RIMT_IOMMU_FLAGS_PXM_VALID (1 << 1)
3470
3471/* Interrupt Wire Structure */
3472struct acpi_rimt_iommu_wire_gsi {
3473 u32 irq_num; /* Interrupt Number */
3474 u32 flags; /* Flags */
3475};
3476
3477/* Interrupt Wire Flags */
3478#define ACPI_RIMT_GSI_LEVEL_TRIGGERRED (1)
3479#define ACPI_RIMT_GSI_ACTIVE_HIGH (1 << 1)
3480
3481struct acpi_rimt_id_mapping {
3482 u32 source_id_base; /* Source ID Base */
3483 u32 num_ids; /* Number of IDs */
3484 u32 dest_id_base; /* Destination Device ID Base */
3485 u32 dest_offset; /* Destination IOMMU Offset */
3486 u32 flags; /* Flags */
3487};
3488
3489struct acpi_rimt_pcie_rc {
3490 u32 flags; /* Flags */
3491 u16 reserved; /* Reserved */
3492 u16 pcie_segment_number; /* PCIe Segment number */
3493 u16 id_mapping_offset; /* ID mapping array offset */
3494 u16 num_id_mappings; /* Number of ID mappings */
3495};
3496
3497/* PCIe Root Complex Node Flags */
3498#define ACPI_RIMT_PCIE_ATS_SUPPORTED (1)
3499#define ACPI_RIMT_PCIE_PRI_SUPPORTED (1 << 1)
3500
3501struct acpi_rimt_platform_device {
3502 u16 id_mapping_offset; /* ID Mapping array offset */
3503 u16 num_id_mappings; /* Number of ID mappings */
3504 char device_name[]; /* Device Object Name */
3505};
3506
3507/*******************************************************************************
3508 *
3509 * SBST - Smart Battery Specification Table
3510 * Version 1
3511 *
3512 ******************************************************************************/
3513
3514struct acpi_table_sbst {
3515 struct acpi_table_header header; /* Common ACPI table header */
3516 u32 warning_level;
3517 u32 low_level;
3518 u32 critical_level;
3519};
3520
3521/*******************************************************************************
3522 *
3523 * SDEI - Software Delegated Exception Interface Descriptor Table
3524 *
3525 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
3526 * May 8th, 2017. Copyright 2017 ARM Ltd.
3527 *
3528 ******************************************************************************/
3529
3530struct acpi_table_sdei {
3531 struct acpi_table_header header; /* Common ACPI table header */
3532};
3533
3534/*******************************************************************************
3535 *
3536 * SDEV - Secure Devices Table (ACPI 6.2)
3537 * Version 1
3538 *
3539 ******************************************************************************/
3540
3541struct acpi_table_sdev {
3542 struct acpi_table_header header; /* Common ACPI table header */
3543};
3544
3545struct acpi_sdev_header {
3546 u8 type;
3547 u8 flags;
3548 u16 length;
3549};
3550
3551/* Values for subtable type above */
3552
3553enum acpi_sdev_type {
3554 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
3555 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
3556 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
3557};
3558
3559/* Values for flags above */
3560
3561#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
3562#define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
3563
3564/*
3565 * SDEV subtables
3566 */
3567
3568/* 0: Namespace Device Based Secure Device Structure */
3569
3570struct acpi_sdev_namespace {
3571 struct acpi_sdev_header header;
3572 u16 device_id_offset;
3573 u16 device_id_length;
3574 u16 vendor_data_offset;
3575 u16 vendor_data_length;
3576};
3577
3578struct acpi_sdev_secure_component {
3579 u16 secure_component_offset;
3580 u16 secure_component_length;
3581};
3582
3583/*
3584 * SDEV sub-subtables ("Components") for above
3585 */
3586struct acpi_sdev_component {
3587 struct acpi_sdev_header header;
3588};
3589
3590/* Values for sub-subtable type above */
3591
3592enum acpi_sac_type {
3593 ACPI_SDEV_TYPE_ID_COMPONENT = 0,
3594 ACPI_SDEV_TYPE_MEM_COMPONENT = 1
3595};
3596
3597struct acpi_sdev_id_component {
3598 struct acpi_sdev_header header;
3599 u16 hardware_id_offset;
3600 u16 hardware_id_length;
3601 u16 subsystem_id_offset;
3602 u16 subsystem_id_length;
3603 u16 hardware_revision;
3604 u8 hardware_rev_present;
3605 u8 class_code_present;
3606 u8 pci_base_class;
3607 u8 pci_sub_class;
3608 u8 pci_programming_xface;
3609};
3610
3611struct acpi_sdev_mem_component {
3612 struct acpi_sdev_header header;
3613 u32 reserved;
3614 u64 memory_base_address;
3615 u64 memory_length;
3616};
3617
3618/* 1: PCIe Endpoint Device Based Device Structure */
3619
3620struct acpi_sdev_pcie {
3621 struct acpi_sdev_header header;
3622 u16 segment;
3623 u16 start_bus;
3624 u16 path_offset;
3625 u16 path_length;
3626 u16 vendor_data_offset;
3627 u16 vendor_data_length;
3628};
3629
3630/* 1a: PCIe Endpoint path entry */
3631
3632struct acpi_sdev_pcie_path {
3633 u8 device;
3634 u8 function;
3635};
3636
3637/*******************************************************************************
3638 *
3639 * SVKL - Storage Volume Key Location Table (ACPI 6.4)
3640 * From: "Guest-Host-Communication Interface (GHCI) for Intel
3641 * Trust Domain Extensions (Intel TDX)".
3642 * Version 1
3643 *
3644 ******************************************************************************/
3645
3646struct acpi_table_svkl {
3647 struct acpi_table_header header; /* Common ACPI table header */
3648 u32 count;
3649};
3650
3651struct acpi_svkl_key {
3652 u16 type;
3653 u16 format;
3654 u32 size;
3655 u64 address;
3656};
3657
3658enum acpi_svkl_type {
3659 ACPI_SVKL_TYPE_MAIN_STORAGE = 0,
3660 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */
3661};
3662
3663enum acpi_svkl_format {
3664 ACPI_SVKL_FORMAT_RAW_BINARY = 0,
3665 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */
3666};
3667
3668/*******************************************************************************
3669 * SWFT - SoundWire File Table
3670 *
3671 * Conforms to "Discovery and Configuration (DisCo) Specification for SoundWire"
3672 * Version 2.1, 2 October 2023
3673 *
3674 ******************************************************************************/
3675struct acpi_sw_file {
3676 u16 vendor_id;
3677 u32 file_id;
3678 u16 file_version;
3679 u32 file_length;
3680 u8 data[];
3681};
3682
3683struct acpi_table_swft {
3684 struct acpi_table_header header;
3685 struct acpi_sw_file files[];
3686};
3687
3688/*******************************************************************************
3689 *
3690 * TDEL - TD-Event Log
3691 * From: "Guest-Host-Communication Interface (GHCI) for Intel
3692 * Trust Domain Extensions (Intel TDX)".
3693 * September 2020
3694 *
3695 ******************************************************************************/
3696
3697struct acpi_table_tdel {
3698 struct acpi_table_header header; /* Common ACPI table header */
3699 u32 reserved;
3700 u64 log_area_minimum_length;
3701 u64 log_area_start_address;
3702};
3703
3704/* Reset to default packing */
3705
3706#pragma pack()
3707
3708#endif /* __ACTBL2_H__ */