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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * SAS structures and definitions header file
4 *
5 * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
6 * Copyright (C) 2005 Luben Tuikov <[email protected]>
7 */
8
9#ifndef _SAS_H_
10#define _SAS_H_
11
12#include <linux/types.h>
13#include <asm/byteorder.h>
14
15#define SAS_ADDR_SIZE 8
16#define HASHED_SAS_ADDR_SIZE 3
17#define SAS_ADDR(_sa) ((unsigned long long) be64_to_cpu(*(__be64 *)(_sa)))
18
19#define SMP_REQUEST 0x40
20#define SMP_RESPONSE 0x41
21
22#define SSP_DATA 0x01
23#define SSP_XFER_RDY 0x05
24#define SSP_COMMAND 0x06
25#define SSP_RESPONSE 0x07
26#define SSP_TASK 0x16
27
28#define SMP_REPORT_GENERAL 0x00
29#define SMP_REPORT_MANUF_INFO 0x01
30#define SMP_READ_GPIO_REG 0x02
31#define SMP_DISCOVER 0x10
32#define SMP_REPORT_PHY_ERR_LOG 0x11
33#define SMP_REPORT_PHY_SATA 0x12
34#define SMP_REPORT_ROUTE_INFO 0x13
35#define SMP_WRITE_GPIO_REG 0x82
36#define SMP_CONF_ROUTE_INFO 0x90
37#define SMP_PHY_CONTROL 0x91
38#define SMP_PHY_TEST_FUNCTION 0x92
39
40#define SMP_RESP_FUNC_ACC 0x00
41#define SMP_RESP_FUNC_UNK 0x01
42#define SMP_RESP_FUNC_FAILED 0x02
43#define SMP_RESP_INV_FRM_LEN 0x03
44#define SMP_RESP_NO_PHY 0x10
45#define SMP_RESP_NO_INDEX 0x11
46#define SMP_RESP_PHY_NO_SATA 0x12
47#define SMP_RESP_PHY_UNK_OP 0x13
48#define SMP_RESP_PHY_UNK_TESTF 0x14
49#define SMP_RESP_PHY_TEST_INPROG 0x15
50#define SMP_RESP_PHY_VACANT 0x16
51
52/* SAM TMFs */
53#define TMF_ABORT_TASK 0x01
54#define TMF_ABORT_TASK_SET 0x02
55#define TMF_CLEAR_TASK_SET 0x04
56#define TMF_LU_RESET 0x08
57#define TMF_CLEAR_ACA 0x40
58#define TMF_QUERY_TASK 0x80
59
60/* SAS TMF responses */
61#define TMF_RESP_FUNC_COMPLETE 0x00
62#define TMF_RESP_INVALID_FRAME 0x02
63#define TMF_RESP_FUNC_ESUPP 0x04
64#define TMF_RESP_FUNC_FAILED 0x05
65#define TMF_RESP_FUNC_SUCC 0x08
66#define TMF_RESP_NO_LUN 0x09
67#define TMF_RESP_OVERLAPPED_TAG 0x0A
68
69enum sas_oob_mode {
70 OOB_NOT_CONNECTED,
71 SATA_OOB_MODE,
72 SAS_OOB_MODE
73};
74
75/* See sas_discover.c if you plan on changing these */
76enum sas_device_type {
77 /* these are SAS protocol defined (attached device type field) */
78 SAS_PHY_UNUSED = 0,
79 SAS_END_DEVICE = 1,
80 SAS_EDGE_EXPANDER_DEVICE = 2,
81 SAS_FANOUT_EXPANDER_DEVICE = 3,
82 /* these are internal to libsas */
83 SAS_HA = 4,
84 SAS_SATA_DEV = 5,
85 SAS_SATA_PM = 7,
86 SAS_SATA_PM_PORT = 8,
87 SAS_SATA_PENDING = 9,
88};
89
90enum sas_protocol {
91 SAS_PROTOCOL_NONE = 0,
92 SAS_PROTOCOL_SATA = 0x01,
93 SAS_PROTOCOL_SMP = 0x02,
94 SAS_PROTOCOL_STP = 0x04,
95 SAS_PROTOCOL_SSP = 0x08,
96 SAS_PROTOCOL_ALL = 0x0E,
97 SAS_PROTOCOL_STP_ALL = SAS_PROTOCOL_STP|SAS_PROTOCOL_SATA,
98 /* these are internal to libsas */
99 SAS_PROTOCOL_INTERNAL_ABORT = 0x10,
100};
101
102/* From the spec; local phys only */
103enum phy_func {
104 PHY_FUNC_NOP,
105 PHY_FUNC_LINK_RESET, /* Enables the phy */
106 PHY_FUNC_HARD_RESET,
107 PHY_FUNC_DISABLE,
108 PHY_FUNC_CLEAR_ERROR_LOG = 5,
109 PHY_FUNC_CLEAR_AFFIL,
110 PHY_FUNC_TX_SATA_PS_SIGNAL,
111 PHY_FUNC_RELEASE_SPINUP_HOLD = 0x10, /* LOCAL PORT ONLY! */
112 PHY_FUNC_SET_LINK_RATE,
113 PHY_FUNC_GET_EVENTS,
114};
115
116/* SAS LLDD would need to report only _very_few_ of those, like BROADCAST.
117 * Most of those are here for completeness.
118 */
119enum sas_prim {
120 SAS_PRIM_AIP_NORMAL = 1,
121 SAS_PRIM_AIP_R0 = 2,
122 SAS_PRIM_AIP_R1 = 3,
123 SAS_PRIM_AIP_R2 = 4,
124 SAS_PRIM_AIP_WC = 5,
125 SAS_PRIM_AIP_WD = 6,
126 SAS_PRIM_AIP_WP = 7,
127 SAS_PRIM_AIP_RWP = 8,
128
129 SAS_PRIM_BC_CH = 9,
130 SAS_PRIM_BC_RCH0 = 10,
131 SAS_PRIM_BC_RCH1 = 11,
132 SAS_PRIM_BC_R0 = 12,
133 SAS_PRIM_BC_R1 = 13,
134 SAS_PRIM_BC_R2 = 14,
135 SAS_PRIM_BC_R3 = 15,
136 SAS_PRIM_BC_R4 = 16,
137
138 SAS_PRIM_NOTIFY_ENSP= 17,
139 SAS_PRIM_NOTIFY_R0 = 18,
140 SAS_PRIM_NOTIFY_R1 = 19,
141 SAS_PRIM_NOTIFY_R2 = 20,
142
143 SAS_PRIM_CLOSE_CLAF = 21,
144 SAS_PRIM_CLOSE_NORM = 22,
145 SAS_PRIM_CLOSE_R0 = 23,
146 SAS_PRIM_CLOSE_R1 = 24,
147
148 SAS_PRIM_OPEN_RTRY = 25,
149 SAS_PRIM_OPEN_RJCT = 26,
150 SAS_PRIM_OPEN_ACPT = 27,
151
152 SAS_PRIM_DONE = 28,
153 SAS_PRIM_BREAK = 29,
154
155 SATA_PRIM_DMAT = 33,
156 SATA_PRIM_PMNAK = 34,
157 SATA_PRIM_PMACK = 35,
158 SATA_PRIM_PMREQ_S = 36,
159 SATA_PRIM_PMREQ_P = 37,
160 SATA_SATA_R_ERR = 38,
161};
162
163enum sas_open_rej_reason {
164 /* Abandon open */
165 SAS_OREJ_UNKNOWN = 0,
166 SAS_OREJ_BAD_DEST = 1,
167 SAS_OREJ_CONN_RATE = 2,
168 SAS_OREJ_EPROTO = 3,
169 SAS_OREJ_RESV_AB0 = 4,
170 SAS_OREJ_RESV_AB1 = 5,
171 SAS_OREJ_RESV_AB2 = 6,
172 SAS_OREJ_RESV_AB3 = 7,
173 SAS_OREJ_WRONG_DEST= 8,
174 SAS_OREJ_STP_NORES = 9,
175
176 /* Retry open */
177 SAS_OREJ_NO_DEST = 10,
178 SAS_OREJ_PATH_BLOCKED = 11,
179 SAS_OREJ_RSVD_CONT0 = 12,
180 SAS_OREJ_RSVD_CONT1 = 13,
181 SAS_OREJ_RSVD_INIT0 = 14,
182 SAS_OREJ_RSVD_INIT1 = 15,
183 SAS_OREJ_RSVD_STOP0 = 16,
184 SAS_OREJ_RSVD_STOP1 = 17,
185 SAS_OREJ_RSVD_RETRY = 18,
186};
187
188enum sas_gpio_reg_type {
189 SAS_GPIO_REG_CFG = 0,
190 SAS_GPIO_REG_RX = 1,
191 SAS_GPIO_REG_RX_GP = 2,
192 SAS_GPIO_REG_TX = 3,
193 SAS_GPIO_REG_TX_GP = 4,
194};
195
196/* Response frame DATAPRES field */
197enum {
198 SAS_DATAPRES_NO_DATA = 0,
199 SAS_DATAPRES_RESPONSE_DATA = 1,
200 SAS_DATAPRES_SENSE_DATA = 2,
201};
202
203struct dev_to_host_fis {
204 u8 fis_type; /* 0x34 */
205 u8 flags;
206 u8 status;
207 u8 error;
208
209 u8 lbal;
210 union { u8 lbam; u8 byte_count_low; };
211 union { u8 lbah; u8 byte_count_high; };
212 u8 device;
213
214 u8 lbal_exp;
215 u8 lbam_exp;
216 u8 lbah_exp;
217 u8 _r_a;
218
219 union { u8 sector_count; u8 interrupt_reason; };
220 u8 sector_count_exp;
221 u8 _r_b;
222 u8 _r_c;
223
224 u32 _r_d;
225} __attribute__ ((packed));
226
227struct host_to_dev_fis {
228 u8 fis_type; /* 0x27 */
229 u8 flags;
230 u8 command;
231 u8 features;
232
233 u8 lbal;
234 union { u8 lbam; u8 byte_count_low; };
235 union { u8 lbah; u8 byte_count_high; };
236 u8 device;
237
238 u8 lbal_exp;
239 u8 lbam_exp;
240 u8 lbah_exp;
241 u8 features_exp;
242
243 union { u8 sector_count; u8 interrupt_reason; };
244 u8 sector_count_exp;
245 u8 _r_a;
246 u8 control;
247
248 u32 _r_b;
249} __attribute__ ((packed));
250
251/* Prefer to have code clarity over header file clarity.
252 */
253#ifdef __LITTLE_ENDIAN_BITFIELD
254struct sas_identify_frame {
255 /* Byte 0 */
256 u8 frame_type:4;
257 u8 dev_type:3;
258 u8 _un0:1;
259
260 /* Byte 1 */
261 u8 _un1;
262
263 /* Byte 2 */
264 union {
265 struct {
266 u8 _un20:1;
267 u8 smp_iport:1;
268 u8 stp_iport:1;
269 u8 ssp_iport:1;
270 u8 _un247:4;
271 };
272 u8 initiator_bits;
273 };
274
275 /* Byte 3 */
276 union {
277 struct {
278 u8 _un30:1;
279 u8 smp_tport:1;
280 u8 stp_tport:1;
281 u8 ssp_tport:1;
282 u8 _un347:4;
283 };
284 u8 target_bits;
285 };
286
287 /* Byte 4 - 11 */
288 u8 _un4_11[8];
289
290 /* Byte 12 - 19 */
291 u8 sas_addr[SAS_ADDR_SIZE];
292
293 /* Byte 20 */
294 u8 phy_id;
295
296 u8 _un21_27[7];
297
298 __be32 crc;
299} __attribute__ ((packed));
300
301struct ssp_frame_hdr {
302 u8 frame_type;
303 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
304 u8 _r_a;
305 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
306 __be16 _r_b;
307
308 u8 changing_data_ptr:1;
309 u8 retransmit:1;
310 u8 retry_data_frames:1;
311 u8 _r_c:5;
312
313 u8 num_fill_bytes:2;
314 u8 _r_d:6;
315
316 u32 _r_e;
317 __be16 tag;
318 __be16 tptt;
319 __be32 data_offs;
320} __attribute__ ((packed));
321
322struct ssp_response_iu {
323 u8 _r_a[10];
324
325 u8 datapres:2;
326 u8 _r_b:6;
327
328 u8 status;
329
330 u32 _r_c;
331
332 __be32 sense_data_len;
333 __be32 response_data_len;
334
335 union {
336 DECLARE_FLEX_ARRAY(u8, resp_data);
337 DECLARE_FLEX_ARRAY(u8, sense_data);
338 };
339} __attribute__ ((packed));
340
341struct ssp_command_iu {
342 u8 lun[8];
343 u8 _r_a;
344
345 union {
346 struct {
347 u8 attr:3;
348 u8 prio:4;
349 u8 efb:1;
350 };
351 u8 efb_prio_attr;
352 };
353
354 u8 _r_b;
355
356 u8 _r_c:2;
357 u8 add_cdb_len:6;
358
359 u8 cdb[16];
360 u8 add_cdb[];
361} __attribute__ ((packed));
362
363struct xfer_rdy_iu {
364 __be32 requested_offset;
365 __be32 write_data_len;
366 __be32 _r_a;
367} __attribute__ ((packed));
368
369struct ssp_tmf_iu {
370 u8 lun[8];
371 u16 _r_a;
372 u8 tmf;
373 u8 _r_b;
374 __be16 tag;
375 u8 _r_c[14];
376} __attribute__ ((packed));
377
378/* ---------- SMP ---------- */
379
380struct report_general_resp {
381 __be16 change_count;
382 __be16 route_indexes;
383 u8 _r_a;
384 u8 num_phys;
385
386 u8 conf_route_table:1;
387 u8 configuring:1;
388 u8 config_others:1;
389 u8 orej_retry_supp:1;
390 u8 stp_cont_awt:1;
391 u8 self_config:1;
392 u8 zone_config:1;
393 u8 t2t_supp:1;
394
395 u8 _r_c;
396
397 u8 enclosure_logical_id[8];
398
399 u8 _r_d[12];
400} __attribute__ ((packed));
401
402struct discover_resp {
403 u8 _r_a[5];
404
405 u8 phy_id;
406 __be16 _r_b;
407
408 u8 _r_c:4;
409 u8 attached_dev_type:3;
410 u8 _r_d:1;
411
412 u8 linkrate:4;
413 u8 _r_e:4;
414
415 u8 attached_sata_host:1;
416 u8 iproto:3;
417 u8 _r_f:4;
418
419 u8 attached_sata_dev:1;
420 u8 tproto:3;
421 u8 _r_g:3;
422 u8 attached_sata_ps:1;
423
424 u8 sas_addr[8];
425 u8 attached_sas_addr[8];
426 u8 attached_phy_id;
427
428 u8 _r_h[7];
429
430 u8 hmin_linkrate:4;
431 u8 pmin_linkrate:4;
432 u8 hmax_linkrate:4;
433 u8 pmax_linkrate:4;
434
435 u8 change_count;
436
437 u8 pptv:4;
438 u8 _r_i:3;
439 u8 virtual:1;
440
441 u8 routing_attr:4;
442 u8 _r_j:4;
443
444 u8 conn_type;
445 u8 conn_el_index;
446 u8 conn_phy_link;
447
448 u8 _r_k[8];
449} __attribute__ ((packed));
450
451struct report_phy_sata_resp {
452 u8 _r_a[5];
453
454 u8 phy_id;
455 u8 _r_b;
456
457 u8 affil_valid:1;
458 u8 affil_supp:1;
459 u8 _r_c:6;
460
461 u32 _r_d;
462
463 u8 stp_sas_addr[8];
464
465 struct dev_to_host_fis fis;
466
467 u32 _r_e;
468
469 u8 affil_stp_ini_addr[8];
470
471 __be32 crc;
472} __attribute__ ((packed));
473
474#elif defined(__BIG_ENDIAN_BITFIELD)
475struct sas_identify_frame {
476 /* Byte 0 */
477 u8 _un0:1;
478 u8 dev_type:3;
479 u8 frame_type:4;
480
481 /* Byte 1 */
482 u8 _un1;
483
484 /* Byte 2 */
485 union {
486 struct {
487 u8 _un247:4;
488 u8 ssp_iport:1;
489 u8 stp_iport:1;
490 u8 smp_iport:1;
491 u8 _un20:1;
492 };
493 u8 initiator_bits;
494 };
495
496 /* Byte 3 */
497 union {
498 struct {
499 u8 _un347:4;
500 u8 ssp_tport:1;
501 u8 stp_tport:1;
502 u8 smp_tport:1;
503 u8 _un30:1;
504 };
505 u8 target_bits;
506 };
507
508 /* Byte 4 - 11 */
509 u8 _un4_11[8];
510
511 /* Byte 12 - 19 */
512 u8 sas_addr[SAS_ADDR_SIZE];
513
514 /* Byte 20 */
515 u8 phy_id;
516
517 u8 _un21_27[7];
518
519 __be32 crc;
520} __attribute__ ((packed));
521
522struct ssp_frame_hdr {
523 u8 frame_type;
524 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
525 u8 _r_a;
526 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
527 __be16 _r_b;
528
529 u8 _r_c:5;
530 u8 retry_data_frames:1;
531 u8 retransmit:1;
532 u8 changing_data_ptr:1;
533
534 u8 _r_d:6;
535 u8 num_fill_bytes:2;
536
537 u32 _r_e;
538 __be16 tag;
539 __be16 tptt;
540 __be32 data_offs;
541} __attribute__ ((packed));
542
543struct ssp_response_iu {
544 u8 _r_a[10];
545
546 u8 _r_b:6;
547 u8 datapres:2;
548
549 u8 status;
550
551 u32 _r_c;
552
553 __be32 sense_data_len;
554 __be32 response_data_len;
555
556 union {
557 DECLARE_FLEX_ARRAY(u8, resp_data);
558 DECLARE_FLEX_ARRAY(u8, sense_data);
559 };
560} __attribute__ ((packed));
561
562struct ssp_command_iu {
563 u8 lun[8];
564 u8 _r_a;
565
566 union {
567 struct {
568 u8 efb:1;
569 u8 prio:4;
570 u8 attr:3;
571 };
572 u8 efb_prio_attr;
573 };
574
575 u8 _r_b;
576
577 u8 add_cdb_len:6;
578 u8 _r_c:2;
579
580 u8 cdb[16];
581 u8 add_cdb[];
582} __attribute__ ((packed));
583
584struct xfer_rdy_iu {
585 __be32 requested_offset;
586 __be32 write_data_len;
587 __be32 _r_a;
588} __attribute__ ((packed));
589
590struct ssp_tmf_iu {
591 u8 lun[8];
592 u16 _r_a;
593 u8 tmf;
594 u8 _r_b;
595 __be16 tag;
596 u8 _r_c[14];
597} __attribute__ ((packed));
598
599/* ---------- SMP ---------- */
600
601struct report_general_resp {
602 __be16 change_count;
603 __be16 route_indexes;
604 u8 _r_a;
605 u8 num_phys;
606
607 u8 t2t_supp:1;
608 u8 zone_config:1;
609 u8 self_config:1;
610 u8 stp_cont_awt:1;
611 u8 orej_retry_supp:1;
612 u8 config_others:1;
613 u8 configuring:1;
614 u8 conf_route_table:1;
615
616 u8 _r_c;
617
618 u8 enclosure_logical_id[8];
619
620 u8 _r_d[12];
621} __attribute__ ((packed));
622
623struct discover_resp {
624 u8 _r_a[5];
625
626 u8 phy_id;
627 __be16 _r_b;
628
629 u8 _r_d:1;
630 u8 attached_dev_type:3;
631 u8 _r_c:4;
632
633 u8 _r_e:4;
634 u8 linkrate:4;
635
636 u8 _r_f:4;
637 u8 iproto:3;
638 u8 attached_sata_host:1;
639
640 u8 attached_sata_ps:1;
641 u8 _r_g:3;
642 u8 tproto:3;
643 u8 attached_sata_dev:1;
644
645 u8 sas_addr[8];
646 u8 attached_sas_addr[8];
647 u8 attached_phy_id;
648
649 u8 _r_h[7];
650
651 u8 pmin_linkrate:4;
652 u8 hmin_linkrate:4;
653 u8 pmax_linkrate:4;
654 u8 hmax_linkrate:4;
655
656 u8 change_count;
657
658 u8 virtual:1;
659 u8 _r_i:3;
660 u8 pptv:4;
661
662 u8 _r_j:4;
663 u8 routing_attr:4;
664
665 u8 conn_type;
666 u8 conn_el_index;
667 u8 conn_phy_link;
668
669 u8 _r_k[8];
670} __attribute__ ((packed));
671
672struct report_phy_sata_resp {
673 u8 _r_a[5];
674
675 u8 phy_id;
676 u8 _r_b;
677
678 u8 _r_c:6;
679 u8 affil_supp:1;
680 u8 affil_valid:1;
681
682 u32 _r_d;
683
684 u8 stp_sas_addr[8];
685
686 struct dev_to_host_fis fis;
687
688 u32 _r_e;
689
690 u8 affil_stp_ini_addr[8];
691
692 __be32 crc;
693} __attribute__ ((packed));
694
695#else
696#error "Bitfield order not defined!"
697#endif
698
699struct smp_rg_resp {
700 u8 frame_type;
701 u8 function;
702 u8 result;
703 u8 reserved;
704 struct report_general_resp rg;
705} __attribute__ ((packed));
706
707struct smp_disc_resp {
708 u8 frame_type;
709 u8 function;
710 u8 result;
711 u8 reserved;
712 struct discover_resp disc;
713} __attribute__ ((packed));
714
715struct smp_rps_resp {
716 u8 frame_type;
717 u8 function;
718 u8 result;
719 u8 reserved;
720 struct report_phy_sata_resp rps;
721} __attribute__ ((packed));
722
723#endif /* _SAS_H_ */