| 1 |
|
| 2 | #ifndef __SOUND_OPL3_H
|
| 3 | #define __SOUND_OPL3_H
|
| 4 |
|
| 5 | |
| 6 | * Definitions of the OPL-3 registers.
|
| 7 | *
|
| 8 | * Copyright (c) by Jaroslav Kysela <[email protected]>,
|
| 9 | * Hannu Savolainen 1993-1996
|
| 10 | *
|
| 11 | * The OPL-3 mode is switched on by writing 0x01, to the offset 5
|
| 12 | * of the right side.
|
| 13 | *
|
| 14 | * Another special register at the right side is at offset 4. It contains
|
| 15 | * a bit mask defining which voices are used as 4 OP voices.
|
| 16 | *
|
| 17 | * The percussive mode is implemented in the left side only.
|
| 18 | *
|
| 19 | * With the above exceptions the both sides can be operated independently.
|
| 20 | *
|
| 21 | * A 4 OP voice can be created by setting the corresponding
|
| 22 | * bit at offset 4 of the right side.
|
| 23 | *
|
| 24 | * For example setting the rightmost bit (0x01) changes the
|
| 25 | * first voice on the right side to the 4 OP mode. The fourth
|
| 26 | * voice is made inaccessible.
|
| 27 | *
|
| 28 | * If a voice is set to the 2 OP mode, it works like 2 OP modes
|
| 29 | * of the original YM3812 (AdLib). In addition the voice can
|
| 30 | * be connected the left, right or both stereo channels. It can
|
| 31 | * even be left unconnected. This works with 4 OP voices also.
|
| 32 | *
|
| 33 | * The stereo connection bits are located in the FEEDBACK_CONNECTION
|
| 34 | * register of the voice (0xC0-0xC8). In 4 OP voices these bits are
|
| 35 | * in the second half of the voice.
|
| 36 |
|
| 37 |
|
| 38 | #include <sound/core.h>
|
| 39 | #include <sound/hwdep.h>
|
| 40 | #include <sound/timer.h>
|
| 41 | #include <sound/seq_midi_emul.h>
|
| 42 | #include <sound/seq_oss.h>
|
| 43 | #include <sound/seq_oss_legacy.h>
|
| 44 | #include <sound/seq_device.h>
|
| 45 | #include <sound/asound_fm.h>
|
| 46 |
|
| 47 | |
| 48 | * Register numbers for the global registers
|
| 49 |
|
| 50 |
|
| 51 | #define OPL3_REG_TEST 0x01
|
| 52 | #define OPL3_ENABLE_WAVE_SELECT 0x20
|
| 53 |
|
| 54 | #define OPL3_REG_TIMER1 0x02
|
| 55 | #define OPL3_REG_TIMER2 0x03
|
| 56 | #define OPL3_REG_TIMER_CONTROL 0x04
|
| 57 | #define OPL3_IRQ_RESET 0x80
|
| 58 | #define OPL3_TIMER1_MASK 0x40
|
| 59 | #define OPL3_TIMER2_MASK 0x20
|
| 60 | #define OPL3_TIMER1_START 0x01
|
| 61 | #define OPL3_TIMER2_START 0x02
|
| 62 |
|
| 63 | #define OPL3_REG_CONNECTION_SELECT 0x04
|
| 64 | #define OPL3_LEFT_4OP_0 0x01
|
| 65 | #define OPL3_LEFT_4OP_1 0x02
|
| 66 | #define OPL3_LEFT_4OP_2 0x04
|
| 67 | #define OPL3_RIGHT_4OP_0 0x08
|
| 68 | #define OPL3_RIGHT_4OP_1 0x10
|
| 69 | #define OPL3_RIGHT_4OP_2 0x20
|
| 70 |
|
| 71 | #define OPL3_REG_MODE 0x05
|
| 72 | #define OPL3_OPL3_ENABLE 0x01
|
| 73 | #define OPL3_OPL4_ENABLE 0x02
|
| 74 |
|
| 75 | #define OPL3_REG_KBD_SPLIT 0x08
|
| 76 | #define OPL3_COMPOSITE_SINE_WAVE_MODE 0x80
|
| 77 | #define OPL3_KEYBOARD_SPLIT 0x40
|
| 78 |
|
| 79 | #define OPL3_REG_PERCUSSION 0xbd
|
| 80 | #define OPL3_TREMOLO_DEPTH 0x80
|
| 81 | #define OPL3_VIBRATO_DEPTH 0x40
|
| 82 | #define OPL3_PERCUSSION_ENABLE 0x20
|
| 83 | #define OPL3_BASSDRUM_ON 0x10
|
| 84 | #define OPL3_SNAREDRUM_ON 0x08
|
| 85 | #define OPL3_TOMTOM_ON 0x04
|
| 86 | #define OPL3_CYMBAL_ON 0x02
|
| 87 | #define OPL3_HIHAT_ON 0x01
|
| 88 |
|
| 89 | |
| 90 | * Offsets to the register banks for operators. To get the
|
| 91 | * register number just add the operator offset to the bank offset
|
| 92 | *
|
| 93 | * AM/VIB/EG/KSR/Multiple (0x20 to 0x35)
|
| 94 |
|
| 95 | #define OPL3_REG_AM_VIB 0x20
|
| 96 | #define OPL3_TREMOLO_ON 0x80
|
| 97 | #define OPL3_VIBRATO_ON 0x40
|
| 98 | #define OPL3_SUSTAIN_ON 0x20
|
| 99 | #define OPL3_KSR 0x10
|
| 100 | #define OPL3_MULTIPLE_MASK 0x0f
|
| 101 |
|
| 102 | |
| 103 | * KSL/Total level (0x40 to 0x55)
|
| 104 |
|
| 105 | #define OPL3_REG_KSL_LEVEL 0x40
|
| 106 | #define OPL3_KSL_MASK 0xc0
|
| 107 | #define OPL3_TOTAL_LEVEL_MASK 0x3f
|
| 108 |
|
| 109 | |
| 110 | * Attack / Decay rate (0x60 to 0x75)
|
| 111 |
|
| 112 | #define OPL3_REG_ATTACK_DECAY 0x60
|
| 113 | #define OPL3_ATTACK_MASK 0xf0
|
| 114 | #define OPL3_DECAY_MASK 0x0f
|
| 115 |
|
| 116 | |
| 117 | * Sustain level / Release rate (0x80 to 0x95)
|
| 118 |
|
| 119 | #define OPL3_REG_SUSTAIN_RELEASE 0x80
|
| 120 | #define OPL3_SUSTAIN_MASK 0xf0
|
| 121 | #define OPL3_RELEASE_MASK 0x0f
|
| 122 |
|
| 123 | |
| 124 | * Wave select (0xE0 to 0xF5)
|
| 125 |
|
| 126 | #define OPL3_REG_WAVE_SELECT 0xe0
|
| 127 | #define OPL3_WAVE_SELECT_MASK 0x07
|
| 128 |
|
| 129 | |
| 130 | * Offsets to the register banks for voices. Just add to the
|
| 131 | * voice number to get the register number.
|
| 132 | *
|
| 133 | * F-Number low bits (0xA0 to 0xA8).
|
| 134 |
|
| 135 | #define OPL3_REG_FNUM_LOW 0xa0
|
| 136 |
|
| 137 | |
| 138 | * F-number high bits / Key on / Block (octave) (0xB0 to 0xB8)
|
| 139 |
|
| 140 | #define OPL3_REG_KEYON_BLOCK 0xb0
|
| 141 | #define OPL3_KEYON_BIT 0x20
|
| 142 | #define OPL3_BLOCKNUM_MASK 0x1c
|
| 143 | #define OPL3_FNUM_HIGH_MASK 0x03
|
| 144 |
|
| 145 | |
| 146 | * Feedback / Connection (0xc0 to 0xc8)
|
| 147 | *
|
| 148 | * These registers have two new bits when the OPL-3 mode
|
| 149 | * is selected. These bits controls connecting the voice
|
| 150 | * to the stereo channels. For 4 OP voices this bit is
|
| 151 | * defined in the second half of the voice (add 3 to the
|
| 152 | * register offset).
|
| 153 | *
|
| 154 | * For 4 OP voices the connection bit is used in the
|
| 155 | * both halves (gives 4 ways to connect the operators).
|
| 156 |
|
| 157 | #define OPL3_REG_FEEDBACK_CONNECTION 0xc0
|
| 158 | #define OPL3_FEEDBACK_MASK 0x0e
|
| 159 | #define OPL3_CONNECTION_BIT 0x01
|
| 160 | |
| 161 | * In the 4 OP mode there is four possible configurations how the
|
| 162 | * operators can be connected together (in 2 OP modes there is just
|
| 163 | * AM or FM). The 4 OP connection mode is defined by the rightmost
|
| 164 | * bit of the FEEDBACK_CONNECTION (0xC0-0xC8) on the both halves.
|
| 165 | *
|
| 166 | * First half Second half Mode
|
| 167 | *
|
| 168 | * +---+
|
| 169 | * v |
|
| 170 | * 0 0 >+-1-+--2--3--4-->
|
| 171 | *
|
| 172 | *
|
| 173 | *
|
| 174 | * +---+
|
| 175 | * | |
|
| 176 | * 0 1 >+-1-+--2-+
|
| 177 | * |->
|
| 178 | * >--3----4-+
|
| 179 | *
|
| 180 | * +---+
|
| 181 | * | |
|
| 182 | * 1 0 >+-1-+-----+
|
| 183 | * |->
|
| 184 | * >--2--3--4-+
|
| 185 | *
|
| 186 | * +---+
|
| 187 | * | |
|
| 188 | * 1 1 >+-1-+--+
|
| 189 | * |
|
| 190 | * >--2--3-+->
|
| 191 | * |
|
| 192 | * >--4----+
|
| 193 |
|
| 194 | #define OPL3_STEREO_BITS 0x30
|
| 195 | #define OPL3_VOICE_TO_LEFT 0x10
|
| 196 | #define OPL3_VOICE_TO_RIGHT 0x20
|
| 197 |
|
| 198 | |
| 199 |
|
| 200 |
|
| 201 |
|
| 202 | #define OPL3_LEFT 0x0000
|
| 203 | #define OPL3_RIGHT 0x0100
|
| 204 |
|
| 205 | #define OPL3_HW_AUTO 0x0000
|
| 206 | #define OPL3_HW_OPL2 0x0200
|
| 207 | #define OPL3_HW_OPL3 0x0300
|
| 208 | #define OPL3_HW_OPL3_SV 0x0301
|
| 209 | #define OPL3_HW_OPL3_CS 0x0302
|
| 210 | #define OPL3_HW_OPL3_FM801 0x0303
|
| 211 | #define OPL3_HW_OPL3_CS4281 0x0304
|
| 212 | #define OPL3_HW_OPL4 0x0400
|
| 213 | #define OPL3_HW_OPL4_ML 0x0401
|
| 214 | #define OPL3_HW_MASK 0xff00
|
| 215 |
|
| 216 | #define MAX_OPL2_VOICES 9
|
| 217 | #define MAX_OPL3_VOICES 18
|
| 218 |
|
| 219 | struct snd_opl3;
|
| 220 |
|
| 221 | |
| 222 | * Instrument record, aka "Patch"
|
| 223 |
|
| 224 |
|
| 225 |
|
| 226 | struct fm_operator {
|
| 227 | unsigned char am_vib;
|
| 228 | unsigned char ksl_level;
|
| 229 | unsigned char attack_decay;
|
| 230 | unsigned char sustain_release;
|
| 231 | unsigned char wave_select;
|
| 232 | } __packed;
|
| 233 |
|
| 234 |
|
| 235 | struct fm_instrument {
|
| 236 | struct fm_operator op[4];
|
| 237 | unsigned char feedback_connection[2];
|
| 238 | unsigned char echo_delay;
|
| 239 | unsigned char echo_atten;
|
| 240 | unsigned char chorus_spread;
|
| 241 | unsigned char trnsps;
|
| 242 | unsigned char fix_dur;
|
| 243 | unsigned char modes;
|
| 244 | unsigned char fix_key;
|
| 245 | };
|
| 246 |
|
| 247 |
|
| 248 | #define FM_PATCH_OPL2 0x01
|
| 249 | #define FM_PATCH_OPL3 0x02
|
| 250 |
|
| 251 |
|
| 252 | struct fm_patch {
|
| 253 | unsigned char prog;
|
| 254 | unsigned char bank;
|
| 255 | unsigned char type;
|
| 256 | struct fm_instrument inst;
|
| 257 | char name[24];
|
| 258 | struct fm_patch *next;
|
| 259 | };
|
| 260 |
|
| 261 |
|
| 262 | |
| 263 | * A structure to keep track of each hardware voice
|
| 264 |
|
| 265 | struct snd_opl3_voice {
|
| 266 | int state;
|
| 267 | #define SNDRV_OPL3_ST_OFF 0
|
| 268 | #define SNDRV_OPL3_ST_ON_2OP 1
|
| 269 | #define SNDRV_OPL3_ST_ON_4OP 2
|
| 270 | #define SNDRV_OPL3_ST_NOT_AVAIL -1
|
| 271 |
|
| 272 | unsigned int time;
|
| 273 | unsigned char note;
|
| 274 |
|
| 275 | unsigned long note_off;
|
| 276 | int note_off_check;
|
| 277 |
|
| 278 | unsigned char keyon_reg;
|
| 279 |
|
| 280 | struct snd_midi_channel *chan;
|
| 281 | };
|
| 282 |
|
| 283 | struct snd_opl3 {
|
| 284 | unsigned long l_port;
|
| 285 | unsigned long r_port;
|
| 286 | struct resource *res_l_port;
|
| 287 | struct resource *res_r_port;
|
| 288 | unsigned short hardware;
|
| 289 |
|
| 290 | void (*command) (struct snd_opl3 * opl3, unsigned short cmd, unsigned char val);
|
| 291 | unsigned short timer_enable;
|
| 292 | int seq_dev_num;
|
| 293 | struct snd_timer *timer1;
|
| 294 | struct snd_timer *timer2;
|
| 295 | spinlock_t timer_lock;
|
| 296 |
|
| 297 | void *private_data;
|
| 298 | void (*private_free)(struct snd_opl3 *);
|
| 299 |
|
| 300 | struct snd_hwdep *hwdep;
|
| 301 | spinlock_t reg_lock;
|
| 302 | struct snd_card *card;
|
| 303 | unsigned char fm_mode;
|
| 304 | unsigned char rhythm;
|
| 305 | unsigned char max_voices;
|
| 306 | #if IS_ENABLED(CONFIG_SND_SEQUENCER)
|
| 307 | #define SNDRV_OPL3_MODE_SYNTH 0
|
| 308 | #define SNDRV_OPL3_MODE_SEQ 1
|
| 309 | int synth_mode;
|
| 310 | int seq_client;
|
| 311 |
|
| 312 | struct snd_seq_device *seq_dev;
|
| 313 | struct snd_midi_channel_set * chset;
|
| 314 |
|
| 315 | #if IS_ENABLED(CONFIG_SND_SEQUENCER_OSS)
|
| 316 | struct snd_seq_device *oss_seq_dev;
|
| 317 | struct snd_midi_channel_set * oss_chset;
|
| 318 | #endif
|
| 319 |
|
| 320 | #define OPL3_PATCH_HASH_SIZE 32
|
| 321 | struct fm_patch *patch_table[OPL3_PATCH_HASH_SIZE];
|
| 322 |
|
| 323 | struct snd_opl3_voice voices[MAX_OPL3_VOICES];
|
| 324 | int use_time;
|
| 325 |
|
| 326 | unsigned short connection_reg;
|
| 327 | unsigned char drum_reg;
|
| 328 |
|
| 329 | spinlock_t voice_lock;
|
| 330 |
|
| 331 | struct timer_list tlist;
|
| 332 | int sys_timer_status;
|
| 333 | spinlock_t sys_timer_lock;
|
| 334 | #endif
|
| 335 | };
|
| 336 |
|
| 337 |
|
| 338 | void snd_opl3_interrupt(struct snd_hwdep * hw);
|
| 339 | int snd_opl3_new(struct snd_card *card, unsigned short hardware,
|
| 340 | struct snd_opl3 **ropl3);
|
| 341 | int snd_opl3_init(struct snd_opl3 *opl3);
|
| 342 | int snd_opl3_create(struct snd_card *card,
|
| 343 | unsigned long l_port, unsigned long r_port,
|
| 344 | unsigned short hardware,
|
| 345 | int integrated,
|
| 346 | struct snd_opl3 ** opl3);
|
| 347 | int snd_opl3_timer_new(struct snd_opl3 * opl3, int timer1_dev, int timer2_dev);
|
| 348 | int snd_opl3_hwdep_new(struct snd_opl3 * opl3, int device, int seq_device,
|
| 349 | struct snd_hwdep ** rhwdep);
|
| 350 |
|
| 351 |
|
| 352 | int snd_opl3_open(struct snd_hwdep * hw, struct file *file);
|
| 353 | int snd_opl3_ioctl(struct snd_hwdep * hw, struct file *file,
|
| 354 | unsigned int cmd, unsigned long arg);
|
| 355 | int snd_opl3_release(struct snd_hwdep * hw, struct file *file);
|
| 356 |
|
| 357 | void snd_opl3_reset(struct snd_opl3 * opl3);
|
| 358 |
|
| 359 | #if IS_ENABLED(CONFIG_SND_SEQUENCER)
|
| 360 | long snd_opl3_write(struct snd_hwdep *hw, const char __user *buf, long count,
|
| 361 | loff_t *offset);
|
| 362 | int snd_opl3_load_patch(struct snd_opl3 *opl3,
|
| 363 | int prog, int bank, int type,
|
| 364 | const char *name,
|
| 365 | const unsigned char *ext,
|
| 366 | const unsigned char *data);
|
| 367 | struct fm_patch *snd_opl3_find_patch(struct snd_opl3 *opl3, int prog, int bank,
|
| 368 | int create_patch);
|
| 369 | void snd_opl3_clear_patches(struct snd_opl3 *opl3);
|
| 370 | #else
|
| 371 | #define snd_opl3_write NULL
|
| 372 | static inline void snd_opl3_clear_patches(struct snd_opl3 *opl3) {}
|
| 373 | #endif
|
| 374 |
|
| 375 | #endif
|