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1/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB) */
2/*
3 * Copyright (c) 2005 Topspin Communications. All rights reserved.
4 * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
5 * Copyright (c) 2005 PathScale, Inc. All rights reserved.
6 * Copyright (c) 2006 Mellanox Technologies. All rights reserved.
7 *
8 * This software is available to you under a choice of one of two
9 * licenses. You may choose to be licensed under the terms of the GNU
10 * General Public License (GPL) Version 2, available from the file
11 * COPYING in the main directory of this source tree, or the
12 * OpenIB.org BSD license below:
13 *
14 * Redistribution and use in source and binary forms, with or
15 * without modification, are permitted provided that the following
16 * conditions are met:
17 *
18 * - Redistributions of source code must retain the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer.
21 *
22 * - Redistributions in binary form must reproduce the above
23 * copyright notice, this list of conditions and the following
24 * disclaimer in the documentation and/or other materials
25 * provided with the distribution.
26 *
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 * SOFTWARE.
35 */
36
37#ifndef IB_USER_VERBS_H
38#define IB_USER_VERBS_H
39
40#include <linux/types.h>
41
42/*
43 * Increment this value if any changes that break userspace ABI
44 * compatibility are made.
45 */
46#define IB_USER_VERBS_ABI_VERSION 6
47#define IB_USER_VERBS_CMD_THRESHOLD 50
48
49enum ib_uverbs_write_cmds {
50 IB_USER_VERBS_CMD_GET_CONTEXT,
51 IB_USER_VERBS_CMD_QUERY_DEVICE,
52 IB_USER_VERBS_CMD_QUERY_PORT,
53 IB_USER_VERBS_CMD_ALLOC_PD,
54 IB_USER_VERBS_CMD_DEALLOC_PD,
55 IB_USER_VERBS_CMD_CREATE_AH,
56 IB_USER_VERBS_CMD_MODIFY_AH,
57 IB_USER_VERBS_CMD_QUERY_AH,
58 IB_USER_VERBS_CMD_DESTROY_AH,
59 IB_USER_VERBS_CMD_REG_MR,
60 IB_USER_VERBS_CMD_REG_SMR,
61 IB_USER_VERBS_CMD_REREG_MR,
62 IB_USER_VERBS_CMD_QUERY_MR,
63 IB_USER_VERBS_CMD_DEREG_MR,
64 IB_USER_VERBS_CMD_ALLOC_MW,
65 IB_USER_VERBS_CMD_BIND_MW,
66 IB_USER_VERBS_CMD_DEALLOC_MW,
67 IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL,
68 IB_USER_VERBS_CMD_CREATE_CQ,
69 IB_USER_VERBS_CMD_RESIZE_CQ,
70 IB_USER_VERBS_CMD_DESTROY_CQ,
71 IB_USER_VERBS_CMD_POLL_CQ,
72 IB_USER_VERBS_CMD_PEEK_CQ,
73 IB_USER_VERBS_CMD_REQ_NOTIFY_CQ,
74 IB_USER_VERBS_CMD_CREATE_QP,
75 IB_USER_VERBS_CMD_QUERY_QP,
76 IB_USER_VERBS_CMD_MODIFY_QP,
77 IB_USER_VERBS_CMD_DESTROY_QP,
78 IB_USER_VERBS_CMD_POST_SEND,
79 IB_USER_VERBS_CMD_POST_RECV,
80 IB_USER_VERBS_CMD_ATTACH_MCAST,
81 IB_USER_VERBS_CMD_DETACH_MCAST,
82 IB_USER_VERBS_CMD_CREATE_SRQ,
83 IB_USER_VERBS_CMD_MODIFY_SRQ,
84 IB_USER_VERBS_CMD_QUERY_SRQ,
85 IB_USER_VERBS_CMD_DESTROY_SRQ,
86 IB_USER_VERBS_CMD_POST_SRQ_RECV,
87 IB_USER_VERBS_CMD_OPEN_XRCD,
88 IB_USER_VERBS_CMD_CLOSE_XRCD,
89 IB_USER_VERBS_CMD_CREATE_XSRQ,
90 IB_USER_VERBS_CMD_OPEN_QP,
91};
92
93enum {
94 IB_USER_VERBS_EX_CMD_QUERY_DEVICE = IB_USER_VERBS_CMD_QUERY_DEVICE,
95 IB_USER_VERBS_EX_CMD_CREATE_CQ = IB_USER_VERBS_CMD_CREATE_CQ,
96 IB_USER_VERBS_EX_CMD_CREATE_QP = IB_USER_VERBS_CMD_CREATE_QP,
97 IB_USER_VERBS_EX_CMD_MODIFY_QP = IB_USER_VERBS_CMD_MODIFY_QP,
98 IB_USER_VERBS_EX_CMD_CREATE_FLOW = IB_USER_VERBS_CMD_THRESHOLD,
99 IB_USER_VERBS_EX_CMD_DESTROY_FLOW,
100 IB_USER_VERBS_EX_CMD_CREATE_WQ,
101 IB_USER_VERBS_EX_CMD_MODIFY_WQ,
102 IB_USER_VERBS_EX_CMD_DESTROY_WQ,
103 IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL,
104 IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL,
105 IB_USER_VERBS_EX_CMD_MODIFY_CQ
106};
107
108/* see IBA A19.4.1.1 Placement Types */
109enum ib_placement_type {
110 IB_FLUSH_GLOBAL = 1U << 0,
111 IB_FLUSH_PERSISTENT = 1U << 1,
112};
113
114/* see IBA A19.4.1.2 Selectivity Level */
115enum ib_selectivity_level {
116 IB_FLUSH_RANGE = 0,
117 IB_FLUSH_MR,
118};
119
120/*
121 * Make sure that all structs defined in this file remain laid out so
122 * that they pack the same way on 32-bit and 64-bit architectures (to
123 * avoid incompatibility between 32-bit userspace and 64-bit kernels).
124 * Specifically:
125 * - Do not use pointer types -- pass pointers in __u64 instead.
126 * - Make sure that any structure larger than 4 bytes is padded to a
127 * multiple of 8 bytes. Otherwise the structure size will be
128 * different between 32-bit and 64-bit architectures.
129 */
130
131struct ib_uverbs_async_event_desc {
132 __aligned_u64 element;
133 __u32 event_type; /* enum ib_event_type */
134 __u32 reserved;
135};
136
137struct ib_uverbs_comp_event_desc {
138 __aligned_u64 cq_handle;
139};
140
141struct ib_uverbs_cq_moderation_caps {
142 __u16 max_cq_moderation_count;
143 __u16 max_cq_moderation_period;
144 __u32 reserved;
145};
146
147/*
148 * All commands from userspace should start with a __u32 command field
149 * followed by __u16 in_words and out_words fields (which give the
150 * length of the command block and response buffer if any in 32-bit
151 * words). The kernel driver will read these fields first and read
152 * the rest of the command struct based on these value.
153 */
154
155#define IB_USER_VERBS_CMD_COMMAND_MASK 0xff
156#define IB_USER_VERBS_CMD_FLAG_EXTENDED 0x80000000u
157
158struct ib_uverbs_cmd_hdr {
159 __u32 command;
160 __u16 in_words;
161 __u16 out_words;
162};
163
164struct ib_uverbs_ex_cmd_hdr {
165 __aligned_u64 response;
166 __u16 provider_in_words;
167 __u16 provider_out_words;
168 __u32 cmd_hdr_reserved;
169};
170
171struct ib_uverbs_get_context {
172 __aligned_u64 response;
173 __aligned_u64 driver_data[];
174};
175
176struct ib_uverbs_get_context_resp {
177 __u32 async_fd;
178 __u32 num_comp_vectors;
179 __aligned_u64 driver_data[];
180};
181
182struct ib_uverbs_query_device {
183 __aligned_u64 response;
184 __aligned_u64 driver_data[];
185};
186
187struct ib_uverbs_query_device_resp {
188 __aligned_u64 fw_ver;
189 __be64 node_guid;
190 __be64 sys_image_guid;
191 __aligned_u64 max_mr_size;
192 __aligned_u64 page_size_cap;
193 __u32 vendor_id;
194 __u32 vendor_part_id;
195 __u32 hw_ver;
196 __u32 max_qp;
197 __u32 max_qp_wr;
198 __u32 device_cap_flags;
199 __u32 max_sge;
200 __u32 max_sge_rd;
201 __u32 max_cq;
202 __u32 max_cqe;
203 __u32 max_mr;
204 __u32 max_pd;
205 __u32 max_qp_rd_atom;
206 __u32 max_ee_rd_atom;
207 __u32 max_res_rd_atom;
208 __u32 max_qp_init_rd_atom;
209 __u32 max_ee_init_rd_atom;
210 __u32 atomic_cap;
211 __u32 max_ee;
212 __u32 max_rdd;
213 __u32 max_mw;
214 __u32 max_raw_ipv6_qp;
215 __u32 max_raw_ethy_qp;
216 __u32 max_mcast_grp;
217 __u32 max_mcast_qp_attach;
218 __u32 max_total_mcast_qp_attach;
219 __u32 max_ah;
220 __u32 max_fmr;
221 __u32 max_map_per_fmr;
222 __u32 max_srq;
223 __u32 max_srq_wr;
224 __u32 max_srq_sge;
225 __u16 max_pkeys;
226 __u8 local_ca_ack_delay;
227 __u8 phys_port_cnt;
228 __u8 reserved[4];
229};
230
231struct ib_uverbs_ex_query_device {
232 __u32 comp_mask;
233 __u32 reserved;
234};
235
236enum ib_uverbs_odp_general_cap_bits {
237 IB_UVERBS_ODP_SUPPORT = 1 << 0,
238 IB_UVERBS_ODP_SUPPORT_IMPLICIT = 1 << 1,
239};
240
241enum ib_uverbs_odp_transport_cap_bits {
242 IB_UVERBS_ODP_SUPPORT_SEND = 1 << 0,
243 IB_UVERBS_ODP_SUPPORT_RECV = 1 << 1,
244 IB_UVERBS_ODP_SUPPORT_WRITE = 1 << 2,
245 IB_UVERBS_ODP_SUPPORT_READ = 1 << 3,
246 IB_UVERBS_ODP_SUPPORT_ATOMIC = 1 << 4,
247 IB_UVERBS_ODP_SUPPORT_SRQ_RECV = 1 << 5,
248 IB_UVERBS_ODP_SUPPORT_FLUSH = 1 << 6,
249 IB_UVERBS_ODP_SUPPORT_ATOMIC_WRITE = 1 << 7,
250};
251
252struct ib_uverbs_odp_caps {
253 __aligned_u64 general_caps;
254 struct {
255 __u32 rc_odp_caps;
256 __u32 uc_odp_caps;
257 __u32 ud_odp_caps;
258 } per_transport_caps;
259 __u32 reserved;
260};
261
262struct ib_uverbs_rss_caps {
263 /* Corresponding bit will be set if qp type from
264 * 'enum ib_qp_type' is supported, e.g.
265 * supported_qpts |= 1 << IB_QPT_UD
266 */
267 __u32 supported_qpts;
268 __u32 max_rwq_indirection_tables;
269 __u32 max_rwq_indirection_table_size;
270 __u32 reserved;
271};
272
273struct ib_uverbs_tm_caps {
274 /* Max size of rendezvous request message */
275 __u32 max_rndv_hdr_size;
276 /* Max number of entries in tag matching list */
277 __u32 max_num_tags;
278 /* TM flags */
279 __u32 flags;
280 /* Max number of outstanding list operations */
281 __u32 max_ops;
282 /* Max number of SGE in tag matching entry */
283 __u32 max_sge;
284 __u32 reserved;
285};
286
287struct ib_uverbs_ex_query_device_resp {
288 struct ib_uverbs_query_device_resp base;
289 __u32 comp_mask;
290 __u32 response_length;
291 struct ib_uverbs_odp_caps odp_caps;
292 __aligned_u64 timestamp_mask;
293 __aligned_u64 hca_core_clock; /* in KHZ */
294 __aligned_u64 device_cap_flags_ex;
295 struct ib_uverbs_rss_caps rss_caps;
296 __u32 max_wq_type_rq;
297 __u32 raw_packet_caps;
298 struct ib_uverbs_tm_caps tm_caps;
299 struct ib_uverbs_cq_moderation_caps cq_moderation_caps;
300 __aligned_u64 max_dm_size;
301 __u32 xrc_odp_caps;
302 __u32 reserved;
303};
304
305struct ib_uverbs_query_port {
306 __aligned_u64 response;
307 __u8 port_num;
308 __u8 reserved[7];
309 __aligned_u64 driver_data[];
310};
311
312struct ib_uverbs_query_port_resp {
313 __u32 port_cap_flags; /* see ib_uverbs_query_port_cap_flags */
314 __u32 max_msg_sz;
315 __u32 bad_pkey_cntr;
316 __u32 qkey_viol_cntr;
317 __u32 gid_tbl_len;
318 __u16 pkey_tbl_len;
319 __u16 lid;
320 __u16 sm_lid;
321 __u8 state;
322 __u8 max_mtu;
323 __u8 active_mtu;
324 __u8 lmc;
325 __u8 max_vl_num;
326 __u8 sm_sl;
327 __u8 subnet_timeout;
328 __u8 init_type_reply;
329 __u8 active_width;
330 __u8 active_speed;
331 __u8 phys_state;
332 __u8 link_layer;
333 __u8 flags; /* see ib_uverbs_query_port_flags */
334 __u8 reserved;
335};
336
337struct ib_uverbs_alloc_pd {
338 __aligned_u64 response;
339 __aligned_u64 driver_data[];
340};
341
342struct ib_uverbs_alloc_pd_resp {
343 __u32 pd_handle;
344 __u32 driver_data[];
345};
346
347struct ib_uverbs_dealloc_pd {
348 __u32 pd_handle;
349};
350
351struct ib_uverbs_open_xrcd {
352 __aligned_u64 response;
353 __u32 fd;
354 __u32 oflags;
355 __aligned_u64 driver_data[];
356};
357
358struct ib_uverbs_open_xrcd_resp {
359 __u32 xrcd_handle;
360 __u32 driver_data[];
361};
362
363struct ib_uverbs_close_xrcd {
364 __u32 xrcd_handle;
365};
366
367struct ib_uverbs_reg_mr {
368 __aligned_u64 response;
369 __aligned_u64 start;
370 __aligned_u64 length;
371 __aligned_u64 hca_va;
372 __u32 pd_handle;
373 __u32 access_flags;
374 __aligned_u64 driver_data[];
375};
376
377struct ib_uverbs_reg_mr_resp {
378 __u32 mr_handle;
379 __u32 lkey;
380 __u32 rkey;
381 __u32 driver_data[];
382};
383
384struct ib_uverbs_rereg_mr {
385 __aligned_u64 response;
386 __u32 mr_handle;
387 __u32 flags;
388 __aligned_u64 start;
389 __aligned_u64 length;
390 __aligned_u64 hca_va;
391 __u32 pd_handle;
392 __u32 access_flags;
393 __aligned_u64 driver_data[];
394};
395
396struct ib_uverbs_rereg_mr_resp {
397 __u32 lkey;
398 __u32 rkey;
399 __aligned_u64 driver_data[];
400};
401
402struct ib_uverbs_dereg_mr {
403 __u32 mr_handle;
404};
405
406struct ib_uverbs_alloc_mw {
407 __aligned_u64 response;
408 __u32 pd_handle;
409 __u8 mw_type;
410 __u8 reserved[3];
411 __aligned_u64 driver_data[];
412};
413
414struct ib_uverbs_alloc_mw_resp {
415 __u32 mw_handle;
416 __u32 rkey;
417 __aligned_u64 driver_data[];
418};
419
420struct ib_uverbs_dealloc_mw {
421 __u32 mw_handle;
422};
423
424struct ib_uverbs_create_comp_channel {
425 __aligned_u64 response;
426};
427
428struct ib_uverbs_create_comp_channel_resp {
429 __u32 fd;
430};
431
432struct ib_uverbs_create_cq {
433 __aligned_u64 response;
434 __aligned_u64 user_handle;
435 __u32 cqe;
436 __u32 comp_vector;
437 __s32 comp_channel;
438 __u32 reserved;
439 __aligned_u64 driver_data[];
440};
441
442enum ib_uverbs_ex_create_cq_flags {
443 IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION = 1 << 0,
444 IB_UVERBS_CQ_FLAGS_IGNORE_OVERRUN = 1 << 1,
445};
446
447struct ib_uverbs_ex_create_cq {
448 __aligned_u64 user_handle;
449 __u32 cqe;
450 __u32 comp_vector;
451 __s32 comp_channel;
452 __u32 comp_mask;
453 __u32 flags; /* bitmask of ib_uverbs_ex_create_cq_flags */
454 __u32 reserved;
455};
456
457struct ib_uverbs_create_cq_resp {
458 __u32 cq_handle;
459 __u32 cqe;
460 __aligned_u64 driver_data[0];
461};
462
463struct ib_uverbs_ex_create_cq_resp {
464 struct ib_uverbs_create_cq_resp base;
465 __u32 comp_mask;
466 __u32 response_length;
467};
468
469struct ib_uverbs_resize_cq {
470 __aligned_u64 response;
471 __u32 cq_handle;
472 __u32 cqe;
473 __aligned_u64 driver_data[];
474};
475
476struct ib_uverbs_resize_cq_resp {
477 __u32 cqe;
478 __u32 reserved;
479 __aligned_u64 driver_data[];
480};
481
482struct ib_uverbs_poll_cq {
483 __aligned_u64 response;
484 __u32 cq_handle;
485 __u32 ne;
486};
487
488enum ib_uverbs_wc_opcode {
489 IB_UVERBS_WC_SEND = 0,
490 IB_UVERBS_WC_RDMA_WRITE = 1,
491 IB_UVERBS_WC_RDMA_READ = 2,
492 IB_UVERBS_WC_COMP_SWAP = 3,
493 IB_UVERBS_WC_FETCH_ADD = 4,
494 IB_UVERBS_WC_BIND_MW = 5,
495 IB_UVERBS_WC_LOCAL_INV = 6,
496 IB_UVERBS_WC_TSO = 7,
497 IB_UVERBS_WC_FLUSH = 8,
498 IB_UVERBS_WC_ATOMIC_WRITE = 9,
499};
500
501struct ib_uverbs_wc {
502 __aligned_u64 wr_id;
503 __u32 status;
504 __u32 opcode;
505 __u32 vendor_err;
506 __u32 byte_len;
507 union {
508 __be32 imm_data;
509 __u32 invalidate_rkey;
510 } ex;
511 __u32 qp_num;
512 __u32 src_qp;
513 __u32 wc_flags;
514 __u16 pkey_index;
515 __u16 slid;
516 __u8 sl;
517 __u8 dlid_path_bits;
518 __u8 port_num;
519 __u8 reserved;
520};
521
522struct ib_uverbs_poll_cq_resp {
523 __u32 count;
524 __u32 reserved;
525 struct ib_uverbs_wc wc[];
526};
527
528struct ib_uverbs_req_notify_cq {
529 __u32 cq_handle;
530 __u32 solicited_only;
531};
532
533struct ib_uverbs_destroy_cq {
534 __aligned_u64 response;
535 __u32 cq_handle;
536 __u32 reserved;
537};
538
539struct ib_uverbs_destroy_cq_resp {
540 __u32 comp_events_reported;
541 __u32 async_events_reported;
542};
543
544struct ib_uverbs_global_route {
545 __u8 dgid[16];
546 __u32 flow_label;
547 __u8 sgid_index;
548 __u8 hop_limit;
549 __u8 traffic_class;
550 __u8 reserved;
551};
552
553struct ib_uverbs_ah_attr {
554 struct ib_uverbs_global_route grh;
555 __u16 dlid;
556 __u8 sl;
557 __u8 src_path_bits;
558 __u8 static_rate;
559 __u8 is_global;
560 __u8 port_num;
561 __u8 reserved;
562};
563
564struct ib_uverbs_qp_attr {
565 __u32 qp_attr_mask;
566 __u32 qp_state;
567 __u32 cur_qp_state;
568 __u32 path_mtu;
569 __u32 path_mig_state;
570 __u32 qkey;
571 __u32 rq_psn;
572 __u32 sq_psn;
573 __u32 dest_qp_num;
574 __u32 qp_access_flags;
575
576 struct ib_uverbs_ah_attr ah_attr;
577 struct ib_uverbs_ah_attr alt_ah_attr;
578
579 /* ib_qp_cap */
580 __u32 max_send_wr;
581 __u32 max_recv_wr;
582 __u32 max_send_sge;
583 __u32 max_recv_sge;
584 __u32 max_inline_data;
585
586 __u16 pkey_index;
587 __u16 alt_pkey_index;
588 __u8 en_sqd_async_notify;
589 __u8 sq_draining;
590 __u8 max_rd_atomic;
591 __u8 max_dest_rd_atomic;
592 __u8 min_rnr_timer;
593 __u8 port_num;
594 __u8 timeout;
595 __u8 retry_cnt;
596 __u8 rnr_retry;
597 __u8 alt_port_num;
598 __u8 alt_timeout;
599 __u8 reserved[5];
600};
601
602struct ib_uverbs_create_qp {
603 __aligned_u64 response;
604 __aligned_u64 user_handle;
605 __u32 pd_handle;
606 __u32 send_cq_handle;
607 __u32 recv_cq_handle;
608 __u32 srq_handle;
609 __u32 max_send_wr;
610 __u32 max_recv_wr;
611 __u32 max_send_sge;
612 __u32 max_recv_sge;
613 __u32 max_inline_data;
614 __u8 sq_sig_all;
615 __u8 qp_type;
616 __u8 is_srq;
617 __u8 reserved;
618 __aligned_u64 driver_data[];
619};
620
621enum ib_uverbs_create_qp_mask {
622 IB_UVERBS_CREATE_QP_MASK_IND_TABLE = 1UL << 0,
623};
624
625enum {
626 IB_UVERBS_CREATE_QP_SUP_COMP_MASK = IB_UVERBS_CREATE_QP_MASK_IND_TABLE,
627};
628
629struct ib_uverbs_ex_create_qp {
630 __aligned_u64 user_handle;
631 __u32 pd_handle;
632 __u32 send_cq_handle;
633 __u32 recv_cq_handle;
634 __u32 srq_handle;
635 __u32 max_send_wr;
636 __u32 max_recv_wr;
637 __u32 max_send_sge;
638 __u32 max_recv_sge;
639 __u32 max_inline_data;
640 __u8 sq_sig_all;
641 __u8 qp_type;
642 __u8 is_srq;
643 __u8 reserved;
644 __u32 comp_mask;
645 __u32 create_flags;
646 __u32 rwq_ind_tbl_handle;
647 __u32 source_qpn;
648};
649
650struct ib_uverbs_open_qp {
651 __aligned_u64 response;
652 __aligned_u64 user_handle;
653 __u32 pd_handle;
654 __u32 qpn;
655 __u8 qp_type;
656 __u8 reserved[7];
657 __aligned_u64 driver_data[];
658};
659
660/* also used for open response */
661struct ib_uverbs_create_qp_resp {
662 __u32 qp_handle;
663 __u32 qpn;
664 __u32 max_send_wr;
665 __u32 max_recv_wr;
666 __u32 max_send_sge;
667 __u32 max_recv_sge;
668 __u32 max_inline_data;
669 __u32 reserved;
670 __u32 driver_data[0];
671};
672
673struct ib_uverbs_ex_create_qp_resp {
674 struct ib_uverbs_create_qp_resp base;
675 __u32 comp_mask;
676 __u32 response_length;
677};
678
679/*
680 * This struct needs to remain a multiple of 8 bytes to keep the
681 * alignment of the modify QP parameters.
682 */
683struct ib_uverbs_qp_dest {
684 __u8 dgid[16];
685 __u32 flow_label;
686 __u16 dlid;
687 __u16 reserved;
688 __u8 sgid_index;
689 __u8 hop_limit;
690 __u8 traffic_class;
691 __u8 sl;
692 __u8 src_path_bits;
693 __u8 static_rate;
694 __u8 is_global;
695 __u8 port_num;
696};
697
698struct ib_uverbs_query_qp {
699 __aligned_u64 response;
700 __u32 qp_handle;
701 __u32 attr_mask;
702 __aligned_u64 driver_data[];
703};
704
705struct ib_uverbs_query_qp_resp {
706 struct ib_uverbs_qp_dest dest;
707 struct ib_uverbs_qp_dest alt_dest;
708 __u32 max_send_wr;
709 __u32 max_recv_wr;
710 __u32 max_send_sge;
711 __u32 max_recv_sge;
712 __u32 max_inline_data;
713 __u32 qkey;
714 __u32 rq_psn;
715 __u32 sq_psn;
716 __u32 dest_qp_num;
717 __u32 qp_access_flags;
718 __u16 pkey_index;
719 __u16 alt_pkey_index;
720 __u8 qp_state;
721 __u8 cur_qp_state;
722 __u8 path_mtu;
723 __u8 path_mig_state;
724 __u8 sq_draining;
725 __u8 max_rd_atomic;
726 __u8 max_dest_rd_atomic;
727 __u8 min_rnr_timer;
728 __u8 port_num;
729 __u8 timeout;
730 __u8 retry_cnt;
731 __u8 rnr_retry;
732 __u8 alt_port_num;
733 __u8 alt_timeout;
734 __u8 sq_sig_all;
735 __u8 reserved[5];
736 __aligned_u64 driver_data[];
737};
738
739struct ib_uverbs_modify_qp {
740 struct ib_uverbs_qp_dest dest;
741 struct ib_uverbs_qp_dest alt_dest;
742 __u32 qp_handle;
743 __u32 attr_mask;
744 __u32 qkey;
745 __u32 rq_psn;
746 __u32 sq_psn;
747 __u32 dest_qp_num;
748 __u32 qp_access_flags;
749 __u16 pkey_index;
750 __u16 alt_pkey_index;
751 __u8 qp_state;
752 __u8 cur_qp_state;
753 __u8 path_mtu;
754 __u8 path_mig_state;
755 __u8 en_sqd_async_notify;
756 __u8 max_rd_atomic;
757 __u8 max_dest_rd_atomic;
758 __u8 min_rnr_timer;
759 __u8 port_num;
760 __u8 timeout;
761 __u8 retry_cnt;
762 __u8 rnr_retry;
763 __u8 alt_port_num;
764 __u8 alt_timeout;
765 __u8 reserved[2];
766 __aligned_u64 driver_data[0];
767};
768
769struct ib_uverbs_ex_modify_qp {
770 struct ib_uverbs_modify_qp base;
771 __u32 rate_limit;
772 __u32 reserved;
773};
774
775struct ib_uverbs_ex_modify_qp_resp {
776 __u32 comp_mask;
777 __u32 response_length;
778};
779
780struct ib_uverbs_destroy_qp {
781 __aligned_u64 response;
782 __u32 qp_handle;
783 __u32 reserved;
784};
785
786struct ib_uverbs_destroy_qp_resp {
787 __u32 events_reported;
788};
789
790/*
791 * The ib_uverbs_sge structure isn't used anywhere, since we assume
792 * the ib_sge structure is packed the same way on 32-bit and 64-bit
793 * architectures in both kernel and user space. It's just here to
794 * document the ABI.
795 */
796struct ib_uverbs_sge {
797 __aligned_u64 addr;
798 __u32 length;
799 __u32 lkey;
800};
801
802enum ib_uverbs_wr_opcode {
803 IB_UVERBS_WR_RDMA_WRITE = 0,
804 IB_UVERBS_WR_RDMA_WRITE_WITH_IMM = 1,
805 IB_UVERBS_WR_SEND = 2,
806 IB_UVERBS_WR_SEND_WITH_IMM = 3,
807 IB_UVERBS_WR_RDMA_READ = 4,
808 IB_UVERBS_WR_ATOMIC_CMP_AND_SWP = 5,
809 IB_UVERBS_WR_ATOMIC_FETCH_AND_ADD = 6,
810 IB_UVERBS_WR_LOCAL_INV = 7,
811 IB_UVERBS_WR_BIND_MW = 8,
812 IB_UVERBS_WR_SEND_WITH_INV = 9,
813 IB_UVERBS_WR_TSO = 10,
814 IB_UVERBS_WR_RDMA_READ_WITH_INV = 11,
815 IB_UVERBS_WR_MASKED_ATOMIC_CMP_AND_SWP = 12,
816 IB_UVERBS_WR_MASKED_ATOMIC_FETCH_AND_ADD = 13,
817 IB_UVERBS_WR_FLUSH = 14,
818 IB_UVERBS_WR_ATOMIC_WRITE = 15,
819 /* Review enum ib_wr_opcode before modifying this */
820};
821
822struct ib_uverbs_send_wr {
823 __aligned_u64 wr_id;
824 __u32 num_sge;
825 __u32 opcode; /* see enum ib_uverbs_wr_opcode */
826 __u32 send_flags;
827 union {
828 __be32 imm_data;
829 __u32 invalidate_rkey;
830 } ex;
831 union {
832 struct {
833 __aligned_u64 remote_addr;
834 __u32 rkey;
835 __u32 reserved;
836 } rdma;
837 struct {
838 __aligned_u64 remote_addr;
839 __aligned_u64 compare_add;
840 __aligned_u64 swap;
841 __u32 rkey;
842 __u32 reserved;
843 } atomic;
844 struct {
845 __u32 ah;
846 __u32 remote_qpn;
847 __u32 remote_qkey;
848 __u32 reserved;
849 } ud;
850 } wr;
851};
852
853struct ib_uverbs_post_send {
854 __aligned_u64 response;
855 __u32 qp_handle;
856 __u32 wr_count;
857 __u32 sge_count;
858 __u32 wqe_size;
859 struct ib_uverbs_send_wr send_wr[];
860};
861
862struct ib_uverbs_post_send_resp {
863 __u32 bad_wr;
864};
865
866struct ib_uverbs_recv_wr {
867 __aligned_u64 wr_id;
868 __u32 num_sge;
869 __u32 reserved;
870};
871
872struct ib_uverbs_post_recv {
873 __aligned_u64 response;
874 __u32 qp_handle;
875 __u32 wr_count;
876 __u32 sge_count;
877 __u32 wqe_size;
878 struct ib_uverbs_recv_wr recv_wr[];
879};
880
881struct ib_uverbs_post_recv_resp {
882 __u32 bad_wr;
883};
884
885struct ib_uverbs_post_srq_recv {
886 __aligned_u64 response;
887 __u32 srq_handle;
888 __u32 wr_count;
889 __u32 sge_count;
890 __u32 wqe_size;
891 struct ib_uverbs_recv_wr recv[];
892};
893
894struct ib_uverbs_post_srq_recv_resp {
895 __u32 bad_wr;
896};
897
898struct ib_uverbs_create_ah {
899 __aligned_u64 response;
900 __aligned_u64 user_handle;
901 __u32 pd_handle;
902 __u32 reserved;
903 struct ib_uverbs_ah_attr attr;
904 __aligned_u64 driver_data[];
905};
906
907struct ib_uverbs_create_ah_resp {
908 __u32 ah_handle;
909 __u32 driver_data[];
910};
911
912struct ib_uverbs_destroy_ah {
913 __u32 ah_handle;
914};
915
916struct ib_uverbs_attach_mcast {
917 __u8 gid[16];
918 __u32 qp_handle;
919 __u16 mlid;
920 __u16 reserved;
921 __aligned_u64 driver_data[];
922};
923
924struct ib_uverbs_detach_mcast {
925 __u8 gid[16];
926 __u32 qp_handle;
927 __u16 mlid;
928 __u16 reserved;
929 __aligned_u64 driver_data[];
930};
931
932struct ib_uverbs_flow_spec_hdr {
933 __u32 type;
934 __u16 size;
935 __u16 reserved;
936 /* followed by flow_spec */
937 __aligned_u64 flow_spec_data[0];
938};
939
940struct ib_uverbs_flow_eth_filter {
941 __u8 dst_mac[6];
942 __u8 src_mac[6];
943 __be16 ether_type;
944 __be16 vlan_tag;
945};
946
947struct ib_uverbs_flow_spec_eth {
948 union {
949 struct ib_uverbs_flow_spec_hdr hdr;
950 struct {
951 __u32 type;
952 __u16 size;
953 __u16 reserved;
954 };
955 };
956 struct ib_uverbs_flow_eth_filter val;
957 struct ib_uverbs_flow_eth_filter mask;
958};
959
960struct ib_uverbs_flow_ipv4_filter {
961 __be32 src_ip;
962 __be32 dst_ip;
963 __u8 proto;
964 __u8 tos;
965 __u8 ttl;
966 __u8 flags;
967};
968
969struct ib_uverbs_flow_spec_ipv4 {
970 union {
971 struct ib_uverbs_flow_spec_hdr hdr;
972 struct {
973 __u32 type;
974 __u16 size;
975 __u16 reserved;
976 };
977 };
978 struct ib_uverbs_flow_ipv4_filter val;
979 struct ib_uverbs_flow_ipv4_filter mask;
980};
981
982struct ib_uverbs_flow_tcp_udp_filter {
983 __be16 dst_port;
984 __be16 src_port;
985};
986
987struct ib_uverbs_flow_spec_tcp_udp {
988 union {
989 struct ib_uverbs_flow_spec_hdr hdr;
990 struct {
991 __u32 type;
992 __u16 size;
993 __u16 reserved;
994 };
995 };
996 struct ib_uverbs_flow_tcp_udp_filter val;
997 struct ib_uverbs_flow_tcp_udp_filter mask;
998};
999
1000struct ib_uverbs_flow_ipv6_filter {
1001 __u8 src_ip[16];
1002 __u8 dst_ip[16];
1003 __be32 flow_label;
1004 __u8 next_hdr;
1005 __u8 traffic_class;
1006 __u8 hop_limit;
1007 __u8 reserved;
1008};
1009
1010struct ib_uverbs_flow_spec_ipv6 {
1011 union {
1012 struct ib_uverbs_flow_spec_hdr hdr;
1013 struct {
1014 __u32 type;
1015 __u16 size;
1016 __u16 reserved;
1017 };
1018 };
1019 struct ib_uverbs_flow_ipv6_filter val;
1020 struct ib_uverbs_flow_ipv6_filter mask;
1021};
1022
1023struct ib_uverbs_flow_spec_action_tag {
1024 union {
1025 struct ib_uverbs_flow_spec_hdr hdr;
1026 struct {
1027 __u32 type;
1028 __u16 size;
1029 __u16 reserved;
1030 };
1031 };
1032 __u32 tag_id;
1033 __u32 reserved1;
1034};
1035
1036struct ib_uverbs_flow_spec_action_drop {
1037 union {
1038 struct ib_uverbs_flow_spec_hdr hdr;
1039 struct {
1040 __u32 type;
1041 __u16 size;
1042 __u16 reserved;
1043 };
1044 };
1045};
1046
1047struct ib_uverbs_flow_spec_action_handle {
1048 union {
1049 struct ib_uverbs_flow_spec_hdr hdr;
1050 struct {
1051 __u32 type;
1052 __u16 size;
1053 __u16 reserved;
1054 };
1055 };
1056 __u32 handle;
1057 __u32 reserved1;
1058};
1059
1060struct ib_uverbs_flow_spec_action_count {
1061 union {
1062 struct ib_uverbs_flow_spec_hdr hdr;
1063 struct {
1064 __u32 type;
1065 __u16 size;
1066 __u16 reserved;
1067 };
1068 };
1069 __u32 handle;
1070 __u32 reserved1;
1071};
1072
1073struct ib_uverbs_flow_tunnel_filter {
1074 __be32 tunnel_id;
1075};
1076
1077struct ib_uverbs_flow_spec_tunnel {
1078 union {
1079 struct ib_uverbs_flow_spec_hdr hdr;
1080 struct {
1081 __u32 type;
1082 __u16 size;
1083 __u16 reserved;
1084 };
1085 };
1086 struct ib_uverbs_flow_tunnel_filter val;
1087 struct ib_uverbs_flow_tunnel_filter mask;
1088};
1089
1090struct ib_uverbs_flow_spec_esp_filter {
1091 __u32 spi;
1092 __u32 seq;
1093};
1094
1095struct ib_uverbs_flow_spec_esp {
1096 union {
1097 struct ib_uverbs_flow_spec_hdr hdr;
1098 struct {
1099 __u32 type;
1100 __u16 size;
1101 __u16 reserved;
1102 };
1103 };
1104 struct ib_uverbs_flow_spec_esp_filter val;
1105 struct ib_uverbs_flow_spec_esp_filter mask;
1106};
1107
1108struct ib_uverbs_flow_gre_filter {
1109 /* c_ks_res0_ver field is bits 0-15 in offset 0 of a standard GRE header:
1110 * bit 0 - C - checksum bit.
1111 * bit 1 - reserved. set to 0.
1112 * bit 2 - key bit.
1113 * bit 3 - sequence number bit.
1114 * bits 4:12 - reserved. set to 0.
1115 * bits 13:15 - GRE version.
1116 */
1117 __be16 c_ks_res0_ver;
1118 __be16 protocol;
1119 __be32 key;
1120};
1121
1122struct ib_uverbs_flow_spec_gre {
1123 union {
1124 struct ib_uverbs_flow_spec_hdr hdr;
1125 struct {
1126 __u32 type;
1127 __u16 size;
1128 __u16 reserved;
1129 };
1130 };
1131 struct ib_uverbs_flow_gre_filter val;
1132 struct ib_uverbs_flow_gre_filter mask;
1133};
1134
1135struct ib_uverbs_flow_mpls_filter {
1136 /* The field includes the entire MPLS label:
1137 * bits 0:19 - label field.
1138 * bits 20:22 - traffic class field.
1139 * bits 23 - bottom of stack bit.
1140 * bits 24:31 - ttl field.
1141 */
1142 __be32 label;
1143};
1144
1145struct ib_uverbs_flow_spec_mpls {
1146 union {
1147 struct ib_uverbs_flow_spec_hdr hdr;
1148 struct {
1149 __u32 type;
1150 __u16 size;
1151 __u16 reserved;
1152 };
1153 };
1154 struct ib_uverbs_flow_mpls_filter val;
1155 struct ib_uverbs_flow_mpls_filter mask;
1156};
1157
1158struct ib_uverbs_flow_attr {
1159 __u32 type;
1160 __u16 size;
1161 __u16 priority;
1162 __u8 num_of_specs;
1163 __u8 reserved[2];
1164 __u8 port;
1165 __u32 flags;
1166 /* Following are the optional layers according to user request
1167 * struct ib_flow_spec_xxx
1168 * struct ib_flow_spec_yyy
1169 */
1170 struct ib_uverbs_flow_spec_hdr flow_specs[];
1171};
1172
1173struct ib_uverbs_create_flow {
1174 __u32 comp_mask;
1175 __u32 qp_handle;
1176 struct ib_uverbs_flow_attr flow_attr;
1177};
1178
1179struct ib_uverbs_create_flow_resp {
1180 __u32 comp_mask;
1181 __u32 flow_handle;
1182};
1183
1184struct ib_uverbs_destroy_flow {
1185 __u32 comp_mask;
1186 __u32 flow_handle;
1187};
1188
1189struct ib_uverbs_create_srq {
1190 __aligned_u64 response;
1191 __aligned_u64 user_handle;
1192 __u32 pd_handle;
1193 __u32 max_wr;
1194 __u32 max_sge;
1195 __u32 srq_limit;
1196 __aligned_u64 driver_data[];
1197};
1198
1199struct ib_uverbs_create_xsrq {
1200 __aligned_u64 response;
1201 __aligned_u64 user_handle;
1202 __u32 srq_type;
1203 __u32 pd_handle;
1204 __u32 max_wr;
1205 __u32 max_sge;
1206 __u32 srq_limit;
1207 __u32 max_num_tags;
1208 __u32 xrcd_handle;
1209 __u32 cq_handle;
1210 __aligned_u64 driver_data[];
1211};
1212
1213struct ib_uverbs_create_srq_resp {
1214 __u32 srq_handle;
1215 __u32 max_wr;
1216 __u32 max_sge;
1217 __u32 srqn;
1218 __u32 driver_data[];
1219};
1220
1221struct ib_uverbs_modify_srq {
1222 __u32 srq_handle;
1223 __u32 attr_mask;
1224 __u32 max_wr;
1225 __u32 srq_limit;
1226 __aligned_u64 driver_data[];
1227};
1228
1229struct ib_uverbs_query_srq {
1230 __aligned_u64 response;
1231 __u32 srq_handle;
1232 __u32 reserved;
1233 __aligned_u64 driver_data[];
1234};
1235
1236struct ib_uverbs_query_srq_resp {
1237 __u32 max_wr;
1238 __u32 max_sge;
1239 __u32 srq_limit;
1240 __u32 reserved;
1241};
1242
1243struct ib_uverbs_destroy_srq {
1244 __aligned_u64 response;
1245 __u32 srq_handle;
1246 __u32 reserved;
1247};
1248
1249struct ib_uverbs_destroy_srq_resp {
1250 __u32 events_reported;
1251};
1252
1253struct ib_uverbs_ex_create_wq {
1254 __u32 comp_mask;
1255 __u32 wq_type;
1256 __aligned_u64 user_handle;
1257 __u32 pd_handle;
1258 __u32 cq_handle;
1259 __u32 max_wr;
1260 __u32 max_sge;
1261 __u32 create_flags; /* Use enum ib_wq_flags */
1262 __u32 reserved;
1263};
1264
1265struct ib_uverbs_ex_create_wq_resp {
1266 __u32 comp_mask;
1267 __u32 response_length;
1268 __u32 wq_handle;
1269 __u32 max_wr;
1270 __u32 max_sge;
1271 __u32 wqn;
1272};
1273
1274struct ib_uverbs_ex_destroy_wq {
1275 __u32 comp_mask;
1276 __u32 wq_handle;
1277};
1278
1279struct ib_uverbs_ex_destroy_wq_resp {
1280 __u32 comp_mask;
1281 __u32 response_length;
1282 __u32 events_reported;
1283 __u32 reserved;
1284};
1285
1286struct ib_uverbs_ex_modify_wq {
1287 __u32 attr_mask;
1288 __u32 wq_handle;
1289 __u32 wq_state;
1290 __u32 curr_wq_state;
1291 __u32 flags; /* Use enum ib_wq_flags */
1292 __u32 flags_mask; /* Use enum ib_wq_flags */
1293};
1294
1295/* Prevent memory allocation rather than max expected size */
1296#define IB_USER_VERBS_MAX_LOG_IND_TBL_SIZE 0x0d
1297struct ib_uverbs_ex_create_rwq_ind_table {
1298 __u32 comp_mask;
1299 __u32 log_ind_tbl_size;
1300 /* Following are the wq handles according to log_ind_tbl_size
1301 * wq_handle1
1302 * wq_handle2
1303 */
1304 __u32 wq_handles[];
1305};
1306
1307struct ib_uverbs_ex_create_rwq_ind_table_resp {
1308 __u32 comp_mask;
1309 __u32 response_length;
1310 __u32 ind_tbl_handle;
1311 __u32 ind_tbl_num;
1312};
1313
1314struct ib_uverbs_ex_destroy_rwq_ind_table {
1315 __u32 comp_mask;
1316 __u32 ind_tbl_handle;
1317};
1318
1319struct ib_uverbs_cq_moderation {
1320 __u16 cq_count;
1321 __u16 cq_period;
1322};
1323
1324struct ib_uverbs_ex_modify_cq {
1325 __u32 cq_handle;
1326 __u32 attr_mask;
1327 struct ib_uverbs_cq_moderation attr;
1328 __u32 reserved;
1329};
1330
1331#define IB_DEVICE_NAME_MAX 64
1332
1333/*
1334 * bits 9, 15, 16, 19, 22, 27, 30, 31, 32, 33, 35 and 37 may be set by old
1335 * kernels and should not be used.
1336 */
1337enum ib_uverbs_device_cap_flags {
1338 IB_UVERBS_DEVICE_RESIZE_MAX_WR = 1 << 0,
1339 IB_UVERBS_DEVICE_BAD_PKEY_CNTR = 1 << 1,
1340 IB_UVERBS_DEVICE_BAD_QKEY_CNTR = 1 << 2,
1341 IB_UVERBS_DEVICE_RAW_MULTI = 1 << 3,
1342 IB_UVERBS_DEVICE_AUTO_PATH_MIG = 1 << 4,
1343 IB_UVERBS_DEVICE_CHANGE_PHY_PORT = 1 << 5,
1344 IB_UVERBS_DEVICE_UD_AV_PORT_ENFORCE = 1 << 6,
1345 IB_UVERBS_DEVICE_CURR_QP_STATE_MOD = 1 << 7,
1346 IB_UVERBS_DEVICE_SHUTDOWN_PORT = 1 << 8,
1347 /* IB_UVERBS_DEVICE_INIT_TYPE = 1 << 9, (not in use) */
1348 IB_UVERBS_DEVICE_PORT_ACTIVE_EVENT = 1 << 10,
1349 IB_UVERBS_DEVICE_SYS_IMAGE_GUID = 1 << 11,
1350 IB_UVERBS_DEVICE_RC_RNR_NAK_GEN = 1 << 12,
1351 IB_UVERBS_DEVICE_SRQ_RESIZE = 1 << 13,
1352 IB_UVERBS_DEVICE_N_NOTIFY_CQ = 1 << 14,
1353 IB_UVERBS_DEVICE_MEM_WINDOW = 1 << 17,
1354 IB_UVERBS_DEVICE_UD_IP_CSUM = 1 << 18,
1355 IB_UVERBS_DEVICE_XRC = 1 << 20,
1356 IB_UVERBS_DEVICE_MEM_MGT_EXTENSIONS = 1 << 21,
1357 IB_UVERBS_DEVICE_MEM_WINDOW_TYPE_2A = 1 << 23,
1358 IB_UVERBS_DEVICE_MEM_WINDOW_TYPE_2B = 1 << 24,
1359 IB_UVERBS_DEVICE_RC_IP_CSUM = 1 << 25,
1360 /* Deprecated. Please use IB_UVERBS_RAW_PACKET_CAP_IP_CSUM. */
1361 IB_UVERBS_DEVICE_RAW_IP_CSUM = 1 << 26,
1362 IB_UVERBS_DEVICE_MANAGED_FLOW_STEERING = 1 << 29,
1363 /* Deprecated. Please use IB_UVERBS_RAW_PACKET_CAP_SCATTER_FCS. */
1364 IB_UVERBS_DEVICE_RAW_SCATTER_FCS = 1ULL << 34,
1365 IB_UVERBS_DEVICE_PCI_WRITE_END_PADDING = 1ULL << 36,
1366 /* Flush placement types */
1367 IB_UVERBS_DEVICE_FLUSH_GLOBAL = 1ULL << 38,
1368 IB_UVERBS_DEVICE_FLUSH_PERSISTENT = 1ULL << 39,
1369 /* Atomic write attributes */
1370 IB_UVERBS_DEVICE_ATOMIC_WRITE = 1ULL << 40,
1371 /* CoCo guest with DMA bounce buffering required */
1372 IB_UVERBS_DEVICE_CC_DMA_BOUNCE = 1ULL << 41,
1373};
1374
1375enum ib_uverbs_raw_packet_caps {
1376 IB_UVERBS_RAW_PACKET_CAP_CVLAN_STRIPPING = 1 << 0,
1377 IB_UVERBS_RAW_PACKET_CAP_SCATTER_FCS = 1 << 1,
1378 IB_UVERBS_RAW_PACKET_CAP_IP_CSUM = 1 << 2,
1379 IB_UVERBS_RAW_PACKET_CAP_DELAY_DROP = 1 << 3,
1380};
1381
1382/*
1383 * struct ib_uverbs_clock_info - timecounter state shared with userspace
1384 *
1385 * Drivers that use a software timecounter over a free-running hardware
1386 * cycle counter can map this page read-only into userspace, allowing
1387 * conversion of hardware timestamps to system time without a syscall.
1388 *
1389 * Synchronization uses a sequence counter (@sign): the kernel sets bit 0
1390 * before updating, then advances by 2 after. Userspace must retry the read
1391 * if @sign is odd or changed during the read.
1392 *
1393 * @sign: Sequence counter (bit 0 = update in progress)
1394 * @resv: Reserved
1395 * @nsec: Nanoseconds at last update
1396 * @cycles: Cycle counter value at last update
1397 * @frac: Fractional nanoseconds at last update
1398 * @mult: Cycle-to-nanosecond multiplier
1399 * @shift: Cycle-to-nanosecond shift
1400 * @mask: Cycle counter bitmask
1401 * @overflow_period: Max interval (nsec) between reads before counter wraps
1402 */
1403struct ib_uverbs_clock_info {
1404 __u32 sign;
1405 __u32 resv;
1406 __aligned_u64 nsec;
1407 __aligned_u64 cycles;
1408 __aligned_u64 frac;
1409 __u32 mult;
1410 __u32 shift;
1411 __aligned_u64 mask;
1412 __aligned_u64 overflow_period;
1413};
1414
1415#endif /* IB_USER_VERBS_H */