| 1 | |
| 2 | * Permedia2 framebuffer driver definitions.
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| 3 | * Copyright (c) 1998-2000 Ilario Nardinocchi ([email protected])
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| 4 | * --------------------------------------------------------------------------
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| 5 | * $Id: pm2fb.h,v 1.26 2000/09/19 00:11:53 illo Exp $
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| 6 | * --------------------------------------------------------------------------
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| 7 | * This file is subject to the terms and conditions of the GNU General Public
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| 8 | * License. See the file COPYING in the main directory of this archive
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| 9 | * for more details.
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| 10 |
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| 11 |
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| 12 | #ifndef PM2FB_H
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| 13 | #define PM2FB_H
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| 14 |
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| 15 | #define PM2_REFERENCE_CLOCK 14318
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| 16 | #define PM2_MAX_PIXCLOCK 230000
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| 17 | #define PM2_REGS_SIZE 0x10000
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| 18 |
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| 19 | #define PM2TAG(r) (u32 )(((r)-0x8000)>>3)
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| 20 |
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| 21 | |
| 22 | * Permedia2 registers used in the framebuffer
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| 23 | ****************************************************************************
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| 24 |
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| 25 | #define PM2R_RESET_STATUS 0x0000
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| 26 | #define PM2R_IN_FIFO_SPACE 0x0018
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| 27 | #define PM2R_OUT_FIFO_WORDS 0x0020
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| 28 | #define PM2R_APERTURE_ONE 0x0050
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| 29 | #define PM2R_APERTURE_TWO 0x0058
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| 30 | #define PM2R_FIFO_DISCON 0x0068
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| 31 | #define PM2R_CHIP_CONFIG 0x0070
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| 32 |
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| 33 | #define PM2R_REBOOT 0x1000
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| 34 | #define PM2R_MEM_CONTROL 0x1040
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| 35 | #define PM2R_BOOT_ADDRESS 0x1080
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| 36 | #define PM2R_MEM_CONFIG 0x10c0
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| 37 | #define PM2R_BYPASS_WRITE_MASK 0x1100
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| 38 | #define PM2R_FRAMEBUFFER_WRITE_MASK 0x1140
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| 39 |
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| 40 | #define PM2R_OUT_FIFO 0x2000
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| 41 |
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| 42 | #define PM2R_SCREEN_BASE 0x3000
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| 43 | #define PM2R_SCREEN_STRIDE 0x3008
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| 44 | #define PM2R_H_TOTAL 0x3010
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| 45 | #define PM2R_HG_END 0x3018
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| 46 | #define PM2R_HB_END 0x3020
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| 47 | #define PM2R_HS_START 0x3028
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| 48 | #define PM2R_HS_END 0x3030
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| 49 | #define PM2R_V_TOTAL 0x3038
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| 50 | #define PM2R_VB_END 0x3040
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| 51 | #define PM2R_VS_START 0x3048
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| 52 | #define PM2R_VS_END 0x3050
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| 53 | #define PM2R_VIDEO_CONTROL 0x3058
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| 54 | #define PM2R_LINE_COUNT 0x3070
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| 55 | #define PM2R_FIFO_CONTROL 0x3078
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| 56 |
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| 57 | #define PM2R_RD_PALETTE_WRITE_ADDRESS 0x4000
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| 58 | #define PM2R_RD_PALETTE_DATA 0x4008
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| 59 | #define PM2R_RD_PIXEL_MASK 0x4010
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| 60 | #define PM2R_RD_PALETTE_READ_ADDRESS 0x4018
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| 61 | #define PM2R_RD_CURSOR_COLOR_ADDRESS 0x4020
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| 62 | #define PM2R_RD_CURSOR_COLOR_DATA 0x4028
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| 63 | #define PM2R_RD_INDEXED_DATA 0x4050
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| 64 | #define PM2R_RD_CURSOR_DATA 0x4058
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| 65 | #define PM2R_RD_CURSOR_X_LSB 0x4060
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| 66 | #define PM2R_RD_CURSOR_X_MSB 0x4068
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| 67 | #define PM2R_RD_CURSOR_Y_LSB 0x4070
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| 68 | #define PM2R_RD_CURSOR_Y_MSB 0x4078
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| 69 |
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| 70 | #define PM2R_START_X_DOM 0x8000
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| 71 | #define PM2R_D_X_DOM 0x8008
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| 72 | #define PM2R_START_X_SUB 0x8010
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| 73 | #define PM2R_D_X_SUB 0x8018
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| 74 | #define PM2R_START_Y 0x8020
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| 75 | #define PM2R_D_Y 0x8028
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| 76 | #define PM2R_COUNT 0x8030
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| 77 | #define PM2R_RENDER 0x8038
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| 78 | #define PM2R_BIT_MASK_PATTERN 0x8068
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| 79 | #define PM2R_RASTERIZER_MODE 0x80a0
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| 80 | #define PM2R_RECTANGLE_ORIGIN 0x80d0
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| 81 | #define PM2R_RECTANGLE_SIZE 0x80d8
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| 82 | #define PM2R_PACKED_DATA_LIMITS 0x8150
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| 83 | #define PM2R_SCISSOR_MODE 0x8180
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| 84 | #define PM2R_SCISSOR_MIN_XY 0x8188
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| 85 | #define PM2R_SCISSOR_MAX_XY 0x8190
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| 86 | #define PM2R_SCREEN_SIZE 0x8198
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| 87 | #define PM2R_AREA_STIPPLE_MODE 0x81a0
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| 88 | #define PM2R_WINDOW_ORIGIN 0x81c8
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| 89 | #define PM2R_TEXTURE_ADDRESS_MODE 0x8380
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| 90 | #define PM2R_TEXTURE_MAP_FORMAT 0x8588
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| 91 | #define PM2R_TEXTURE_DATA_FORMAT 0x8590
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| 92 | #define PM2R_TEXTURE_READ_MODE 0x8670
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| 93 | #define PM2R_TEXEL_LUT_MODE 0x8678
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| 94 | #define PM2R_TEXTURE_COLOR_MODE 0x8680
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| 95 | #define PM2R_FOG_MODE 0x8690
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| 96 | #define PM2R_TEXEL0 0x8760
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| 97 | #define PM2R_COLOR_DDA_MODE 0x87e0
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| 98 | #define PM2R_CONSTANT_COLOR 0x87e8
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| 99 | #define PM2R_ALPHA_BLEND_MODE 0x8810
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| 100 | #define PM2R_DITHER_MODE 0x8818
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| 101 | #define PM2R_FB_SOFT_WRITE_MASK 0x8820
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| 102 | #define PM2R_LOGICAL_OP_MODE 0x8828
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| 103 | #define PM2R_LB_READ_MODE 0x8880
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| 104 | #define PM2R_LB_READ_FORMAT 0x8888
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| 105 | #define PM2R_LB_SOURCE_OFFSET 0x8890
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| 106 | #define PM2R_LB_WINDOW_BASE 0x88b8
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| 107 | #define PM2R_LB_WRITE_FORMAT 0x88c8
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| 108 | #define PM2R_STENCIL_MODE 0x8988
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| 109 | #define PM2R_DEPTH_MODE 0x89a0
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| 110 | #define PM2R_FB_READ_MODE 0x8a80
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| 111 | #define PM2R_FB_SOURCE_OFFSET 0x8a88
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| 112 | #define PM2R_FB_PIXEL_OFFSET 0x8a90
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| 113 | #define PM2R_FB_WINDOW_BASE 0x8ab0
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| 114 | #define PM2R_FB_WRITE_MODE 0x8ab8
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| 115 | #define PM2R_FB_HARD_WRITE_MASK 0x8ac0
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| 116 | #define PM2R_FB_BLOCK_COLOR 0x8ac8
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| 117 | #define PM2R_FB_READ_PIXEL 0x8ad0
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| 118 | #define PM2R_FILTER_MODE 0x8c00
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| 119 | #define PM2R_SYNC 0x8c40
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| 120 | #define PM2R_YUV_MODE 0x8f00
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| 121 | #define PM2R_STATISTICS_MODE 0x8c08
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| 122 | #define PM2R_FB_SOURCE_DELTA 0x8d88
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| 123 | #define PM2R_CONFIG 0x8d90
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| 124 | #define PM2R_DELTA_MODE 0x9300
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| 125 |
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| 126 |
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| 127 | #define PM2VR_RD_INDEX_LOW 0x4020
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| 128 | #define PM2VR_RD_INDEX_HIGH 0x4028
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| 129 | #define PM2VR_RD_INDEXED_DATA 0x4030
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| 130 |
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| 131 |
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| 132 | #define PM2I_RD_CURSOR_CONTROL 0x06
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| 133 | #define PM2I_RD_COLOR_MODE 0x18
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| 134 | #define PM2I_RD_MODE_CONTROL 0x19
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| 135 | #define PM2I_RD_MISC_CONTROL 0x1e
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| 136 | #define PM2I_RD_PIXEL_CLOCK_A1 0x20
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| 137 | #define PM2I_RD_PIXEL_CLOCK_A2 0x21
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| 138 | #define PM2I_RD_PIXEL_CLOCK_A3 0x22
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| 139 | #define PM2I_RD_PIXEL_CLOCK_STATUS 0x29
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| 140 | #define PM2I_RD_MEMORY_CLOCK_1 0x30
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| 141 | #define PM2I_RD_MEMORY_CLOCK_2 0x31
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| 142 | #define PM2I_RD_MEMORY_CLOCK_3 0x32
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| 143 | #define PM2I_RD_MEMORY_CLOCK_STATUS 0x33
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| 144 | #define PM2I_RD_COLOR_KEY_CONTROL 0x40
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| 145 | #define PM2I_RD_OVERLAY_KEY 0x41
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| 146 | #define PM2I_RD_RED_KEY 0x42
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| 147 | #define PM2I_RD_GREEN_KEY 0x43
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| 148 | #define PM2I_RD_BLUE_KEY 0x44
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| 149 |
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| 150 |
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| 151 | #define PM2VI_RD_MISC_CONTROL 0x000
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| 152 | #define PM2VI_RD_SYNC_CONTROL 0x001
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| 153 | #define PM2VI_RD_DAC_CONTROL 0x002
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| 154 | #define PM2VI_RD_PIXEL_SIZE 0x003
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| 155 | #define PM2VI_RD_COLOR_FORMAT 0x004
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| 156 | #define PM2VI_RD_CURSOR_MODE 0x005
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| 157 | #define PM2VI_RD_CURSOR_X_LOW 0x007
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| 158 | #define PM2VI_RD_CURSOR_X_HIGH 0x008
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| 159 | #define PM2VI_RD_CURSOR_Y_LOW 0x009
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| 160 | #define PM2VI_RD_CURSOR_Y_HIGH 0x00A
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| 161 | #define PM2VI_RD_CURSOR_X_HOT 0x00B
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| 162 | #define PM2VI_RD_CURSOR_Y_HOT 0x00C
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| 163 | #define PM2VI_RD_OVERLAY_KEY 0x00D
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| 164 | #define PM2VI_RD_CLK0_PRESCALE 0x201
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| 165 | #define PM2VI_RD_CLK0_FEEDBACK 0x202
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| 166 | #define PM2VI_RD_CLK0_POSTSCALE 0x203
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| 167 | #define PM2VI_RD_CLK1_PRESCALE 0x204
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| 168 | #define PM2VI_RD_CLK1_FEEDBACK 0x205
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| 169 | #define PM2VI_RD_CLK1_POSTSCALE 0x206
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| 170 | #define PM2VI_RD_MCLK_CONTROL 0x20D
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| 171 | #define PM2VI_RD_MCLK_PRESCALE 0x20E
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| 172 | #define PM2VI_RD_MCLK_FEEDBACK 0x20F
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| 173 | #define PM2VI_RD_MCLK_POSTSCALE 0x210
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| 174 | #define PM2VI_RD_CURSOR_PALETTE 0x303
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| 175 | #define PM2VI_RD_CURSOR_PATTERN 0x400
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| 176 |
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| 177 |
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| 178 | #define PM2F_RENDER_AREASTIPPLE (1L<<0)
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| 179 | #define PM2F_RENDER_FASTFILL (1L<<3)
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| 180 | #define PM2F_RENDER_PRIMITIVE_MASK (3L<<6)
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| 181 | #define PM2F_RENDER_LINE 0
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| 182 | #define PM2F_RENDER_TRAPEZOID (1L<<6)
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| 183 | #define PM2F_RENDER_POINT (2L<<6)
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| 184 | #define PM2F_RENDER_RECTANGLE (3L<<6)
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| 185 | #define PM2F_RENDER_SYNC_ON_BIT_MASK (1L<<11)
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| 186 | #define PM2F_RENDER_TEXTURE_ENABLE (1L<<13)
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| 187 | #define PM2F_SYNCHRONIZATION (1L<<10)
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| 188 | #define PM2F_PLL_LOCKED 0x10
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| 189 | #define PM2F_BEING_RESET (1L<<31)
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| 190 | #define PM2F_DATATYPE_COLOR 0x8000
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| 191 | #define PM2F_VGA_ENABLE 0x02
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| 192 | #define PM2F_VGA_FIXED 0x04
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| 193 | #define PM2F_FB_WRITE_ENABLE 0x01
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| 194 | #define PM2F_FB_READ_SOURCE_ENABLE 0x0200
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| 195 | #define PM2F_RD_PALETTE_WIDTH_8 0x02
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| 196 | #define PM2F_PART_PROD_MASK 0x01ff
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| 197 | #define PM2F_SCREEN_SCISSOR_ENABLE 0x02
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| 198 | #define PM2F_DATA_64_ENABLE 0x00010000
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| 199 | #define PM2F_BLANK_LOW 0x02
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| 200 | #define PM2F_HSYNC_MASK 0x18
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| 201 | #define PM2F_VSYNC_MASK 0x60
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| 202 | #define PM2F_HSYNC_ACT_HIGH 0x08
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| 203 | #define PM2F_HSYNC_FORCED_LOW 0x10
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| 204 | #define PM2F_HSYNC_ACT_LOW 0x18
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| 205 | #define PM2F_VSYNC_ACT_HIGH 0x20
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| 206 | #define PM2F_VSYNC_FORCED_LOW 0x40
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| 207 | #define PM2F_VSYNC_ACT_LOW 0x60
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| 208 | #define PM2F_LINE_DOUBLE 0x04
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| 209 | #define PM2F_VIDEO_ENABLE 0x01
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| 210 | #define PM2F_RD_PIXELFORMAT_SVGA 0x01
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| 211 | #define PM2F_RD_PIXELFORMAT_RGB232OFFSET 0x02
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| 212 | #define PM2F_RD_PIXELFORMAT_RGBA2321 0x03
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| 213 | #define PM2F_RD_PIXELFORMAT_RGBA5551 0x04
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| 214 | #define PM2F_RD_PIXELFORMAT_RGBA4444 0x05
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| 215 | #define PM2F_RD_PIXELFORMAT_RGB565 0x06
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| 216 | #define PM2F_RD_PIXELFORMAT_RGBA8888 0x08
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| 217 | #define PM2F_RD_PIXELFORMAT_RGB888 0x09
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| 218 | #define PM2F_RD_GUI_ACTIVE 0x10
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| 219 | #define PM2F_RD_COLOR_MODE_RGB 0x20
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| 220 | #define PM2F_DELTA_ORDER_RGB (1L<<18)
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| 221 | #define PM2F_RD_TRUECOLOR 0x80
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| 222 | #define PM2F_NO_ALPHA_BUFFER 0x10
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| 223 | #define PM2F_TEXTEL_SIZE_16 0x00080000
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| 224 | #define PM2F_TEXTEL_SIZE_32 0x00100000
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| 225 | #define PM2F_TEXTEL_SIZE_4 0x00180000
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| 226 | #define PM2F_TEXTEL_SIZE_24 0x00200000
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| 227 | #define PM2F_INCREASE_X (1L<<21)
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| 228 | #define PM2F_INCREASE_Y (1L<<22)
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| 229 | #define PM2F_CONFIG_FB_WRITE_ENABLE (1L<<3)
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| 230 | #define PM2F_CONFIG_FB_PACKED_DATA (1L<<2)
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| 231 | #define PM2F_CONFIG_FB_READ_DEST_ENABLE (1L<<1)
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| 232 | #define PM2F_CONFIG_FB_READ_SOURCE_ENABLE (1L<<0)
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| 233 | #define PM2F_COLOR_KEY_TEST_OFF (1L<<4)
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| 234 | #define PM2F_MEM_CONFIG_RAM_MASK (3L<<29)
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| 235 | #define PM2F_MEM_BANKS_1 0L
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| 236 | #define PM2F_MEM_BANKS_2 (1L<<29)
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| 237 | #define PM2F_MEM_BANKS_3 (2L<<29)
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| 238 | #define PM2F_MEM_BANKS_4 (3L<<29)
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| 239 | #define PM2F_APERTURE_STANDARD 0
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| 240 | #define PM2F_APERTURE_BYTESWAP 1
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| 241 | #define PM2F_APERTURE_HALFWORDSWAP 2
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| 242 | #define PM2F_CURSORMODE_CURSOR_ENABLE (1 << 0)
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| 243 | #define PM2F_CURSORMODE_TYPE_X (1 << 4)
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| 244 |
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| 245 | typedef enum {
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| 246 | PM2_TYPE_PERMEDIA2,
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| 247 | PM2_TYPE_PERMEDIA2V
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| 248 | } pm2type_t;
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| 249 |
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| 250 | #endif
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| 251 |
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| 252 | |
| 253 | * That's all folks!
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| 254 | ****************************************************************************
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