| 1 |
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| 2 | |
| 3 | * Copyright (C) 2018 Christoph Hellwig.
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| 4 | *
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| 5 | * DMA operations that map physical memory directly without using an IOMMU.
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| 6 |
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| 7 | #ifndef _KERNEL_DMA_DIRECT_H
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| 8 | #define _KERNEL_DMA_DIRECT_H
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| 9 |
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| 10 | #include <linux/dma-direct.h>
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| 11 | #include <linux/memremap.h>
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| 12 |
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| 13 | int dma_direct_get_sgtable(struct device *dev, struct sg_table *sgt,
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| 14 | void *cpu_addr, dma_addr_t dma_addr, size_t size,
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| 15 | unsigned long attrs);
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| 16 | bool dma_direct_can_mmap(struct device *dev);
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| 17 | int dma_direct_mmap(struct device *dev, struct vm_area_struct *vma,
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| 18 | void *cpu_addr, dma_addr_t dma_addr, size_t size,
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| 19 | unsigned long attrs);
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| 20 | dma_addr_t dma_direct_map_phys(struct device *dev, phys_addr_t phys,
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| 21 | size_t size, enum dma_data_direction dir,
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| 22 | unsigned long attrs, bool flush);
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| 23 | bool dma_direct_need_sync(struct device *dev, dma_addr_t dma_addr);
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| 24 | int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
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| 25 | enum dma_data_direction dir, unsigned long attrs);
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| 26 | bool dma_direct_all_ram_mapped(struct device *dev);
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| 27 | size_t dma_direct_max_mapping_size(struct device *dev);
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| 28 |
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| 29 | #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
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| 30 | defined(CONFIG_SWIOTLB)
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| 31 | void dma_direct_sync_sg_for_device(struct device *dev, struct scatterlist *sgl,
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| 32 | int nents, enum dma_data_direction dir);
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| 33 | #else
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| 34 | static inline void dma_direct_sync_sg_for_device(struct device *dev,
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| 35 | struct scatterlist *sgl, int nents, enum dma_data_direction dir)
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| 36 | {
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| 37 | }
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| 38 | #endif
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| 39 |
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| 40 | #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
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| 41 | defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
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| 42 | defined(CONFIG_SWIOTLB)
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| 43 | void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
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| 44 | int nents, enum dma_data_direction dir, unsigned long attrs);
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| 45 | void dma_direct_sync_sg_for_cpu(struct device *dev,
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| 46 | struct scatterlist *sgl, int nents, enum dma_data_direction dir);
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| 47 | #else
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| 48 | static inline void dma_direct_unmap_sg(struct device *dev,
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| 49 | struct scatterlist *sgl, int nents, enum dma_data_direction dir,
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| 50 | unsigned long attrs)
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| 51 | {
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| 52 | }
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| 53 | static inline void dma_direct_sync_sg_for_cpu(struct device *dev,
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| 54 | struct scatterlist *sgl, int nents, enum dma_data_direction dir)
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| 55 | {
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| 56 | }
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| 57 | #endif
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| 58 |
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| 59 | static inline void dma_direct_sync_single_for_device(struct device *dev,
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| 60 | dma_addr_t addr, size_t size, enum dma_data_direction dir)
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| 61 | {
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| 62 | phys_addr_t paddr = dma_to_phys(dev, addr);
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| 63 |
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| 64 | swiotlb_sync_single_for_device(dev, paddr, size, dir);
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| 65 |
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| 66 | if (!dev_is_dma_coherent(dev)) {
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| 67 | arch_sync_dma_for_device(paddr, size, dir);
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| 68 | arch_sync_dma_flush();
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| 69 | }
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| 70 | }
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| 71 |
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| 72 | static inline void dma_direct_sync_single_for_cpu(struct device *dev,
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| 73 | dma_addr_t addr, size_t size, enum dma_data_direction dir,
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| 74 | bool flush)
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| 75 | {
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| 76 | phys_addr_t paddr = dma_to_phys(dev, addr);
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| 77 |
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| 78 | if (!dev_is_dma_coherent(dev)) {
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| 79 | arch_sync_dma_for_cpu(paddr, size, dir);
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| 80 | if (flush)
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| 81 | arch_sync_dma_flush();
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| 82 | arch_sync_dma_for_cpu_all();
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| 83 | }
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| 84 |
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| 85 | swiotlb_sync_single_for_cpu(dev, paddr, size, dir);
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| 86 | }
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| 87 |
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| 88 | static inline void dma_direct_unmap_phys(struct device *dev, dma_addr_t addr,
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| 89 | size_t size, enum dma_data_direction dir, unsigned long attrs,
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| 90 | bool flush)
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| 91 | {
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| 92 | phys_addr_t phys;
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| 93 |
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| 94 | if (attrs & (DMA_ATTR_MMIO | DMA_ATTR_REQUIRE_COHERENT))
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| 95 |
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| 96 | return;
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| 97 |
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| 98 | phys = dma_to_phys(dev, addr);
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| 99 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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| 100 | dma_direct_sync_single_for_cpu(dev, addr, size, dir, flush);
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| 101 |
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| 102 | swiotlb_tbl_unmap_single(dev, phys, size, dir,
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| 103 | attrs | DMA_ATTR_SKIP_CPU_SYNC);
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| 104 | }
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| 105 | #endif
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