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1# SPDX-License-Identifier: GPL-2.0-only
2menu "IRQ subsystem"
3# Options selectable by the architecture code
4
5# Make sparse irq Kconfig switch below available
6config MAY_HAVE_SPARSE_IRQ
7 bool
8
9# Enable the generic irq autoprobe mechanism
10config GENERIC_IRQ_PROBE
11 bool
12
13# Use the generic /proc/interrupts implementation
14config GENERIC_IRQ_SHOW
15 bool
16
17# Print level/edge extra information
18config GENERIC_IRQ_SHOW_LEVEL
19 bool
20
21# Supports effective affinity mask
22config GENERIC_IRQ_EFFECTIVE_AFF_MASK
23 depends on SMP
24 bool
25
26# Support for delayed migration from interrupt context
27config GENERIC_PENDING_IRQ
28 bool
29
30# Support for generic irq migrating off cpu before the cpu is offline.
31config GENERIC_IRQ_MIGRATION
32 bool
33
34# Alpha specific irq affinity mechanism
35config AUTO_IRQ_AFFINITY
36 bool
37
38# Interrupt injection mechanism
39config GENERIC_IRQ_INJECTION
40 bool
41
42# Tasklet based software resend for pending interrupts on enable_irq()
43config HARDIRQS_SW_RESEND
44 bool
45
46# Generic configurable interrupt chip implementation
47config GENERIC_IRQ_CHIP
48 bool
49 select IRQ_DOMAIN
50
51# Generic irq_domain hw <--> linux irq number translation
52config IRQ_DOMAIN
53 bool
54
55# Support for simulated interrupts
56config IRQ_SIM
57 bool
58 select IRQ_WORK
59 select IRQ_DOMAIN
60
61# Support for hierarchical irq domains
62config IRQ_DOMAIN_HIERARCHY
63 bool
64 select IRQ_DOMAIN
65
66# Support for obsolete non-mapping irq domains
67config IRQ_DOMAIN_NOMAP
68 bool
69 select IRQ_DOMAIN
70
71# Support for hierarchical fasteoi+edge and fasteoi+level handlers
72config IRQ_FASTEOI_HIERARCHY_HANDLERS
73 bool
74
75# Generic IRQ IPI support
76config GENERIC_IRQ_IPI
77 bool
78 depends on SMP
79 select IRQ_DOMAIN_HIERARCHY
80
81# Generic IRQ IPI Mux support
82config GENERIC_IRQ_IPI_MUX
83 bool
84 depends on SMP
85
86# Generic MSI hierarchical interrupt domain support
87config GENERIC_MSI_IRQ
88 bool
89 select IRQ_DOMAIN_HIERARCHY
90
91# irqchip drivers should select this if they call iommu_dma_prepare_msi()
92config IRQ_MSI_IOMMU
93 bool
94
95config GENERIC_IRQ_MATRIX_ALLOCATOR
96 bool
97
98config GENERIC_IRQ_RESERVATION_MODE
99 bool
100
101# Snapshot for interrupt statistics
102config GENERIC_IRQ_STAT_SNAPSHOT
103 bool
104
105# Support forced irq threading
106config IRQ_FORCED_THREADING
107 bool
108
109config SPARSE_IRQ
110 bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
111 help
112
113 Sparse irq numbering is useful for distro kernels that want
114 to define a high CONFIG_NR_CPUS value but still want to have
115 low kernel memory footprint on smaller machines.
116
117 ( Sparse irqs can also be beneficial on NUMA boxes, as they spread
118 out the interrupt descriptors in a more NUMA-friendly way. )
119
120 If you don't know what to do here, say N.
121
122config GENERIC_IRQ_DEBUGFS
123 bool "Expose irq internals in debugfs"
124 depends on DEBUG_FS
125 select GENERIC_IRQ_INJECTION
126 default n
127 help
128
129 Exposes internal state information through debugfs. Mostly for
130 developers and debugging of hard to diagnose interrupt problems.
131
132 If you don't know what to do here, say N.
133
134# Clear forwarded VM interrupts during kexec.
135# This option ensures the kernel clears active states for interrupts
136# forwarded to virtual machines (VMs) during a machine kexec.
137config GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD
138 bool
139
140config IRQ_KUNIT_TEST
141 bool "KUnit tests for IRQ management APIs" if !KUNIT_ALL_TESTS
142 depends on KUNIT=y
143 depends on SPARSE_IRQ
144 default KUNIT_ALL_TESTS
145 select IRQ_DOMAIN
146 imply SMP
147 help
148 This option enables KUnit tests for the IRQ subsystem API. These are
149 only for development and testing, not for regular kernel use cases.
150
151 If unsure, say N.
152
153config REFCOUNT_INTERRUPT_KUNIT_TEST
154 tristate "Test refcounted interrupt enable/disable" if !KUNIT_ALL_TESTS
155 depends on KUNIT
156 default KUNIT_ALL_TESTS
157 help
158 This builds the kunit tests for the refcounted interrupt
159 infrastructure. It verifies the correctness of single, nested,
160 and multiple interrupt enable/disable state changes and ensures
161 that the underlying reference counting mechanisms work as expected.
162
163 If unsure, say N.
164
165endmenu
166
167config GENERIC_IRQ_MULTI_HANDLER
168 bool
169 help
170 Allow to specify the low level IRQ handler at run time.
171
172# Cavium Octeon is the last system to use this deprecated option
173# Do not even think of enabling this on any new platform
174config DEPRECATED_IRQ_CPU_ONOFFLINE
175 bool
176 depends on CAVIUM_OCTEON_SOC
177 default CAVIUM_OCTEON_SOC